1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2023 Analog Devices, Inc.
4 * Author: Antoniu Miclaus <antoniu.miclaus@analog.com>
7 #include <linux/bitops.h>
9 #include <linux/hwmon.h>
10 #include <linux/i2c.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/property.h>
14 #include <linux/regmap.h>
15 #include <linux/regulator/consumer.h>
17 #define LTC2991_STATUS_LOW 0x00
18 #define LTC2991_CH_EN_TRIGGER 0x01
19 #define LTC2991_V1_V4_CTRL 0x06
20 #define LTC2991_V5_V8_CTRL 0x07
21 #define LTC2991_PWM_TH_LSB_T_INT 0x08
22 #define LTC2991_PWM_TH_MSB 0x09
23 #define LTC2991_CHANNEL_V_MSB(x) (0x0A + ((x) * 2))
24 #define LTC2991_CHANNEL_T_MSB(x) (0x0A + ((x) * 4))
25 #define LTC2991_CHANNEL_C_MSB(x) (0x0C + ((x) * 4))
26 #define LTC2991_T_INT_MSB 0x1A
27 #define LTC2991_VCC_MSB 0x1C
29 #define LTC2991_V7_V8_EN BIT(7)
30 #define LTC2991_V5_V6_EN BIT(6)
31 #define LTC2991_V3_V4_EN BIT(5)
32 #define LTC2991_V1_V2_EN BIT(4)
33 #define LTC2991_T_INT_VCC_EN BIT(3)
35 #define LTC2991_V3_V4_FILT_EN BIT(7)
36 #define LTC2991_V3_V4_TEMP_EN BIT(5)
37 #define LTC2991_V3_V4_DIFF_EN BIT(4)
38 #define LTC2991_V1_V2_FILT_EN BIT(3)
39 #define LTC2991_V1_V2_TEMP_EN BIT(1)
40 #define LTC2991_V1_V2_DIFF_EN BIT(0)
42 #define LTC2991_V7_V8_FILT_EN BIT(7)
43 #define LTC2991_V7_V8_TEMP_EN BIT(5)
44 #define LTC2991_V7_V8_DIFF_EN BIT(4)
45 #define LTC2991_V5_V6_FILT_EN BIT(7)
46 #define LTC2991_V5_V6_TEMP_EN BIT(5)
47 #define LTC2991_V5_V6_DIFF_EN BIT(4)
49 #define LTC2991_REPEAT_ACQ_EN BIT(4)
50 #define LTC2991_T_INT_FILT_EN BIT(3)
52 #define LTC2991_MAX_CHANNEL 4
53 #define LTC2991_T_INT_CH_NR 4
54 #define LTC2991_VCC_CH_NR 0
56 struct ltc2991_state {
58 struct regmap *regmap;
59 u32 r_sense_uohm[LTC2991_MAX_CHANNEL];
60 bool temp_en[LTC2991_MAX_CHANNEL];
63 static int ltc2991_read_reg(struct ltc2991_state *st, u8 addr, u8 reg_len,
70 return regmap_read(st->regmap, addr, val);
72 ret = regmap_bulk_read(st->regmap, addr, ®vals, reg_len);
76 *val = be16_to_cpu(regvals);
81 static int ltc2991_get_voltage(struct ltc2991_state *st, u32 reg, long *val)
83 int reg_val, ret, offset = 0;
85 ret = ltc2991_read_reg(st, reg, 2, ®_val);
89 if (reg == LTC2991_VCC_MSB)
93 /* Vx, 305.18uV/LSB */
94 *val = DIV_ROUND_CLOSEST(sign_extend32(reg_val, 14) * 30518,
100 static int ltc2991_read_in(struct device *dev, u32 attr, int channel, long *val)
102 struct ltc2991_state *st = dev_get_drvdata(dev);
107 if (channel == LTC2991_VCC_CH_NR)
108 reg = LTC2991_VCC_MSB;
110 reg = LTC2991_CHANNEL_V_MSB(channel - 1);
112 return ltc2991_get_voltage(st, reg, val);
118 static int ltc2991_get_curr(struct ltc2991_state *st, u32 reg, int channel,
123 ret = ltc2991_read_reg(st, reg, 2, ®_val);
127 /* Vx-Vy, 19.075uV/LSB */
128 *val = DIV_ROUND_CLOSEST(sign_extend32(reg_val, 14) * 19075,
129 st->r_sense_uohm[channel]);
134 static int ltc2991_read_curr(struct device *dev, u32 attr, int channel,
137 struct ltc2991_state *st = dev_get_drvdata(dev);
141 case hwmon_curr_input:
142 reg = LTC2991_CHANNEL_C_MSB(channel);
143 return ltc2991_get_curr(st, reg, channel, val);
149 static int ltc2991_get_temp(struct ltc2991_state *st, u32 reg, int channel,
154 ret = ltc2991_read_reg(st, reg, 2, ®_val);
158 /* Temp LSB = 0.0625 Degrees */
159 *val = DIV_ROUND_CLOSEST(sign_extend32(reg_val, 12) * 1000, 16);
164 static int ltc2991_read_temp(struct device *dev, u32 attr, int channel,
167 struct ltc2991_state *st = dev_get_drvdata(dev);
171 case hwmon_temp_input:
172 if (channel == LTC2991_T_INT_CH_NR)
173 reg = LTC2991_T_INT_MSB;
175 reg = LTC2991_CHANNEL_T_MSB(channel);
177 return ltc2991_get_temp(st, reg, channel, val);
183 static int ltc2991_read(struct device *dev, enum hwmon_sensor_types type,
184 u32 attr, int channel, long *val)
188 return ltc2991_read_in(dev, attr, channel, val);
190 return ltc2991_read_curr(dev, attr, channel, val);
192 return ltc2991_read_temp(dev, attr, channel, val);
198 static umode_t ltc2991_is_visible(const void *data,
199 enum hwmon_sensor_types type, u32 attr,
202 const struct ltc2991_state *st = data;
208 if (channel == LTC2991_VCC_CH_NR)
210 if (st->temp_en[(channel - 1) / 2])
214 if (!st->r_sense_uohm[(channel - 1) / 2])
220 case hwmon_curr_input:
221 if (st->r_sense_uohm[channel])
228 case hwmon_temp_input:
229 if (st->temp_en[channel] ||
230 channel == LTC2991_T_INT_CH_NR)
242 static const struct hwmon_ops ltc2991_hwmon_ops = {
243 .is_visible = ltc2991_is_visible,
244 .read = ltc2991_read,
247 static const struct hwmon_channel_info *ltc2991_info[] = {
248 HWMON_CHANNEL_INFO(temp,
255 HWMON_CHANNEL_INFO(curr,
261 HWMON_CHANNEL_INFO(in,
275 static const struct hwmon_chip_info ltc2991_chip_info = {
276 .ops = <c2991_hwmon_ops,
277 .info = ltc2991_info,
280 static const struct regmap_config ltc2991_regmap_config = {
283 .max_register = 0x1D,
286 static int ltc2991_init(struct ltc2991_state *st)
288 struct fwnode_handle *child;
291 u8 v5_v8_reg_data = 0, v1_v4_reg_data = 0;
293 ret = devm_regulator_get_enable(st->dev, "vcc");
295 return dev_err_probe(st->dev, ret,
296 "failed to enable regulator\n");
298 device_for_each_child_node(st->dev, child) {
299 ret = fwnode_property_read_u32(child, "reg", &addr);
301 fwnode_handle_put(child);
306 fwnode_handle_put(child);
310 ret = fwnode_property_read_u32(child,
311 "shunt-resistor-micro-ohms",
315 return dev_err_probe(st->dev, -EINVAL,
316 "shunt resistor value cannot be zero\n");
318 st->r_sense_uohm[addr] = val;
322 v1_v4_reg_data |= LTC2991_V1_V2_DIFF_EN;
325 v1_v4_reg_data |= LTC2991_V3_V4_DIFF_EN;
328 v5_v8_reg_data |= LTC2991_V5_V6_DIFF_EN;
331 v5_v8_reg_data |= LTC2991_V7_V8_DIFF_EN;
338 ret = fwnode_property_read_bool(child,
339 "adi,temperature-enable");
341 st->temp_en[addr] = ret;
345 v1_v4_reg_data |= LTC2991_V1_V2_TEMP_EN;
348 v1_v4_reg_data |= LTC2991_V3_V4_TEMP_EN;
351 v5_v8_reg_data |= LTC2991_V5_V6_TEMP_EN;
354 v5_v8_reg_data |= LTC2991_V7_V8_TEMP_EN;
362 ret = regmap_write(st->regmap, LTC2991_V5_V8_CTRL, v5_v8_reg_data);
364 return dev_err_probe(st->dev, ret,
365 "Error: Failed to set V5-V8 CTRL reg.\n");
367 ret = regmap_write(st->regmap, LTC2991_V1_V4_CTRL, v1_v4_reg_data);
369 return dev_err_probe(st->dev, ret,
370 "Error: Failed to set V1-V4 CTRL reg.\n");
372 ret = regmap_write(st->regmap, LTC2991_PWM_TH_LSB_T_INT,
373 LTC2991_REPEAT_ACQ_EN);
375 return dev_err_probe(st->dev, ret,
376 "Error: Failed to set continuous mode.\n");
378 /* Enable all channels and trigger conversions */
379 return regmap_write(st->regmap, LTC2991_CH_EN_TRIGGER,
380 LTC2991_V7_V8_EN | LTC2991_V5_V6_EN |
381 LTC2991_V3_V4_EN | LTC2991_V1_V2_EN |
382 LTC2991_T_INT_VCC_EN);
385 static int ltc2991_i2c_probe(struct i2c_client *client)
388 struct device *hwmon_dev;
389 struct ltc2991_state *st;
391 st = devm_kzalloc(&client->dev, sizeof(*st), GFP_KERNEL);
395 st->dev = &client->dev;
396 st->regmap = devm_regmap_init_i2c(client, <c2991_regmap_config);
397 if (IS_ERR(st->regmap))
398 return PTR_ERR(st->regmap);
400 ret = ltc2991_init(st);
404 hwmon_dev = devm_hwmon_device_register_with_info(&client->dev,
409 return PTR_ERR_OR_ZERO(hwmon_dev);
412 static const struct of_device_id ltc2991_of_match[] = {
413 { .compatible = "adi,ltc2991" },
416 MODULE_DEVICE_TABLE(of, ltc2991_of_match);
418 static const struct i2c_device_id ltc2991_i2c_id[] = {
422 MODULE_DEVICE_TABLE(i2c, ltc2991_i2c_id);
424 static struct i2c_driver ltc2991_i2c_driver = {
427 .of_match_table = ltc2991_of_match,
429 .probe = ltc2991_i2c_probe,
430 .id_table = ltc2991_i2c_id,
433 module_i2c_driver(ltc2991_i2c_driver);
435 MODULE_AUTHOR("Antoniu Miclaus <antoniu.miclaus@analog.com>");
436 MODULE_DESCRIPTION("Analog Devices LTC2991 HWMON Driver");
437 MODULE_LICENSE("GPL");