drivers/hwmon/it87.c

   1 /*
   2  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   3  *           monitoring.
   4  *
   5  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   6  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   7  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   8  *  Fan Controller)
   9  *
  10  *  This driver supports only the Environment Controller in the IT8705F and
  11  *  similar parts.  The other devices are supported by different drivers.
  12  *
  13  *  Supports: IT8603E  Super I/O chip w/LPC interface
  14  *            IT8620E  Super I/O chip w/LPC interface
  15  *            IT8622E  Super I/O chip w/LPC interface
  16  *            IT8623E  Super I/O chip w/LPC interface
  17  *            IT8628E  Super I/O chip w/LPC interface
  18  *            IT8705F  Super I/O chip w/LPC interface
  19  *            IT8712F  Super I/O chip w/LPC interface
  20  *            IT8716F  Super I/O chip w/LPC interface
  21  *            IT8718F  Super I/O chip w/LPC interface
  22  *            IT8720F  Super I/O chip w/LPC interface
  23  *            IT8721F  Super I/O chip w/LPC interface
  24  *            IT8726F  Super I/O chip w/LPC interface
  25  *            IT8728F  Super I/O chip w/LPC interface
  26  *            IT8732F  Super I/O chip w/LPC interface
  27  *            IT8758E  Super I/O chip w/LPC interface
  28  *            IT8771E  Super I/O chip w/LPC interface
  29  *            IT8772E  Super I/O chip w/LPC interface
  30  *            IT8781F  Super I/O chip w/LPC interface
  31  *            IT8782F  Super I/O chip w/LPC interface
  32  *            IT8783E/F Super I/O chip w/LPC interface
  33  *            IT8786E  Super I/O chip w/LPC interface
  34  *            IT8790E  Super I/O chip w/LPC interface
  35  *            IT8792E  Super I/O chip w/LPC interface
  36  *            Sis950   A clone of the IT8705F
  37  *
  38  *  Copyright (C) 2001 Chris Gauthron
  39  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  40  *
  41  *  This program is free software; you can redistribute it and/or modify
  42  *  it under the terms of the GNU General Public License as published by
  43  *  the Free Software Foundation; either version 2 of the License, or
  44  *  (at your option) any later version.
  45  *
  46  *  This program is distributed in the hope that it will be useful,
  47  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  48  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  49  *  GNU General Public License for more details.
  50  */
  51
  52 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  53
  54 #include <linux/bitops.h>
  55 #include <linux/module.h>
  56 #include <linux/init.h>
  57 #include <linux/slab.h>
  58 #include <linux/jiffies.h>
  59 #include <linux/platform_device.h>
  60 #include <linux/hwmon.h>
  61 #include <linux/hwmon-sysfs.h>
  62 #include <linux/hwmon-vid.h>
  63 #include <linux/err.h>
  64 #include <linux/mutex.h>
  65 #include <linux/sysfs.h>
  66 #include <linux/string.h>
  67 #include <linux/dmi.h>
  68 #include <linux/acpi.h>
  69 #include <linux/io.h>
  70
  71 #define DRVNAME "it87"
  72
  73 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  74              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  75              it8792, it8603, it8620, it8622, it8628 };
  76
  77 static unsigned short force_id;
  78 module_param(force_id, ushort, 0);
  79 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  80
  81 static struct platform_device *it87_pdev[2];
  82
  83 #define REG_2E  0x2e    /* The register to read/write */
  84 #define REG_4E  0x4e    /* Secondary register to read/write */
  85
  86 #define DEV     0x07    /* Register: Logical device select */
  87 #define PME     0x04    /* The device with the fan registers in it */
  88
  89 /* The device with the IT8718F/IT8720F VID value in it */
  90 #define GPIO    0x07
  91
  92 #define DEVID   0x20    /* Register: Device ID */
  93 #define DEVREV  0x22    /* Register: Device Revision */
  94
  95 static inline int superio_inb(int ioreg, int reg)
  96 {
  97         outb(reg, ioreg);
  98         return inb(ioreg + 1);
  99 }
 100
 101 static inline void superio_outb(int ioreg, int reg, int val)
 102 {
 103         outb(reg, ioreg);
 104         outb(val, ioreg + 1);
 105 }
 106
 107 static int superio_inw(int ioreg, int reg)
 108 {
 109         int val;
 110
 111         outb(reg++, ioreg);
 112         val = inb(ioreg + 1) << 8;
 113         outb(reg, ioreg);
 114         val |= inb(ioreg + 1);
 115         return val;
 116 }
 117
 118 static inline void superio_select(int ioreg, int ldn)
 119 {
 120         outb(DEV, ioreg);
 121         outb(ldn, ioreg + 1);
 122 }
 123
 124 static inline int superio_enter(int ioreg)
 125 {
 126         /*
 127          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 128          */
 129         if (!request_muxed_region(ioreg, 2, DRVNAME))
 130                 return -EBUSY;
 131
 132         outb(0x87, ioreg);
 133         outb(0x01, ioreg);
 134         outb(0x55, ioreg);
 135         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 136         return 0;
 137 }
 138
 139 static inline void superio_exit(int ioreg)
 140 {
 141         outb(0x02, ioreg);
 142         outb(0x02, ioreg + 1);
 143         release_region(ioreg, 2);
 144 }
 145
 146 /* Logical device 4 registers */
 147 #define IT8712F_DEVID 0x8712
 148 #define IT8705F_DEVID 0x8705
 149 #define IT8716F_DEVID 0x8716
 150 #define IT8718F_DEVID 0x8718
 151 #define IT8720F_DEVID 0x8720
 152 #define IT8721F_DEVID 0x8721
 153 #define IT8726F_DEVID 0x8726
 154 #define IT8728F_DEVID 0x8728
 155 #define IT8732F_DEVID 0x8732
 156 #define IT8792E_DEVID 0x8733
 157 #define IT8771E_DEVID 0x8771
 158 #define IT8772E_DEVID 0x8772
 159 #define IT8781F_DEVID 0x8781
 160 #define IT8782F_DEVID 0x8782
 161 #define IT8783E_DEVID 0x8783
 162 #define IT8786E_DEVID 0x8786
 163 #define IT8790E_DEVID 0x8790
 164 #define IT8603E_DEVID 0x8603
 165 #define IT8620E_DEVID 0x8620
 166 #define IT8622E_DEVID 0x8622
 167 #define IT8623E_DEVID 0x8623
 168 #define IT8628E_DEVID 0x8628
 169 #define IT87_ACT_REG  0x30
 170 #define IT87_BASE_REG 0x60
 171
 172 /* Logical device 7 registers (IT8712F and later) */
 173 #define IT87_SIO_GPIO1_REG      0x25
 174 #define IT87_SIO_GPIO2_REG      0x26
 175 #define IT87_SIO_GPIO3_REG      0x27
 176 #define IT87_SIO_GPIO4_REG      0x28
 177 #define IT87_SIO_GPIO5_REG      0x29
 178 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 179 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 180 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 181 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 182 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 183
 184 /* Update battery voltage after every reading if true */
 185 static bool update_vbat;
 186
 187 /* Not all BIOSes properly configure the PWM registers */
 188 static bool fix_pwm_polarity;
 189
 190 /* Many IT87 constants specified below */
 191
 192 /* Length of ISA address segment */
 193 #define IT87_EXTENT 8
 194
 195 /* Length of ISA address segment for Environmental Controller */
 196 #define IT87_EC_EXTENT 2
 197
 198 /* Offset of EC registers from ISA base address */
 199 #define IT87_EC_OFFSET 5
 200
 201 /* Where are the ISA address/data registers relative to the EC base address */
 202 #define IT87_ADDR_REG_OFFSET 0
 203 #define IT87_DATA_REG_OFFSET 1
 204
 205 /*----- The IT87 registers -----*/
 206
 207 #define IT87_REG_CONFIG        0x00
 208
 209 #define IT87_REG_ALARM1        0x01
 210 #define IT87_REG_ALARM2        0x02
 211 #define IT87_REG_ALARM3        0x03
 212
 213 /*
 214  * The IT8718F and IT8720F have the VID value in a different register, in
 215  * Super-I/O configuration space.
 216  */
 217 #define IT87_REG_VID           0x0a
 218 /*
 219  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 220  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 221  * mode.
 222  */
 223 #define IT87_REG_FAN_DIV       0x0b
 224 #define IT87_REG_FAN_16BIT     0x0c
 225
 226 /*
 227  * Monitors:
 228  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 229  * - up to 6 temp (1 to 6)
 230  * - up to 6 fan (1 to 6)
 231  */
 232
 233 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 234 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 235 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 236 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 237 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 238
 239 #define IT87_REG_FAN_MAIN_CTRL 0x13
 240 #define IT87_REG_FAN_CTL       0x14
 241 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 242 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 243
 244 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 245                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 246
 247 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 248
 249 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 250 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 251 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 252 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 253
 254 #define IT87_REG_VIN_ENABLE    0x50
 255 #define IT87_REG_TEMP_ENABLE   0x51
 256 #define IT87_REG_TEMP_EXTRA    0x55
 257 #define IT87_REG_BEEP_ENABLE   0x5c
 258
 259 #define IT87_REG_CHIPID        0x58
 260
 261 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 262
 263 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 264 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 265
 266 #define IT87_REG_TEMP456_ENABLE 0x77
 267
 268 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 269 #define NUM_VIN_LIMIT           8
 270 #define NUM_TEMP                6
 271 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 272 #define NUM_TEMP_LIMIT          3
 273 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 274 #define NUM_FAN_DIV             3
 275 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 276 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 277
 278 struct it87_devices {
 279         const char *name;
 280         const char * const suffix;
 281         u32 features;
 282         u8 peci_mask;
 283         u8 old_peci_mask;
 284 };
 285
 286 #define FEAT_12MV_ADC           BIT(0)
 287 #define FEAT_NEWER_AUTOPWM      BIT(1)
 288 #define FEAT_OLD_AUTOPWM        BIT(2)
 289 #define FEAT_16BIT_FANS         BIT(3)
 290 #define FEAT_TEMP_OFFSET        BIT(4)
 291 #define FEAT_TEMP_PECI          BIT(5)
 292 #define FEAT_TEMP_OLD_PECI      BIT(6)
 293 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 294 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 295 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 296 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 297 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 298 #define FEAT_10_9MV_ADC         BIT(12)
 299 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 300 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 301 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 302 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 303 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 304 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 305
 306 static const struct it87_devices it87_devices[] = {
 307         [it87] = {
 308                 .name = "it87",
 309                 .suffix = "F",
 310                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 311         },
 312         [it8712] = {
 313                 .name = "it8712",
 314                 .suffix = "F",
 315                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 316                                                 /* may need to overwrite */
 317         },
 318         [it8716] = {
 319                 .name = "it8716",
 320                 .suffix = "F",
 321                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 322                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 323         },
 324         [it8718] = {
 325                 .name = "it8718",
 326                 .suffix = "F",
 327                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 328                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 329                   | FEAT_PWM_FREQ2,
 330                 .old_peci_mask = 0x4,
 331         },
 332         [it8720] = {
 333                 .name = "it8720",
 334                 .suffix = "F",
 335                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 336                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 337                   | FEAT_PWM_FREQ2,
 338                 .old_peci_mask = 0x4,
 339         },
 340         [it8721] = {
 341                 .name = "it8721",
 342                 .suffix = "F",
 343                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 344                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 345                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 346                   | FEAT_PWM_FREQ2,
 347                 .peci_mask = 0x05,
 348                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 349         },
 350         [it8728] = {
 351                 .name = "it8728",
 352                 .suffix = "F",
 353                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 354                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 355                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 356                 .peci_mask = 0x07,
 357         },
 358         [it8732] = {
 359                 .name = "it8732",
 360                 .suffix = "F",
 361                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 362                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 363                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 364                 .peci_mask = 0x07,
 365                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 366         },
 367         [it8771] = {
 368                 .name = "it8771",
 369                 .suffix = "E",
 370                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 371                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 372                   | FEAT_PWM_FREQ2,
 373                                 /* PECI: guesswork */
 374                                 /* 12mV ADC (OHM) */
 375                                 /* 16 bit fans (OHM) */
 376                                 /* three fans, always 16 bit (guesswork) */
 377                 .peci_mask = 0x07,
 378         },
 379         [it8772] = {
 380                 .name = "it8772",
 381                 .suffix = "E",
 382                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 383                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 384                   | FEAT_PWM_FREQ2,
 385                                 /* PECI (coreboot) */
 386                                 /* 12mV ADC (HWSensors4, OHM) */
 387                                 /* 16 bit fans (HWSensors4, OHM) */
 388                                 /* three fans, always 16 bit (datasheet) */
 389                 .peci_mask = 0x07,
 390         },
 391         [it8781] = {
 392                 .name = "it8781",
 393                 .suffix = "F",
 394                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 395                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 396                 .old_peci_mask = 0x4,
 397         },
 398         [it8782] = {
 399                 .name = "it8782",
 400                 .suffix = "F",
 401                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 402                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 403                 .old_peci_mask = 0x4,
 404         },
 405         [it8783] = {
 406                 .name = "it8783",
 407                 .suffix = "E/F",
 408                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 409                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 410                 .old_peci_mask = 0x4,
 411         },
 412         [it8786] = {
 413                 .name = "it8786",
 414                 .suffix = "E",
 415                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 416                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 417                   | FEAT_PWM_FREQ2,
 418                 .peci_mask = 0x07,
 419         },
 420         [it8790] = {
 421                 .name = "it8790",
 422                 .suffix = "E",
 423                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 424                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 425                   | FEAT_PWM_FREQ2,
 426                 .peci_mask = 0x07,
 427         },
 428         [it8792] = {
 429                 .name = "it8792",
 430                 .suffix = "E",
 431                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 432                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 433                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 434                 .peci_mask = 0x07,
 435                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 436         },
 437         [it8603] = {
 438                 .name = "it8603",
 439                 .suffix = "E",
 440                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 441                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 442                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 443                 .peci_mask = 0x07,
 444         },
 445         [it8620] = {
 446                 .name = "it8620",
 447                 .suffix = "E",
 448                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 449                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 450                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 451                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 452                 .peci_mask = 0x07,
 453         },
 454         [it8622] = {
 455                 .name = "it8622",
 456                 .suffix = "E",
 457                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 458                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 459                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 460                   | FEAT_AVCC3 | FEAT_VIN3_5V,
 461                 .peci_mask = 0x07,
 462         },
 463         [it8628] = {
 464                 .name = "it8628",
 465                 .suffix = "E",
 466                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 467                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 468                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 469                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 470                 .peci_mask = 0x07,
 471         },
 472 };
 473
 474 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 475 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 476 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 477 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 478 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 479 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 480 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 481                                  ((data)->peci_mask & BIT(nr)))
 482 #define has_temp_old_peci(data, nr) \
 483                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 484                                  ((data)->old_peci_mask & BIT(nr)))
 485 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 486 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 487                                                      FEAT_SIX_FANS))
 488 #define has_vid(data)           ((data)->features & FEAT_VID)
 489 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 490 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 491 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 492 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 493                                                      | FEAT_SIX_PWM))
 494 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 495 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 496 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 497 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 498
 499 struct it87_sio_data {
 500         int sioaddr;
 501         enum chips type;
 502         /* Values read from Super-I/O config space */
 503         u8 revision;
 504         u8 vid_value;
 505         u8 beep_pin;
 506         u8 internal;    /* Internal sensors can be labeled */
 507         bool need_in7_reroute;
 508         /* Features skipped based on config or DMI */
 509         u16 skip_in;
 510         u8 skip_vid;
 511         u8 skip_fan;
 512         u8 skip_pwm;
 513         u8 skip_temp;
 514 };
 515
 516 /*
 517  * For each registered chip, we need to keep some data in memory.
 518  * The structure is dynamically allocated.
 519  */
 520 struct it87_data {
 521         const struct attribute_group *groups[7];
 522         int sioaddr;
 523         enum chips type;
 524         u32 features;
 525         u8 peci_mask;
 526         u8 old_peci_mask;
 527
 528         unsigned short addr;
 529         const char *name;
 530         struct mutex update_lock;
 531         char valid;             /* !=0 if following fields are valid */
 532         unsigned long last_updated;     /* In jiffies */
 533
 534         u16 in_scaled;          /* Internal voltage sensors are scaled */
 535         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 536         u16 has_in;             /* Bitfield, voltage sensors enabled */
 537         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 538         bool need_in7_reroute;
 539         u8 has_fan;             /* Bitfield, fans enabled */
 540         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 541         u8 has_temp;            /* Bitfield, temp sensors enabled */
 542         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 543         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 544         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 545         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 546         bool has_vid;           /* True if VID supported */
 547         u8 vid;                 /* Register encoding, combined */
 548         u8 vrm;
 549         u32 alarms;             /* Register encoding, combined */
 550         bool has_beep;          /* true if beep supported */
 551         u8 beeps;               /* Register encoding */
 552         u8 fan_main_ctrl;       /* Register value */
 553         u8 fan_ctl;             /* Register value */
 554
 555         /*
 556          * The following 3 arrays correspond to the same registers up to
 557          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 558          * 7, and we want to preserve settings on mode changes, so we have
 559          * to track all values separately.
 560          * Starting with the IT8721F, the manual PWM duty cycles are stored
 561          * in separate registers (8-bit values), so the separate tracking
 562          * is no longer needed, but it is still done to keep the driver
 563          * simple.
 564          */
 565         u8 has_pwm;             /* Bitfield, pwm control enabled */
 566         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 567         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 568         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 569
 570         /* Automatic fan speed control registers */
 571         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 572         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 573 };
 574
 575 static int adc_lsb(const struct it87_data *data, int nr)
 576 {
 577         int lsb;
 578
 579         if (has_12mv_adc(data))
 580                 lsb = 120;
 581         else if (has_10_9mv_adc(data))
 582                 lsb = 109;
 583         else
 584                 lsb = 160;
 585         if (data->in_scaled & BIT(nr))
 586                 lsb <<= 1;
 587         return lsb;
 588 }
 589
 590 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 591 {
 592         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 593         return clamp_val(val, 0, 255);
 594 }
 595
 596 static int in_from_reg(const struct it87_data *data, int nr, int val)
 597 {
 598         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 599 }
 600
 601 static inline u8 FAN_TO_REG(long rpm, int div)
 602 {
 603         if (rpm == 0)
 604                 return 255;
 605         rpm = clamp_val(rpm, 1, 1000000);
 606         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 607 }
 608
 609 static inline u16 FAN16_TO_REG(long rpm)
 610 {
 611         if (rpm == 0)
 612                 return 0xffff;
 613         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 614 }
 615
 616 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 617                                 1350000 / ((val) * (div)))
 618 /* The divider is fixed to 2 in 16-bit mode */
 619 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 620                              1350000 / ((val) * 2))
 621
 622 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 623                                     ((val) + 500) / 1000), -128, 127))
 624 #define TEMP_FROM_REG(val) ((val) * 1000)
 625
 626 static u8 pwm_to_reg(const struct it87_data *data, long val)
 627 {
 628         if (has_newer_autopwm(data))
 629                 return val;
 630         else
 631                 return val >> 1;
 632 }
 633
 634 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 635 {
 636         if (has_newer_autopwm(data))
 637                 return reg;
 638         else
 639                 return (reg & 0x7f) << 1;
 640 }
 641
 642 static int DIV_TO_REG(int val)
 643 {
 644         int answer = 0;
 645
 646         while (answer < 7 && (val >>= 1))
 647                 answer++;
 648         return answer;
 649 }
 650
 651 #define DIV_FROM_REG(val) BIT(val)
 652
 653 /*
 654  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 655  * depending on the chip type, to calculate the actual PWM frequency.
 656  *
 657  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 658  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 659  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 660  * sometimes just one. It is unknown if this is a datasheet error or real,
 661  * so this is ignored for now.
 662  */
 663 static const unsigned int pwm_freq[8] = {
 664         48000000,
 665         24000000,
 666         12000000,
 667         8000000,
 668         6000000,
 669         3000000,
 670         1500000,
 671         750000,
 672 };
 673
 674 /*
 675  * Must be called with data->update_lock held, except during initialization.
 676  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 677  * would slow down the IT87 access and should not be necessary.
 678  */
 679 static int it87_read_value(struct it87_data *data, u8 reg)
 680 {
 681         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 682         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 683 }
 684
 685 /*
 686  * Must be called with data->update_lock held, except during initialization.
 687  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 688  * would slow down the IT87 access and should not be necessary.
 689  */
 690 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 691 {
 692         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 693         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 694 }
 695
 696 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 697 {
 698         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 699         if (has_newer_autopwm(data)) {
 700                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 701                 data->pwm_duty[nr] = it87_read_value(data,
 702                                                      IT87_REG_PWM_DUTY[nr]);
 703         } else {
 704                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 705                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 706                 else                            /* Manual mode */
 707                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 708         }
 709
 710         if (has_old_autopwm(data)) {
 711                 int i;
 712
 713                 for (i = 0; i < 5 ; i++)
 714                         data->auto_temp[nr][i] = it87_read_value(data,
 715                                                 IT87_REG_AUTO_TEMP(nr, i));
 716                 for (i = 0; i < 3 ; i++)
 717                         data->auto_pwm[nr][i] = it87_read_value(data,
 718                                                 IT87_REG_AUTO_PWM(nr, i));
 719         } else if (has_newer_autopwm(data)) {
 720                 int i;
 721
 722                 /*
 723                  * 0: temperature hysteresis (base + 5)
 724                  * 1: fan off temperature (base + 0)
 725                  * 2: fan start temperature (base + 1)
 726                  * 3: fan max temperature (base + 2)
 727                  */
 728                 data->auto_temp[nr][0] =
 729                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 730
 731                 for (i = 0; i < 3 ; i++)
 732                         data->auto_temp[nr][i + 1] =
 733                                 it87_read_value(data,
 734                                                 IT87_REG_AUTO_TEMP(nr, i));
 735                 /*
 736                  * 0: start pwm value (base + 3)
 737                  * 1: pwm slope (base + 4, 1/8th pwm)
 738                  */
 739                 data->auto_pwm[nr][0] =
 740                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 741                 data->auto_pwm[nr][1] =
 742                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 743         }
 744 }
 745
 746 static struct it87_data *it87_update_device(struct device *dev)
 747 {
 748         struct it87_data *data = dev_get_drvdata(dev);
 749         int i;
 750
 751         mutex_lock(&data->update_lock);
 752
 753         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 754             !data->valid) {
 755                 if (update_vbat) {
 756                         /*
 757                          * Cleared after each update, so reenable.  Value
 758                          * returned by this read will be previous value
 759                          */
 760                         it87_write_value(data, IT87_REG_CONFIG,
 761                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 762                 }
 763                 for (i = 0; i < NUM_VIN; i++) {
 764                         if (!(data->has_in & BIT(i)))
 765                                 continue;
 766
 767                         data->in[i][0] =
 768                                 it87_read_value(data, IT87_REG_VIN[i]);
 769
 770                         /* VBAT and AVCC don't have limit registers */
 771                         if (i >= NUM_VIN_LIMIT)
 772                                 continue;
 773
 774                         data->in[i][1] =
 775                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 776                         data->in[i][2] =
 777                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 778                 }
 779
 780                 for (i = 0; i < NUM_FAN; i++) {
 781                         /* Skip disabled fans */
 782                         if (!(data->has_fan & BIT(i)))
 783                                 continue;
 784
 785                         data->fan[i][1] =
 786                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 787                         data->fan[i][0] = it87_read_value(data,
 788                                        IT87_REG_FAN[i]);
 789                         /* Add high byte if in 16-bit mode */
 790                         if (has_16bit_fans(data)) {
 791                                 data->fan[i][0] |= it87_read_value(data,
 792                                                 IT87_REG_FANX[i]) << 8;
 793                                 data->fan[i][1] |= it87_read_value(data,
 794                                                 IT87_REG_FANX_MIN[i]) << 8;
 795                         }
 796                 }
 797                 for (i = 0; i < NUM_TEMP; i++) {
 798                         if (!(data->has_temp & BIT(i)))
 799                                 continue;
 800                         data->temp[i][0] =
 801                                 it87_read_value(data, IT87_REG_TEMP(i));
 802
 803                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 804                                 data->temp[i][3] =
 805                                   it87_read_value(data,
 806                                                   IT87_REG_TEMP_OFFSET[i]);
 807
 808                         if (i >= NUM_TEMP_LIMIT)
 809                                 continue;
 810
 811                         data->temp[i][1] =
 812                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 813                         data->temp[i][2] =
 814                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 815                 }
 816
 817                 /* Newer chips don't have clock dividers */
 818                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 819                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 820                         data->fan_div[0] = i & 0x07;
 821                         data->fan_div[1] = (i >> 3) & 0x07;
 822                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 823                 }
 824
 825                 data->alarms =
 826                         it87_read_value(data, IT87_REG_ALARM1) |
 827                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 828                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 829                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 830
 831                 data->fan_main_ctrl = it87_read_value(data,
 832                                 IT87_REG_FAN_MAIN_CTRL);
 833                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 834                 for (i = 0; i < NUM_PWM; i++) {
 835                         if (!(data->has_pwm & BIT(i)))
 836                                 continue;
 837                         it87_update_pwm_ctrl(data, i);
 838                 }
 839
 840                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 841                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 842                 /*
 843                  * The IT8705F does not have VID capability.
 844                  * The IT8718F and later don't use IT87_REG_VID for the
 845                  * same purpose.
 846                  */
 847                 if (data->type == it8712 || data->type == it8716) {
 848                         data->vid = it87_read_value(data, IT87_REG_VID);
 849                         /*
 850                          * The older IT8712F revisions had only 5 VID pins,
 851                          * but we assume it is always safe to read 6 bits.
 852                          */
 853                         data->vid &= 0x3f;
 854                 }
 855                 data->last_updated = jiffies;
 856                 data->valid = 1;
 857         }
 858
 859         mutex_unlock(&data->update_lock);
 860
 861         return data;
 862 }
 863
 864 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 865                        char *buf)
 866 {
 867         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 868         struct it87_data *data = it87_update_device(dev);
 869         int index = sattr->index;
 870         int nr = sattr->nr;
 871
 872         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 873 }
 874
 875 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 876                       const char *buf, size_t count)
 877 {
 878         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 879         struct it87_data *data = dev_get_drvdata(dev);
 880         int index = sattr->index;
 881         int nr = sattr->nr;
 882         unsigned long val;
 883
 884         if (kstrtoul(buf, 10, &val) < 0)
 885                 return -EINVAL;
 886
 887         mutex_lock(&data->update_lock);
 888         data->in[nr][index] = in_to_reg(data, nr, val);
 889         it87_write_value(data,
 890                          index == 1 ? IT87_REG_VIN_MIN(nr)
 891                                     : IT87_REG_VIN_MAX(nr),
 892                          data->in[nr][index]);
 893         mutex_unlock(&data->update_lock);
 894         return count;
 895 }
 896
 897 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 898 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 899                             0, 1);
 900 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 901                             0, 2);
 902
 903 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 904 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 905                             1, 1);
 906 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 907                             1, 2);
 908
 909 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 910 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 911                             2, 1);
 912 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 913                             2, 2);
 914
 915 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 916 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 917                             3, 1);
 918 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 919                             3, 2);
 920
 921 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 922 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 923                             4, 1);
 924 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 925                             4, 2);
 926
 927 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 928 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 929                             5, 1);
 930 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 931                             5, 2);
 932
 933 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 934 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 935                             6, 1);
 936 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 937                             6, 2);
 938
 939 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 940 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 941                             7, 1);
 942 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 943                             7, 2);
 944
 945 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
 946 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
 947 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
 948 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
 949 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
 950
 951 /* Up to 6 temperatures */
 952 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 953                          char *buf)
 954 {
 955         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 956         int nr = sattr->nr;
 957         int index = sattr->index;
 958         struct it87_data *data = it87_update_device(dev);
 959
 960         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
 961 }
 962
 963 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 964                         const char *buf, size_t count)
 965 {
 966         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 967         int nr = sattr->nr;
 968         int index = sattr->index;
 969         struct it87_data *data = dev_get_drvdata(dev);
 970         long val;
 971         u8 reg, regval;
 972
 973         if (kstrtol(buf, 10, &val) < 0)
 974                 return -EINVAL;
 975
 976         mutex_lock(&data->update_lock);
 977
 978         switch (index) {
 979         default:
 980         case 1:
 981                 reg = IT87_REG_TEMP_LOW(nr);
 982                 break;
 983         case 2:
 984                 reg = IT87_REG_TEMP_HIGH(nr);
 985                 break;
 986         case 3:
 987                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 988                 if (!(regval & 0x80)) {
 989                         regval |= 0x80;
 990                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
 991                 }
 992                 data->valid = 0;
 993                 reg = IT87_REG_TEMP_OFFSET[nr];
 994                 break;
 995         }
 996
 997         data->temp[nr][index] = TEMP_TO_REG(val);
 998         it87_write_value(data, reg, data->temp[nr][index]);
 999         mutex_unlock(&data->update_lock);
1000         return count;
1001 }
1002
1003 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1004 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1005                             0, 1);
1006 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1007                             0, 2);
1008 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1009                             set_temp, 0, 3);
1010 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1011 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1012                             1, 1);
1013 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1014                             1, 2);
1015 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1016                             set_temp, 1, 3);
1017 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1018 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1019                             2, 1);
1020 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1021                             2, 2);
1022 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1023                             set_temp, 2, 3);
1024 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1025 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1026 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1027
1028 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1029                               char *buf)
1030 {
1031         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1032         int nr = sensor_attr->index;
1033         struct it87_data *data = it87_update_device(dev);
1034         u8 reg = data->sensor;      /* In case value is updated while used */
1035         u8 extra = data->extra;
1036
1037         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1038             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1039                 return sprintf(buf, "6\n");  /* Intel PECI */
1040         if (reg & (1 << nr))
1041                 return sprintf(buf, "3\n");  /* thermal diode */
1042         if (reg & (8 << nr))
1043                 return sprintf(buf, "4\n");  /* thermistor */
1044         return sprintf(buf, "0\n");      /* disabled */
1045 }
1046
1047 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1048                              const char *buf, size_t count)
1049 {
1050         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1051         int nr = sensor_attr->index;
1052
1053         struct it87_data *data = dev_get_drvdata(dev);
1054         long val;
1055         u8 reg, extra;
1056
1057         if (kstrtol(buf, 10, &val) < 0)
1058                 return -EINVAL;
1059
1060         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1061         reg &= ~(1 << nr);
1062         reg &= ~(8 << nr);
1063         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1064                 reg &= 0x3f;
1065         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1066         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1067                 extra &= 0x7f;
1068         if (val == 2) { /* backwards compatibility */
1069                 dev_warn(dev,
1070                          "Sensor type 2 is deprecated, please use 4 instead\n");
1071                 val = 4;
1072         }
1073         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1074         if (val == 3)
1075                 reg |= 1 << nr;
1076         else if (val == 4)
1077                 reg |= 8 << nr;
1078         else if (has_temp_peci(data, nr) && val == 6)
1079                 reg |= (nr + 1) << 6;
1080         else if (has_temp_old_peci(data, nr) && val == 6)
1081                 extra |= 0x80;
1082         else if (val != 0)
1083                 return -EINVAL;
1084
1085         mutex_lock(&data->update_lock);
1086         data->sensor = reg;
1087         data->extra = extra;
1088         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1089         if (has_temp_old_peci(data, nr))
1090                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1091         data->valid = 0;        /* Force cache refresh */
1092         mutex_unlock(&data->update_lock);
1093         return count;
1094 }
1095
1096 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1097                           set_temp_type, 0);
1098 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1099                           set_temp_type, 1);
1100 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1101                           set_temp_type, 2);
1102
1103 /* 6 Fans */
1104
1105 static int pwm_mode(const struct it87_data *data, int nr)
1106 {
1107         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1108                 return 0;                               /* Full speed */
1109         if (data->pwm_ctrl[nr] & 0x80)
1110                 return 2;                               /* Automatic mode */
1111         if ((data->type == it8603 || nr >= 3) &&
1112             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1113                 return 0;                       /* Full speed */
1114
1115         return 1;                               /* Manual mode */
1116 }
1117
1118 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1119                         char *buf)
1120 {
1121         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1122         int nr = sattr->nr;
1123         int index = sattr->index;
1124         int speed;
1125         struct it87_data *data = it87_update_device(dev);
1126
1127         speed = has_16bit_fans(data) ?
1128                 FAN16_FROM_REG(data->fan[nr][index]) :
1129                 FAN_FROM_REG(data->fan[nr][index],
1130                              DIV_FROM_REG(data->fan_div[nr]));
1131         return sprintf(buf, "%d\n", speed);
1132 }
1133
1134 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1135                             char *buf)
1136 {
1137         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1138         struct it87_data *data = it87_update_device(dev);
1139         int nr = sensor_attr->index;
1140
1141         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1142 }
1143
1144 static ssize_t show_pwm_enable(struct device *dev,
1145                                struct device_attribute *attr, char *buf)
1146 {
1147         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1148         struct it87_data *data = it87_update_device(dev);
1149         int nr = sensor_attr->index;
1150
1151         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1152 }
1153
1154 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1155                         char *buf)
1156 {
1157         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1158         struct it87_data *data = it87_update_device(dev);
1159         int nr = sensor_attr->index;
1160
1161         return sprintf(buf, "%d\n",
1162                        pwm_from_reg(data, data->pwm_duty[nr]));
1163 }
1164
1165 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1166                              char *buf)
1167 {
1168         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1169         struct it87_data *data = it87_update_device(dev);
1170         int nr = sensor_attr->index;
1171         unsigned int freq;
1172         int index;
1173
1174         if (has_pwm_freq2(data) && nr == 1)
1175                 index = (data->extra >> 4) & 0x07;
1176         else
1177                 index = (data->fan_ctl >> 4) & 0x07;
1178
1179         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1180
1181         return sprintf(buf, "%u\n", freq);
1182 }
1183
1184 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1185                        const char *buf, size_t count)
1186 {
1187         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1188         int nr = sattr->nr;
1189         int index = sattr->index;
1190
1191         struct it87_data *data = dev_get_drvdata(dev);
1192         long val;
1193         u8 reg;
1194
1195         if (kstrtol(buf, 10, &val) < 0)
1196                 return -EINVAL;
1197
1198         mutex_lock(&data->update_lock);
1199
1200         if (has_16bit_fans(data)) {
1201                 data->fan[nr][index] = FAN16_TO_REG(val);
1202                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1203                                  data->fan[nr][index] & 0xff);
1204                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1205                                  data->fan[nr][index] >> 8);
1206         } else {
1207                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1208                 switch (nr) {
1209                 case 0:
1210                         data->fan_div[nr] = reg & 0x07;
1211                         break;
1212                 case 1:
1213                         data->fan_div[nr] = (reg >> 3) & 0x07;
1214                         break;
1215                 case 2:
1216                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1217                         break;
1218                 }
1219                 data->fan[nr][index] =
1220                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1221                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1222                                  data->fan[nr][index]);
1223         }
1224
1225         mutex_unlock(&data->update_lock);
1226         return count;
1227 }
1228
1229 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1230                            const char *buf, size_t count)
1231 {
1232         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1233         struct it87_data *data = dev_get_drvdata(dev);
1234         int nr = sensor_attr->index;
1235         unsigned long val;
1236         int min;
1237         u8 old;
1238
1239         if (kstrtoul(buf, 10, &val) < 0)
1240                 return -EINVAL;
1241
1242         mutex_lock(&data->update_lock);
1243         old = it87_read_value(data, IT87_REG_FAN_DIV);
1244
1245         /* Save fan min limit */
1246         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1247
1248         switch (nr) {
1249         case 0:
1250         case 1:
1251                 data->fan_div[nr] = DIV_TO_REG(val);
1252                 break;
1253         case 2:
1254                 if (val < 8)
1255                         data->fan_div[nr] = 1;
1256                 else
1257                         data->fan_div[nr] = 3;
1258         }
1259         val = old & 0x80;
1260         val |= (data->fan_div[0] & 0x07);
1261         val |= (data->fan_div[1] & 0x07) << 3;
1262         if (data->fan_div[2] == 3)
1263                 val |= 0x1 << 6;
1264         it87_write_value(data, IT87_REG_FAN_DIV, val);
1265
1266         /* Restore fan min limit */
1267         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1268         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1269
1270         mutex_unlock(&data->update_lock);
1271         return count;
1272 }
1273
1274 /* Returns 0 if OK, -EINVAL otherwise */
1275 static int check_trip_points(struct device *dev, int nr)
1276 {
1277         const struct it87_data *data = dev_get_drvdata(dev);
1278         int i, err = 0;
1279
1280         if (has_old_autopwm(data)) {
1281                 for (i = 0; i < 3; i++) {
1282                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1283                                 err = -EINVAL;
1284                 }
1285                 for (i = 0; i < 2; i++) {
1286                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1287                                 err = -EINVAL;
1288                 }
1289         } else if (has_newer_autopwm(data)) {
1290                 for (i = 1; i < 3; i++) {
1291                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1292                                 err = -EINVAL;
1293                 }
1294         }
1295
1296         if (err) {
1297                 dev_err(dev,
1298                         "Inconsistent trip points, not switching to automatic mode\n");
1299                 dev_err(dev, "Adjust the trip points and try again\n");
1300         }
1301         return err;
1302 }
1303
1304 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1305                               const char *buf, size_t count)
1306 {
1307         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1308         struct it87_data *data = dev_get_drvdata(dev);
1309         int nr = sensor_attr->index;
1310         long val;
1311
1312         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1313                 return -EINVAL;
1314
1315         /* Check trip points before switching to automatic mode */
1316         if (val == 2) {
1317                 if (check_trip_points(dev, nr) < 0)
1318                         return -EINVAL;
1319         }
1320
1321         mutex_lock(&data->update_lock);
1322
1323         if (val == 0) {
1324                 if (nr < 3 && data->type != it8603) {
1325                         int tmp;
1326                         /* make sure the fan is on when in on/off mode */
1327                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1328                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1329                         /* set on/off mode */
1330                         data->fan_main_ctrl &= ~BIT(nr);
1331                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1332                                          data->fan_main_ctrl);
1333                 } else {
1334                         u8 ctrl;
1335
1336                         /* No on/off mode, set maximum pwm value */
1337                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1338                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1339                                          data->pwm_duty[nr]);
1340                         /* and set manual mode */
1341                         if (has_newer_autopwm(data)) {
1342                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1343                                         data->pwm_temp_map[nr];
1344                         } else {
1345                                 ctrl = data->pwm_duty[nr];
1346                         }
1347                         data->pwm_ctrl[nr] = ctrl;
1348                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1349                 }
1350         } else {
1351                 u8 ctrl;
1352
1353                 if (has_newer_autopwm(data)) {
1354                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1355                                 data->pwm_temp_map[nr];
1356                         if (val != 1)
1357                                 ctrl |= 0x80;
1358                 } else {
1359                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1360                 }
1361                 data->pwm_ctrl[nr] = ctrl;
1362                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1363
1364                 if (data->type != it8603 && nr < 3) {
1365                         /* set SmartGuardian mode */
1366                         data->fan_main_ctrl |= BIT(nr);
1367                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1368                                          data->fan_main_ctrl);
1369                 }
1370         }
1371
1372         mutex_unlock(&data->update_lock);
1373         return count;
1374 }
1375
1376 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1377                        const char *buf, size_t count)
1378 {
1379         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1380         struct it87_data *data = dev_get_drvdata(dev);
1381         int nr = sensor_attr->index;
1382         long val;
1383
1384         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1385                 return -EINVAL;
1386
1387         mutex_lock(&data->update_lock);
1388         it87_update_pwm_ctrl(data, nr);
1389         if (has_newer_autopwm(data)) {
1390                 /*
1391                  * If we are in automatic mode, the PWM duty cycle register
1392                  * is read-only so we can't write the value.
1393                  */
1394                 if (data->pwm_ctrl[nr] & 0x80) {
1395                         mutex_unlock(&data->update_lock);
1396                         return -EBUSY;
1397                 }
1398                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1399                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1400                                  data->pwm_duty[nr]);
1401         } else {
1402                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1403                 /*
1404                  * If we are in manual mode, write the duty cycle immediately;
1405                  * otherwise, just store it for later use.
1406                  */
1407                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1408                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1409                         it87_write_value(data, IT87_REG_PWM[nr],
1410                                          data->pwm_ctrl[nr]);
1411                 }
1412         }
1413         mutex_unlock(&data->update_lock);
1414         return count;
1415 }
1416
1417 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1418                             const char *buf, size_t count)
1419 {
1420         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1421         struct it87_data *data = dev_get_drvdata(dev);
1422         int nr = sensor_attr->index;
1423         unsigned long val;
1424         int i;
1425
1426         if (kstrtoul(buf, 10, &val) < 0)
1427                 return -EINVAL;
1428
1429         val = clamp_val(val, 0, 1000000);
1430         val *= has_newer_autopwm(data) ? 256 : 128;
1431
1432         /* Search for the nearest available frequency */
1433         for (i = 0; i < 7; i++) {
1434                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1435                         break;
1436         }
1437
1438         mutex_lock(&data->update_lock);
1439         if (nr == 0) {
1440                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1441                 data->fan_ctl |= i << 4;
1442                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1443         } else {
1444                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1445                 data->extra |= i << 4;
1446                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1447         }
1448         mutex_unlock(&data->update_lock);
1449
1450         return count;
1451 }
1452
1453 static ssize_t show_pwm_temp_map(struct device *dev,
1454                                  struct device_attribute *attr, char *buf)
1455 {
1456         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1457         struct it87_data *data = it87_update_device(dev);
1458         int nr = sensor_attr->index;
1459         int map;
1460
1461         map = data->pwm_temp_map[nr];
1462         if (map >= 3)
1463                 map = 0;        /* Should never happen */
1464         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1465                 map += 3;
1466
1467         return sprintf(buf, "%d\n", (int)BIT(map));
1468 }
1469
1470 static ssize_t set_pwm_temp_map(struct device *dev,
1471                                 struct device_attribute *attr, const char *buf,
1472                                 size_t count)
1473 {
1474         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1475         struct it87_data *data = dev_get_drvdata(dev);
1476         int nr = sensor_attr->index;
1477         long val;
1478         u8 reg;
1479
1480         if (kstrtol(buf, 10, &val) < 0)
1481                 return -EINVAL;
1482
1483         if (nr >= 3)
1484                 val -= 3;
1485
1486         switch (val) {
1487         case BIT(0):
1488                 reg = 0x00;
1489                 break;
1490         case BIT(1):
1491                 reg = 0x01;
1492                 break;
1493         case BIT(2):
1494                 reg = 0x02;
1495                 break;
1496         default:
1497                 return -EINVAL;
1498         }
1499
1500         mutex_lock(&data->update_lock);
1501         it87_update_pwm_ctrl(data, nr);
1502         data->pwm_temp_map[nr] = reg;
1503         /*
1504          * If we are in automatic mode, write the temp mapping immediately;
1505          * otherwise, just store it for later use.
1506          */
1507         if (data->pwm_ctrl[nr] & 0x80) {
1508                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1509                                                 data->pwm_temp_map[nr];
1510                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1511         }
1512         mutex_unlock(&data->update_lock);
1513         return count;
1514 }
1515
1516 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1517                              char *buf)
1518 {
1519         struct it87_data *data = it87_update_device(dev);
1520         struct sensor_device_attribute_2 *sensor_attr =
1521                         to_sensor_dev_attr_2(attr);
1522         int nr = sensor_attr->nr;
1523         int point = sensor_attr->index;
1524
1525         return sprintf(buf, "%d\n",
1526                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1527 }
1528
1529 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1530                             const char *buf, size_t count)
1531 {
1532         struct it87_data *data = dev_get_drvdata(dev);
1533         struct sensor_device_attribute_2 *sensor_attr =
1534                         to_sensor_dev_attr_2(attr);
1535         int nr = sensor_attr->nr;
1536         int point = sensor_attr->index;
1537         int regaddr;
1538         long val;
1539
1540         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1541                 return -EINVAL;
1542
1543         mutex_lock(&data->update_lock);
1544         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1545         if (has_newer_autopwm(data))
1546                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1547         else
1548                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1549         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1550         mutex_unlock(&data->update_lock);
1551         return count;
1552 }
1553
1554 static ssize_t show_auto_pwm_slope(struct device *dev,
1555                                    struct device_attribute *attr, char *buf)
1556 {
1557         struct it87_data *data = it87_update_device(dev);
1558         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1559         int nr = sensor_attr->index;
1560
1561         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1562 }
1563
1564 static ssize_t set_auto_pwm_slope(struct device *dev,
1565                                   struct device_attribute *attr,
1566                                   const char *buf, size_t count)
1567 {
1568         struct it87_data *data = dev_get_drvdata(dev);
1569         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1570         int nr = sensor_attr->index;
1571         unsigned long val;
1572
1573         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1574                 return -EINVAL;
1575
1576         mutex_lock(&data->update_lock);
1577         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1578         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1579                          data->auto_pwm[nr][1]);
1580         mutex_unlock(&data->update_lock);
1581         return count;
1582 }
1583
1584 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1585                               char *buf)
1586 {
1587         struct it87_data *data = it87_update_device(dev);
1588         struct sensor_device_attribute_2 *sensor_attr =
1589                         to_sensor_dev_attr_2(attr);
1590         int nr = sensor_attr->nr;
1591         int point = sensor_attr->index;
1592         int reg;
1593
1594         if (has_old_autopwm(data) || point)
1595                 reg = data->auto_temp[nr][point];
1596         else
1597                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1598
1599         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1600 }
1601
1602 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1603                              const char *buf, size_t count)
1604 {
1605         struct it87_data *data = dev_get_drvdata(dev);
1606         struct sensor_device_attribute_2 *sensor_attr =
1607                         to_sensor_dev_attr_2(attr);
1608         int nr = sensor_attr->nr;
1609         int point = sensor_attr->index;
1610         long val;
1611         int reg;
1612
1613         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1614                 return -EINVAL;
1615
1616         mutex_lock(&data->update_lock);
1617         if (has_newer_autopwm(data) && !point) {
1618                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1619                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1620                 data->auto_temp[nr][0] = reg;
1621                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1622         } else {
1623                 reg = TEMP_TO_REG(val);
1624                 data->auto_temp[nr][point] = reg;
1625                 if (has_newer_autopwm(data))
1626                         point--;
1627                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1628         }
1629         mutex_unlock(&data->update_lock);
1630         return count;
1631 }
1632
1633 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1634 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1635                             0, 1);
1636 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1637                           set_fan_div, 0);
1638
1639 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1640 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1641                             1, 1);
1642 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1643                           set_fan_div, 1);
1644
1645 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1646 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1647                             2, 1);
1648 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1649                           set_fan_div, 2);
1650
1651 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1652 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1653                             3, 1);
1654
1655 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1656 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1657                             4, 1);
1658
1659 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1660 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1661                             5, 1);
1662
1663 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1664                           show_pwm_enable, set_pwm_enable, 0);
1665 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1666 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1667                           set_pwm_freq, 0);
1668 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1669                           show_pwm_temp_map, set_pwm_temp_map, 0);
1670 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1671                             show_auto_pwm, set_auto_pwm, 0, 0);
1672 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1673                             show_auto_pwm, set_auto_pwm, 0, 1);
1674 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1675                             show_auto_pwm, set_auto_pwm, 0, 2);
1676 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1677                             show_auto_pwm, NULL, 0, 3);
1678 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1679                             show_auto_temp, set_auto_temp, 0, 1);
1680 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1681                             show_auto_temp, set_auto_temp, 0, 0);
1682 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1683                             show_auto_temp, set_auto_temp, 0, 2);
1684 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1685                             show_auto_temp, set_auto_temp, 0, 3);
1686 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1687                             show_auto_temp, set_auto_temp, 0, 4);
1688 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1689                             show_auto_pwm, set_auto_pwm, 0, 0);
1690 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1691                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1692
1693 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1694                           show_pwm_enable, set_pwm_enable, 1);
1695 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1696 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1697 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1698                           show_pwm_temp_map, set_pwm_temp_map, 1);
1699 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1700                             show_auto_pwm, set_auto_pwm, 1, 0);
1701 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1702                             show_auto_pwm, set_auto_pwm, 1, 1);
1703 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1704                             show_auto_pwm, set_auto_pwm, 1, 2);
1705 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1706                             show_auto_pwm, NULL, 1, 3);
1707 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1708                             show_auto_temp, set_auto_temp, 1, 1);
1709 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1710                             show_auto_temp, set_auto_temp, 1, 0);
1711 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1712                             show_auto_temp, set_auto_temp, 1, 2);
1713 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1714                             show_auto_temp, set_auto_temp, 1, 3);
1715 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1716                             show_auto_temp, set_auto_temp, 1, 4);
1717 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1718                             show_auto_pwm, set_auto_pwm, 1, 0);
1719 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1720                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1721
1722 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1723                           show_pwm_enable, set_pwm_enable, 2);
1724 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1725 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1726 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1727                           show_pwm_temp_map, set_pwm_temp_map, 2);
1728 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1729                             show_auto_pwm, set_auto_pwm, 2, 0);
1730 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1731                             show_auto_pwm, set_auto_pwm, 2, 1);
1732 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1733                             show_auto_pwm, set_auto_pwm, 2, 2);
1734 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1735                             show_auto_pwm, NULL, 2, 3);
1736 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1737                             show_auto_temp, set_auto_temp, 2, 1);
1738 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1739                             show_auto_temp, set_auto_temp, 2, 0);
1740 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1741                             show_auto_temp, set_auto_temp, 2, 2);
1742 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1743                             show_auto_temp, set_auto_temp, 2, 3);
1744 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1745                             show_auto_temp, set_auto_temp, 2, 4);
1746 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1747                             show_auto_pwm, set_auto_pwm, 2, 0);
1748 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1749                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1750
1751 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1752                           show_pwm_enable, set_pwm_enable, 3);
1753 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1754 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1755 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1756                           show_pwm_temp_map, set_pwm_temp_map, 3);
1757 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1758                             show_auto_temp, set_auto_temp, 2, 1);
1759 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1760                             show_auto_temp, set_auto_temp, 2, 0);
1761 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1762                             show_auto_temp, set_auto_temp, 2, 2);
1763 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1764                             show_auto_temp, set_auto_temp, 2, 3);
1765 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1766                             show_auto_pwm, set_auto_pwm, 3, 0);
1767 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1768                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1769
1770 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1771                           show_pwm_enable, set_pwm_enable, 4);
1772 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1773 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1774 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1775                           show_pwm_temp_map, set_pwm_temp_map, 4);
1776 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1777                             show_auto_temp, set_auto_temp, 2, 1);
1778 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1779                             show_auto_temp, set_auto_temp, 2, 0);
1780 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1781                             show_auto_temp, set_auto_temp, 2, 2);
1782 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1783                             show_auto_temp, set_auto_temp, 2, 3);
1784 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1785                             show_auto_pwm, set_auto_pwm, 4, 0);
1786 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1787                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1788
1789 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1790                           show_pwm_enable, set_pwm_enable, 5);
1791 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1792 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1793 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1794                           show_pwm_temp_map, set_pwm_temp_map, 5);
1795 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1796                             show_auto_temp, set_auto_temp, 2, 1);
1797 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1798                             show_auto_temp, set_auto_temp, 2, 0);
1799 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1800                             show_auto_temp, set_auto_temp, 2, 2);
1801 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1802                             show_auto_temp, set_auto_temp, 2, 3);
1803 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1804                             show_auto_pwm, set_auto_pwm, 5, 0);
1805 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1806                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1807
1808 /* Alarms */
1809 static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1810                            char *buf)
1811 {
1812         struct it87_data *data = it87_update_device(dev);
1813
1814         return sprintf(buf, "%u\n", data->alarms);
1815 }
1816 static DEVICE_ATTR_RO(alarms);
1817
1818 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1819                           char *buf)
1820 {
1821         struct it87_data *data = it87_update_device(dev);
1822         int bitnr = to_sensor_dev_attr(attr)->index;
1823
1824         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1825 }
1826
1827 static ssize_t clear_intrusion(struct device *dev,
1828                                struct device_attribute *attr, const char *buf,
1829                                size_t count)
1830 {
1831         struct it87_data *data = dev_get_drvdata(dev);
1832         int config;
1833         long val;
1834
1835         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1836                 return -EINVAL;
1837
1838         mutex_lock(&data->update_lock);
1839         config = it87_read_value(data, IT87_REG_CONFIG);
1840         if (config < 0) {
1841                 count = config;
1842         } else {
1843                 config |= BIT(5);
1844                 it87_write_value(data, IT87_REG_CONFIG, config);
1845                 /* Invalidate cache to force re-read */
1846                 data->valid = 0;
1847         }
1848         mutex_unlock(&data->update_lock);
1849
1850         return count;
1851 }
1852
1853 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1854 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1855 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1856 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1857 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1858 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1859 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1860 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1861 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1862 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1863 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1864 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1865 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1866 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1867 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1868 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1869 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1870 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1871                           show_alarm, clear_intrusion, 4);
1872
1873 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1874                          char *buf)
1875 {
1876         struct it87_data *data = it87_update_device(dev);
1877         int bitnr = to_sensor_dev_attr(attr)->index;
1878
1879         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1880 }
1881
1882 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1883                         const char *buf, size_t count)
1884 {
1885         int bitnr = to_sensor_dev_attr(attr)->index;
1886         struct it87_data *data = dev_get_drvdata(dev);
1887         long val;
1888
1889         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1890                 return -EINVAL;
1891
1892         mutex_lock(&data->update_lock);
1893         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1894         if (val)
1895                 data->beeps |= BIT(bitnr);
1896         else
1897                 data->beeps &= ~BIT(bitnr);
1898         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1899         mutex_unlock(&data->update_lock);
1900         return count;
1901 }
1902
1903 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1904                           show_beep, set_beep, 1);
1905 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1906 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1907 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1908 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1909 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1910 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1911 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1912 /* fanX_beep writability is set later */
1913 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1914 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1915 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1916 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1917 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1918 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1919 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1920                           show_beep, set_beep, 2);
1921 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1922 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1923
1924 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1925                         char *buf)
1926 {
1927         struct it87_data *data = dev_get_drvdata(dev);
1928
1929         return sprintf(buf, "%u\n", data->vrm);
1930 }
1931
1932 static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1933                          const char *buf, size_t count)
1934 {
1935         struct it87_data *data = dev_get_drvdata(dev);
1936         unsigned long val;
1937
1938         if (kstrtoul(buf, 10, &val) < 0)
1939                 return -EINVAL;
1940
1941         data->vrm = val;
1942
1943         return count;
1944 }
1945 static DEVICE_ATTR_RW(vrm);
1946
1947 static ssize_t cpu0_vid_show(struct device *dev,
1948                              struct device_attribute *attr, char *buf)
1949 {
1950         struct it87_data *data = it87_update_device(dev);
1951
1952         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1953 }
1954 static DEVICE_ATTR_RO(cpu0_vid);
1955
1956 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1957                           char *buf)
1958 {
1959         static const char * const labels[] = {
1960                 "+5V",
1961                 "5VSB",
1962                 "Vbat",
1963                 "AVCC",
1964         };
1965         static const char * const labels_it8721[] = {
1966                 "+3.3V",
1967                 "3VSB",
1968                 "Vbat",
1969                 "+3.3V",
1970         };
1971         struct it87_data *data = dev_get_drvdata(dev);
1972         int nr = to_sensor_dev_attr(attr)->index;
1973         const char *label;
1974
1975         if (has_vin3_5v(data) && nr == 0)
1976                 label = labels[0];
1977         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1978                 label = labels_it8721[nr];
1979         else
1980                 label = labels[nr];
1981
1982         return sprintf(buf, "%s\n", label);
1983 }
1984 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1985 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1986 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1987 /* AVCC3 */
1988 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
1989
1990 static umode_t it87_in_is_visible(struct kobject *kobj,
1991                                   struct attribute *attr, int index)
1992 {
1993         struct device *dev = container_of(kobj, struct device, kobj);
1994         struct it87_data *data = dev_get_drvdata(dev);
1995         int i = index / 5;      /* voltage index */
1996         int a = index % 5;      /* attribute index */
1997
1998         if (index >= 40) {      /* in8 and higher only have input attributes */
1999                 i = index - 40 + 8;
2000                 a = 0;
2001         }
2002
2003         if (!(data->has_in & BIT(i)))
2004                 return 0;
2005
2006         if (a == 4 && !data->has_beep)
2007                 return 0;
2008
2009         return attr->mode;
2010 }
2011
2012 static struct attribute *it87_attributes_in[] = {
2013         &sensor_dev_attr_in0_input.dev_attr.attr,
2014         &sensor_dev_attr_in0_min.dev_attr.attr,
2015         &sensor_dev_attr_in0_max.dev_attr.attr,
2016         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2017         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2018
2019         &sensor_dev_attr_in1_input.dev_attr.attr,
2020         &sensor_dev_attr_in1_min.dev_attr.attr,
2021         &sensor_dev_attr_in1_max.dev_attr.attr,
2022         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2023         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2024
2025         &sensor_dev_attr_in2_input.dev_attr.attr,
2026         &sensor_dev_attr_in2_min.dev_attr.attr,
2027         &sensor_dev_attr_in2_max.dev_attr.attr,
2028         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2029         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2030
2031         &sensor_dev_attr_in3_input.dev_attr.attr,
2032         &sensor_dev_attr_in3_min.dev_attr.attr,
2033         &sensor_dev_attr_in3_max.dev_attr.attr,
2034         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2035         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2036
2037         &sensor_dev_attr_in4_input.dev_attr.attr,
2038         &sensor_dev_attr_in4_min.dev_attr.attr,
2039         &sensor_dev_attr_in4_max.dev_attr.attr,
2040         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2041         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2042
2043         &sensor_dev_attr_in5_input.dev_attr.attr,
2044         &sensor_dev_attr_in5_min.dev_attr.attr,
2045         &sensor_dev_attr_in5_max.dev_attr.attr,
2046         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2047         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2048
2049         &sensor_dev_attr_in6_input.dev_attr.attr,
2050         &sensor_dev_attr_in6_min.dev_attr.attr,
2051         &sensor_dev_attr_in6_max.dev_attr.attr,
2052         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2053         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2054
2055         &sensor_dev_attr_in7_input.dev_attr.attr,
2056         &sensor_dev_attr_in7_min.dev_attr.attr,
2057         &sensor_dev_attr_in7_max.dev_attr.attr,
2058         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2059         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2060
2061         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2062         &sensor_dev_attr_in9_input.dev_attr.attr,
2063         &sensor_dev_attr_in10_input.dev_attr.attr,
2064         &sensor_dev_attr_in11_input.dev_attr.attr,
2065         &sensor_dev_attr_in12_input.dev_attr.attr,
2066         NULL
2067 };
2068
2069 static const struct attribute_group it87_group_in = {
2070         .attrs = it87_attributes_in,
2071         .is_visible = it87_in_is_visible,
2072 };
2073
2074 static umode_t it87_temp_is_visible(struct kobject *kobj,
2075                                     struct attribute *attr, int index)
2076 {
2077         struct device *dev = container_of(kobj, struct device, kobj);
2078         struct it87_data *data = dev_get_drvdata(dev);
2079         int i = index / 7;      /* temperature index */
2080         int a = index % 7;      /* attribute index */
2081
2082         if (index >= 21) {
2083                 i = index - 21 + 3;
2084                 a = 0;
2085         }
2086
2087         if (!(data->has_temp & BIT(i)))
2088                 return 0;
2089
2090         if (a == 5 && !has_temp_offset(data))
2091                 return 0;
2092
2093         if (a == 6 && !data->has_beep)
2094                 return 0;
2095
2096         return attr->mode;
2097 }
2098
2099 static struct attribute *it87_attributes_temp[] = {
2100         &sensor_dev_attr_temp1_input.dev_attr.attr,
2101         &sensor_dev_attr_temp1_max.dev_attr.attr,
2102         &sensor_dev_attr_temp1_min.dev_attr.attr,
2103         &sensor_dev_attr_temp1_type.dev_attr.attr,
2104         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2105         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2106         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2107
2108         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2109         &sensor_dev_attr_temp2_max.dev_attr.attr,
2110         &sensor_dev_attr_temp2_min.dev_attr.attr,
2111         &sensor_dev_attr_temp2_type.dev_attr.attr,
2112         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2113         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2114         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2115
2116         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2117         &sensor_dev_attr_temp3_max.dev_attr.attr,
2118         &sensor_dev_attr_temp3_min.dev_attr.attr,
2119         &sensor_dev_attr_temp3_type.dev_attr.attr,
2120         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2121         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2122         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2123
2124         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2125         &sensor_dev_attr_temp5_input.dev_attr.attr,
2126         &sensor_dev_attr_temp6_input.dev_attr.attr,
2127         NULL
2128 };
2129
2130 static const struct attribute_group it87_group_temp = {
2131         .attrs = it87_attributes_temp,
2132         .is_visible = it87_temp_is_visible,
2133 };
2134
2135 static umode_t it87_is_visible(struct kobject *kobj,
2136                                struct attribute *attr, int index)
2137 {
2138         struct device *dev = container_of(kobj, struct device, kobj);
2139         struct it87_data *data = dev_get_drvdata(dev);
2140
2141         if ((index == 2 || index == 3) && !data->has_vid)
2142                 return 0;
2143
2144         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2145                 return 0;
2146
2147         return attr->mode;
2148 }
2149
2150 static struct attribute *it87_attributes[] = {
2151         &dev_attr_alarms.attr,
2152         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2153         &dev_attr_vrm.attr,                             /* 2 */
2154         &dev_attr_cpu0_vid.attr,                        /* 3 */
2155         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2156         &sensor_dev_attr_in7_label.dev_attr.attr,
2157         &sensor_dev_attr_in8_label.dev_attr.attr,
2158         &sensor_dev_attr_in9_label.dev_attr.attr,
2159         NULL
2160 };
2161
2162 static const struct attribute_group it87_group = {
2163         .attrs = it87_attributes,
2164         .is_visible = it87_is_visible,
2165 };
2166
2167 static umode_t it87_fan_is_visible(struct kobject *kobj,
2168                                    struct attribute *attr, int index)
2169 {
2170         struct device *dev = container_of(kobj, struct device, kobj);
2171         struct it87_data *data = dev_get_drvdata(dev);
2172         int i = index / 5;      /* fan index */
2173         int a = index % 5;      /* attribute index */
2174
2175         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2176                 i = (index - 15) / 4 + 3;
2177                 a = (index - 15) % 4;
2178         }
2179
2180         if (!(data->has_fan & BIT(i)))
2181                 return 0;
2182
2183         if (a == 3) {                           /* beep */
2184                 if (!data->has_beep)
2185                         return 0;
2186                 /* first fan beep attribute is writable */
2187                 if (i == __ffs(data->has_fan))
2188                         return attr->mode | S_IWUSR;
2189         }
2190
2191         if (a == 4 && has_16bit_fans(data))     /* divisor */
2192                 return 0;
2193
2194         return attr->mode;
2195 }
2196
2197 static struct attribute *it87_attributes_fan[] = {
2198         &sensor_dev_attr_fan1_input.dev_attr.attr,
2199         &sensor_dev_attr_fan1_min.dev_attr.attr,
2200         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2201         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2202         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2203
2204         &sensor_dev_attr_fan2_input.dev_attr.attr,
2205         &sensor_dev_attr_fan2_min.dev_attr.attr,
2206         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2207         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2208         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2209
2210         &sensor_dev_attr_fan3_input.dev_attr.attr,
2211         &sensor_dev_attr_fan3_min.dev_attr.attr,
2212         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2213         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2214         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2215
2216         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2217         &sensor_dev_attr_fan4_min.dev_attr.attr,
2218         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2219         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2220
2221         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2222         &sensor_dev_attr_fan5_min.dev_attr.attr,
2223         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2224         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2225
2226         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2227         &sensor_dev_attr_fan6_min.dev_attr.attr,
2228         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2229         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2230         NULL
2231 };
2232
2233 static const struct attribute_group it87_group_fan = {
2234         .attrs = it87_attributes_fan,
2235         .is_visible = it87_fan_is_visible,
2236 };
2237
2238 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2239                                    struct attribute *attr, int index)
2240 {
2241         struct device *dev = container_of(kobj, struct device, kobj);
2242         struct it87_data *data = dev_get_drvdata(dev);
2243         int i = index / 4;      /* pwm index */
2244         int a = index % 4;      /* attribute index */
2245
2246         if (!(data->has_pwm & BIT(i)))
2247                 return 0;
2248
2249         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2250         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2251                 return attr->mode | S_IWUSR;
2252
2253         /* pwm2_freq is writable if there are two pwm frequency selects */
2254         if (has_pwm_freq2(data) && i == 1 && a == 2)
2255                 return attr->mode | S_IWUSR;
2256
2257         return attr->mode;
2258 }
2259
2260 static struct attribute *it87_attributes_pwm[] = {
2261         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2262         &sensor_dev_attr_pwm1.dev_attr.attr,
2263         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2264         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2265
2266         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2267         &sensor_dev_attr_pwm2.dev_attr.attr,
2268         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2269         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2270
2271         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2272         &sensor_dev_attr_pwm3.dev_attr.attr,
2273         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2274         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2275
2276         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2277         &sensor_dev_attr_pwm4.dev_attr.attr,
2278         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2279         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2280
2281         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2282         &sensor_dev_attr_pwm5.dev_attr.attr,
2283         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2284         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2285
2286         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2287         &sensor_dev_attr_pwm6.dev_attr.attr,
2288         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2289         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2290
2291         NULL
2292 };
2293
2294 static const struct attribute_group it87_group_pwm = {
2295         .attrs = it87_attributes_pwm,
2296         .is_visible = it87_pwm_is_visible,
2297 };
2298
2299 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2300                                         struct attribute *attr, int index)
2301 {
2302         struct device *dev = container_of(kobj, struct device, kobj);
2303         struct it87_data *data = dev_get_drvdata(dev);
2304         int i = index / 11;     /* pwm index */
2305         int a = index % 11;     /* attribute index */
2306
2307         if (index >= 33) {      /* pwm 4..6 */
2308                 i = (index - 33) / 6 + 3;
2309                 a = (index - 33) % 6 + 4;
2310         }
2311
2312         if (!(data->has_pwm & BIT(i)))
2313                 return 0;
2314
2315         if (has_newer_autopwm(data)) {
2316                 if (a < 4)      /* no auto point pwm */
2317                         return 0;
2318                 if (a == 8)     /* no auto_point4 */
2319                         return 0;
2320         }
2321         if (has_old_autopwm(data)) {
2322                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2323                         return 0;
2324         }
2325
2326         return attr->mode;
2327 }
2328
2329 static struct attribute *it87_attributes_auto_pwm[] = {
2330         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2331         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2332         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2333         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2334         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2335         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2336         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2337         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2338         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2339         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2340         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2341
2342         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2343         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2344         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2345         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2346         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2347         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2348         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2349         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2350         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2351         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2352         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2353
2354         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2355         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2356         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2357         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2358         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2359         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2360         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2361         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2362         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2363         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2364         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2365
2366         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2367         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2368         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2369         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2370         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2371         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2372
2373         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2374         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2375         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2376         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2377         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2378         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2379
2380         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2381         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2382         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2383         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2384         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2385         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2386
2387         NULL,
2388 };
2389
2390 static const struct attribute_group it87_group_auto_pwm = {
2391         .attrs = it87_attributes_auto_pwm,
2392         .is_visible = it87_auto_pwm_is_visible,
2393 };
2394
2395 /* SuperIO detection - will change isa_address if a chip is found */
2396 static int __init it87_find(int sioaddr, unsigned short *address,
2397                             struct it87_sio_data *sio_data)
2398 {
2399         int err;
2400         u16 chip_type;
2401         const char *board_vendor, *board_name;
2402         const struct it87_devices *config;
2403
2404         err = superio_enter(sioaddr);
2405         if (err)
2406                 return err;
2407
2408         err = -ENODEV;
2409         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2410
2411         switch (chip_type) {
2412         case IT8705F_DEVID:
2413                 sio_data->type = it87;
2414                 break;
2415         case IT8712F_DEVID:
2416                 sio_data->type = it8712;
2417                 break;
2418         case IT8716F_DEVID:
2419         case IT8726F_DEVID:
2420                 sio_data->type = it8716;
2421                 break;
2422         case IT8718F_DEVID:
2423                 sio_data->type = it8718;
2424                 break;
2425         case IT8720F_DEVID:
2426                 sio_data->type = it8720;
2427                 break;
2428         case IT8721F_DEVID:
2429                 sio_data->type = it8721;
2430                 break;
2431         case IT8728F_DEVID:
2432                 sio_data->type = it8728;
2433                 break;
2434         case IT8732F_DEVID:
2435                 sio_data->type = it8732;
2436                 break;
2437         case IT8792E_DEVID:
2438                 sio_data->type = it8792;
2439                 break;
2440         case IT8771E_DEVID:
2441                 sio_data->type = it8771;
2442                 break;
2443         case IT8772E_DEVID:
2444                 sio_data->type = it8772;
2445                 break;
2446         case IT8781F_DEVID:
2447                 sio_data->type = it8781;
2448                 break;
2449         case IT8782F_DEVID:
2450                 sio_data->type = it8782;
2451                 break;
2452         case IT8783E_DEVID:
2453                 sio_data->type = it8783;
2454                 break;
2455         case IT8786E_DEVID:
2456                 sio_data->type = it8786;
2457                 break;
2458         case IT8790E_DEVID:
2459                 sio_data->type = it8790;
2460                 break;
2461         case IT8603E_DEVID:
2462         case IT8623E_DEVID:
2463                 sio_data->type = it8603;
2464                 break;
2465         case IT8620E_DEVID:
2466                 sio_data->type = it8620;
2467                 break;
2468         case IT8622E_DEVID:
2469                 sio_data->type = it8622;
2470                 break;
2471         case IT8628E_DEVID:
2472                 sio_data->type = it8628;
2473                 break;
2474         case 0xffff:    /* No device at all */
2475                 goto exit;
2476         default:
2477                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2478                 goto exit;
2479         }
2480
2481         superio_select(sioaddr, PME);
2482         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2483                 pr_info("Device not activated, skipping\n");
2484                 goto exit;
2485         }
2486
2487         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2488         if (*address == 0) {
2489                 pr_info("Base address not set, skipping\n");
2490                 goto exit;
2491         }
2492
2493         err = 0;
2494         sio_data->sioaddr = sioaddr;
2495         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2496         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2497                 it87_devices[sio_data->type].suffix,
2498                 *address, sio_data->revision);
2499
2500         config = &it87_devices[sio_data->type];
2501
2502         /* in7 (VSB or VCCH5V) is always internal on some chips */
2503         if (has_in7_internal(config))
2504                 sio_data->internal |= BIT(1);
2505
2506         /* in8 (Vbat) is always internal */
2507         sio_data->internal |= BIT(2);
2508
2509         /* in9 (AVCC3), always internal if supported */
2510         if (has_avcc3(config))
2511                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2512         else
2513                 sio_data->skip_in |= BIT(9);
2514
2515         if (!has_five_pwm(config))
2516                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2517         else if (!has_six_pwm(config))
2518                 sio_data->skip_pwm |= BIT(5);
2519
2520         if (!has_vid(config))
2521                 sio_data->skip_vid = 1;
2522
2523         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2524         if (sio_data->type == it87) {
2525                 /* The IT8705F has a different LD number for GPIO */
2526                 superio_select(sioaddr, 5);
2527                 sio_data->beep_pin = superio_inb(sioaddr,
2528                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2529         } else if (sio_data->type == it8783) {
2530                 int reg25, reg27, reg2a, reg2c, regef;
2531
2532                 superio_select(sioaddr, GPIO);
2533
2534                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2535                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2536                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2537                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2538                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2539
2540                 /* Check if fan3 is there or not */
2541                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2542                         sio_data->skip_fan |= BIT(2);
2543                 if ((reg25 & BIT(4)) ||
2544                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2545                         sio_data->skip_pwm |= BIT(2);
2546
2547                 /* Check if fan2 is there or not */
2548                 if (reg27 & BIT(7))
2549                         sio_data->skip_fan |= BIT(1);
2550                 if (reg27 & BIT(3))
2551                         sio_data->skip_pwm |= BIT(1);
2552
2553                 /* VIN5 */
2554                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2555                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2556
2557                 /* VIN6 */
2558                 if (reg27 & BIT(1))
2559                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2560
2561                 /*
2562                  * VIN7
2563                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2564                  */
2565                 if (reg27 & BIT(2)) {
2566                         /*
2567                          * The data sheet is a bit unclear regarding the
2568                          * internal voltage divider for VCCH5V. It says
2569                          * "This bit enables and switches VIN7 (pin 91) to the
2570                          * internal voltage divider for VCCH5V".
2571                          * This is different to other chips, where the internal
2572                          * voltage divider would connect VIN7 to an internal
2573                          * voltage source. Maybe that is the case here as well.
2574                          *
2575                          * Since we don't know for sure, re-route it if that is
2576                          * not the case, and ask the user to report if the
2577                          * resulting voltage is sane.
2578                          */
2579                         if (!(reg2c & BIT(1))) {
2580                                 reg2c |= BIT(1);
2581                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2582                                              reg2c);
2583                                 sio_data->need_in7_reroute = true;
2584                                 pr_notice("Routing internal VCCH5V to in7.\n");
2585                         }
2586                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2587                         pr_notice("Please report if it displays a reasonable voltage.\n");
2588                 }
2589
2590                 if (reg2c & BIT(0))
2591                         sio_data->internal |= BIT(0);
2592                 if (reg2c & BIT(1))
2593                         sio_data->internal |= BIT(1);
2594
2595                 sio_data->beep_pin = superio_inb(sioaddr,
2596                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2597         } else if (sio_data->type == it8603) {
2598                 int reg27, reg29;
2599
2600                 superio_select(sioaddr, GPIO);
2601
2602                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2603
2604                 /* Check if fan3 is there or not */
2605                 if (reg27 & BIT(6))
2606                         sio_data->skip_pwm |= BIT(2);
2607                 if (reg27 & BIT(7))
2608                         sio_data->skip_fan |= BIT(2);
2609
2610                 /* Check if fan2 is there or not */
2611                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2612                 if (reg29 & BIT(1))
2613                         sio_data->skip_pwm |= BIT(1);
2614                 if (reg29 & BIT(2))
2615                         sio_data->skip_fan |= BIT(1);
2616
2617                 sio_data->skip_in |= BIT(5); /* No VIN5 */
2618                 sio_data->skip_in |= BIT(6); /* No VIN6 */
2619
2620                 sio_data->beep_pin = superio_inb(sioaddr,
2621                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2622         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2623                 int reg;
2624
2625                 superio_select(sioaddr, GPIO);
2626
2627                 /* Check for pwm5 */
2628                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2629                 if (reg & BIT(6))
2630                         sio_data->skip_pwm |= BIT(4);
2631
2632                 /* Check for fan4, fan5 */
2633                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2634                 if (!(reg & BIT(5)))
2635                         sio_data->skip_fan |= BIT(3);
2636                 if (!(reg & BIT(4)))
2637                         sio_data->skip_fan |= BIT(4);
2638
2639                 /* Check for pwm3, fan3 */
2640                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2641                 if (reg & BIT(6))
2642                         sio_data->skip_pwm |= BIT(2);
2643                 if (reg & BIT(7))
2644                         sio_data->skip_fan |= BIT(2);
2645
2646                 /* Check for pwm4 */
2647                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2648                 if (reg & BIT(2))
2649                         sio_data->skip_pwm |= BIT(3);
2650
2651                 /* Check for pwm2, fan2 */
2652                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2653                 if (reg & BIT(1))
2654                         sio_data->skip_pwm |= BIT(1);
2655                 if (reg & BIT(2))
2656                         sio_data->skip_fan |= BIT(1);
2657                 /* Check for pwm6, fan6 */
2658                 if (!(reg & BIT(7))) {
2659                         sio_data->skip_pwm |= BIT(5);
2660                         sio_data->skip_fan |= BIT(5);
2661                 }
2662
2663                 /* Check if AVCC is on VIN3 */
2664                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2665                 if (reg & BIT(0))
2666                         sio_data->internal |= BIT(0);
2667                 else
2668                         sio_data->skip_in |= BIT(9);
2669
2670                 sio_data->beep_pin = superio_inb(sioaddr,
2671                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2672         } else if (sio_data->type == it8622) {
2673                 int reg;
2674
2675                 superio_select(sioaddr, GPIO);
2676
2677                 /* Check for pwm4, fan4 */
2678                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2679                 if (reg & BIT(6))
2680                         sio_data->skip_fan |= BIT(3);
2681                 if (reg & BIT(5))
2682                         sio_data->skip_pwm |= BIT(3);
2683
2684                 /* Check for pwm3, fan3, pwm5, fan5 */
2685                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2686                 if (reg & BIT(6))
2687                         sio_data->skip_pwm |= BIT(2);
2688                 if (reg & BIT(7))
2689                         sio_data->skip_fan |= BIT(2);
2690                 if (reg & BIT(3))
2691                         sio_data->skip_pwm |= BIT(4);
2692                 if (reg & BIT(1))
2693                         sio_data->skip_fan |= BIT(4);
2694
2695                 /* Check for pwm2, fan2 */
2696                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2697                 if (reg & BIT(1))
2698                         sio_data->skip_pwm |= BIT(1);
2699                 if (reg & BIT(2))
2700                         sio_data->skip_fan |= BIT(1);
2701
2702                 /* Check for AVCC */
2703                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2704                 if (!(reg & BIT(0)))
2705                         sio_data->skip_in |= BIT(9);
2706
2707                 sio_data->beep_pin = superio_inb(sioaddr,
2708                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2709         } else {
2710                 int reg;
2711                 bool uart6;
2712
2713                 superio_select(sioaddr, GPIO);
2714
2715                 /* Check for fan4, fan5 */
2716                 if (has_five_fans(config)) {
2717                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2718                         switch (sio_data->type) {
2719                         case it8718:
2720                                 if (reg & BIT(5))
2721                                         sio_data->skip_fan |= BIT(3);
2722                                 if (reg & BIT(4))
2723                                         sio_data->skip_fan |= BIT(4);
2724                                 break;
2725                         case it8720:
2726                         case it8721:
2727                         case it8728:
2728                                 if (!(reg & BIT(5)))
2729                                         sio_data->skip_fan |= BIT(3);
2730                                 if (!(reg & BIT(4)))
2731                                         sio_data->skip_fan |= BIT(4);
2732                                 break;
2733                         default:
2734                                 break;
2735                         }
2736                 }
2737
2738                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2739                 if (!sio_data->skip_vid) {
2740                         /* We need at least 4 VID pins */
2741                         if (reg & 0x0f) {
2742                                 pr_info("VID is disabled (pins used for GPIO)\n");
2743                                 sio_data->skip_vid = 1;
2744                         }
2745                 }
2746
2747                 /* Check if fan3 is there or not */
2748                 if (reg & BIT(6))
2749                         sio_data->skip_pwm |= BIT(2);
2750                 if (reg & BIT(7))
2751                         sio_data->skip_fan |= BIT(2);
2752
2753                 /* Check if fan2 is there or not */
2754                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2755                 if (reg & BIT(1))
2756                         sio_data->skip_pwm |= BIT(1);
2757                 if (reg & BIT(2))
2758                         sio_data->skip_fan |= BIT(1);
2759
2760                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2761                     !(sio_data->skip_vid))
2762                         sio_data->vid_value = superio_inb(sioaddr,
2763                                                           IT87_SIO_VID_REG);
2764
2765                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2766
2767                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2768
2769                 /*
2770                  * The IT8720F has no VIN7 pin, so VCCH5V should always be
2771                  * routed internally to VIN7 with an internal divider.
2772                  * Curiously, there still is a configuration bit to control
2773                  * this, which means it can be set incorrectly. And even
2774                  * more curiously, many boards out there are improperly
2775                  * configured, even though the IT8720F datasheet claims
2776                  * that the internal routing of VCCH5V to VIN7 is the default
2777                  * setting. So we force the internal routing in this case.
2778                  *
2779                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2780                  * If UART6 is enabled, re-route VIN7 to the internal divider
2781                  * if that is not already the case.
2782                  */
2783                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2784                         reg |= BIT(1);
2785                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2786                         sio_data->need_in7_reroute = true;
2787                         pr_notice("Routing internal VCCH5V to in7\n");
2788                 }
2789                 if (reg & BIT(0))
2790                         sio_data->internal |= BIT(0);
2791                 if (reg & BIT(1))
2792                         sio_data->internal |= BIT(1);
2793
2794                 /*
2795                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2796                  * While VIN7 can be routed to the internal voltage divider,
2797                  * VIN5 and VIN6 are not available if UART6 is enabled.
2798                  *
2799                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2800                  * is the temperature source. Since we can not read the
2801                  * temperature source here, skip_temp is preliminary.
2802                  */
2803                 if (uart6) {
2804                         sio_data->skip_in |= BIT(5) | BIT(6);
2805                         sio_data->skip_temp |= BIT(2);
2806                 }
2807
2808                 sio_data->beep_pin = superio_inb(sioaddr,
2809                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2810         }
2811         if (sio_data->beep_pin)
2812                 pr_info("Beeping is supported\n");
2813
2814         /* Disable specific features based on DMI strings */
2815         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2816         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2817         if (board_vendor && board_name) {
2818                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2819                     strcmp(board_name, "FN68PT") == 0) {
2820                         /*
2821                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2822                          * connected to a fan, but to something else. One user
2823                          * has reported instant system power-off when changing
2824                          * the PWM2 duty cycle, so we disable it.
2825                          * I use the board name string as the trigger in case
2826                          * the same board is ever used in other systems.
2827                          */
2828                         pr_info("Disabling pwm2 due to hardware constraints\n");
2829                         sio_data->skip_pwm = BIT(1);
2830                 }
2831         }
2832
2833 exit:
2834         superio_exit(sioaddr);
2835         return err;
2836 }
2837
2838 /*
2839  * Some chips seem to have default value 0xff for all limit
2840  * registers. For low voltage limits it makes no sense and triggers
2841  * alarms, so change to 0 instead. For high temperature limits, it
2842  * means -1 degree C, which surprisingly doesn't trigger an alarm,
2843  * but is still confusing, so change to 127 degrees C.
2844  */
2845 static void it87_check_limit_regs(struct it87_data *data)
2846 {
2847         int i, reg;
2848
2849         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2850                 reg = it87_read_value(data, IT87_REG_VIN_MIN(i));
2851                 if (reg == 0xff)
2852                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2853         }
2854         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2855                 reg = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2856                 if (reg == 0xff)
2857                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2858         }
2859 }
2860
2861 /* Check if voltage monitors are reset manually or by some reason */
2862 static void it87_check_voltage_monitors_reset(struct it87_data *data)
2863 {
2864         int reg;
2865
2866         reg = it87_read_value(data, IT87_REG_VIN_ENABLE);
2867         if ((reg & 0xff) == 0) {
2868                 /* Enable all voltage monitors */
2869                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2870         }
2871 }
2872
2873 /* Check if tachometers are reset manually or by some reason */
2874 static void it87_check_tachometers_reset(struct platform_device *pdev)
2875 {
2876         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2877         struct it87_data *data = platform_get_drvdata(pdev);
2878         u8 mask, fan_main_ctrl;
2879
2880         mask = 0x70 & ~(sio_data->skip_fan << 4);
2881         fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2882         if ((fan_main_ctrl & mask) == 0) {
2883                 /* Enable all fan tachometers */
2884                 fan_main_ctrl |= mask;
2885                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2886                                  fan_main_ctrl);
2887         }
2888 }
2889
2890 /* Set tachometers to 16-bit mode if needed */
2891 static void it87_check_tachometers_16bit_mode(struct platform_device *pdev)
2892 {
2893         struct it87_data *data = platform_get_drvdata(pdev);
2894         int reg;
2895
2896         if (!has_fan16_config(data))
2897                 return;
2898
2899         reg = it87_read_value(data, IT87_REG_FAN_16BIT);
2900         if (~reg & 0x07 & data->has_fan) {
2901                 dev_dbg(&pdev->dev,
2902                         "Setting fan1-3 to 16-bit mode\n");
2903                 it87_write_value(data, IT87_REG_FAN_16BIT,
2904                                  reg | 0x07);
2905         }
2906 }
2907
2908 static void it87_start_monitoring(struct it87_data *data)
2909 {
2910         it87_write_value(data, IT87_REG_CONFIG,
2911                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2912                          | (update_vbat ? 0x41 : 0x01));
2913 }
2914
2915 /* Called when we have found a new IT87. */
2916 static void it87_init_device(struct platform_device *pdev)
2917 {
2918         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2919         struct it87_data *data = platform_get_drvdata(pdev);
2920         int tmp, i;
2921
2922         /*
2923          * For each PWM channel:
2924          * - If it is in automatic mode, setting to manual mode should set
2925          *   the fan to full speed by default.
2926          * - If it is in manual mode, we need a mapping to temperature
2927          *   channels to use when later setting to automatic mode later.
2928          *   Use a 1:1 mapping by default (we are clueless.)
2929          * In both cases, the value can (and should) be changed by the user
2930          * prior to switching to a different mode.
2931          * Note that this is no longer needed for the IT8721F and later, as
2932          * these have separate registers for the temperature mapping and the
2933          * manual duty cycle.
2934          */
2935         for (i = 0; i < NUM_AUTO_PWM; i++) {
2936                 data->pwm_temp_map[i] = i;
2937                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2938                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2939         }
2940
2941         it87_check_limit_regs(data);
2942
2943         /*
2944          * Temperature channels are not forcibly enabled, as they can be
2945          * set to two different sensor types and we can't guess which one
2946          * is correct for a given system. These channels can be enabled at
2947          * run-time through the temp{1-3}_type sysfs accessors if needed.
2948          */
2949
2950         it87_check_voltage_monitors_reset(data);
2951
2952         it87_check_tachometers_reset(pdev);
2953
2954         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2955         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2956
2957         it87_check_tachometers_16bit_mode(pdev);
2958
2959         /* Check for additional fans */
2960         if (has_five_fans(data)) {
2961                 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2962
2963                 if (tmp & BIT(4))
2964                         data->has_fan |= BIT(3); /* fan4 enabled */
2965                 if (tmp & BIT(5))
2966                         data->has_fan |= BIT(4); /* fan5 enabled */
2967                 if (has_six_fans(data) && (tmp & BIT(2)))
2968                         data->has_fan |= BIT(5); /* fan6 enabled */
2969         }
2970
2971         /* Fan input pins may be used for alternative functions */
2972         data->has_fan &= ~sio_data->skip_fan;
2973
2974         /* Check if pwm5, pwm6 are enabled */
2975         if (has_six_pwm(data)) {
2976                 /* The following code may be IT8620E specific */
2977                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2978                 if ((tmp & 0xc0) == 0xc0)
2979                         sio_data->skip_pwm |= BIT(4);
2980                 if (!(tmp & BIT(3)))
2981                         sio_data->skip_pwm |= BIT(5);
2982         }
2983
2984         it87_start_monitoring(data);
2985 }
2986
2987 /* Return 1 if and only if the PWM interface is safe to use */
2988 static int it87_check_pwm(struct device *dev)
2989 {
2990         struct it87_data *data = dev_get_drvdata(dev);
2991         /*
2992          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2993          * and polarity set to active low is sign that this is the case so we
2994          * disable pwm control to protect the user.
2995          */
2996         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2997
2998         if ((tmp & 0x87) == 0) {
2999                 if (fix_pwm_polarity) {
3000                         /*
3001                          * The user asks us to attempt a chip reconfiguration.
3002                          * This means switching to active high polarity and
3003                          * inverting all fan speed values.
3004                          */
3005                         int i;
3006                         u8 pwm[3];
3007
3008                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3009                                 pwm[i] = it87_read_value(data,
3010                                                          IT87_REG_PWM[i]);
3011
3012                         /*
3013                          * If any fan is in automatic pwm mode, the polarity
3014                          * might be correct, as suspicious as it seems, so we
3015                          * better don't change anything (but still disable the
3016                          * PWM interface).
3017                          */
3018                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3019                                 dev_info(dev,
3020                                          "Reconfiguring PWM to active high polarity\n");
3021                                 it87_write_value(data, IT87_REG_FAN_CTL,
3022                                                  tmp | 0x87);
3023                                 for (i = 0; i < 3; i++)
3024                                         it87_write_value(data,
3025                                                          IT87_REG_PWM[i],
3026                                                          0x7f & ~pwm[i]);
3027                                 return 1;
3028                         }
3029
3030                         dev_info(dev,
3031                                  "PWM configuration is too broken to be fixed\n");
3032                 }
3033
3034                 return 0;
3035         } else if (fix_pwm_polarity) {
3036                 dev_info(dev,
3037                          "PWM configuration looks sane, won't touch\n");
3038         }
3039
3040         return 1;
3041 }
3042
3043 static int it87_probe(struct platform_device *pdev)
3044 {
3045         struct it87_data *data;
3046         struct resource *res;
3047         struct device *dev = &pdev->dev;
3048         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3049         int enable_pwm_interface;
3050         struct device *hwmon_dev;
3051
3052         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3053         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3054                                  DRVNAME)) {
3055                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3056                         (unsigned long)res->start,
3057                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3058                 return -EBUSY;
3059         }
3060
3061         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3062         if (!data)
3063                 return -ENOMEM;
3064
3065         data->addr = res->start;
3066         data->sioaddr = sio_data->sioaddr;
3067         data->type = sio_data->type;
3068         data->features = it87_devices[sio_data->type].features;
3069         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3070         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3071         /*
3072          * IT8705F Datasheet 0.4.1, 3h == Version G.
3073          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3074          * These are the first revisions with 16-bit tachometer support.
3075          */
3076         switch (data->type) {
3077         case it87:
3078                 if (sio_data->revision >= 0x03) {
3079                         data->features &= ~FEAT_OLD_AUTOPWM;
3080                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3081                 }
3082                 break;
3083         case it8712:
3084                 if (sio_data->revision >= 0x08) {
3085                         data->features &= ~FEAT_OLD_AUTOPWM;
3086                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3087                                           FEAT_FIVE_FANS;
3088                 }
3089                 break;
3090         default:
3091                 break;
3092         }
3093
3094         /* Now, we do the remaining detection. */
3095         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3096             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3097                 return -ENODEV;
3098
3099         platform_set_drvdata(pdev, data);
3100
3101         mutex_init(&data->update_lock);
3102
3103         /* Check PWM configuration */
3104         enable_pwm_interface = it87_check_pwm(dev);
3105         if (!enable_pwm_interface)
3106                 dev_info(dev,
3107                          "Detected broken BIOS defaults, disabling PWM interface\n");
3108
3109         /* Starting with IT8721F, we handle scaling of internal voltages */
3110         if (has_12mv_adc(data)) {
3111                 if (sio_data->internal & BIT(0))
3112                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3113                 if (sio_data->internal & BIT(1))
3114                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3115                 if (sio_data->internal & BIT(2))
3116                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3117                 if (sio_data->internal & BIT(3))
3118                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3119         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3120                    sio_data->type == it8783) {
3121                 if (sio_data->internal & BIT(0))
3122                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3123                 if (sio_data->internal & BIT(1))
3124                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3125         }
3126
3127         data->has_temp = 0x07;
3128         if (sio_data->skip_temp & BIT(2)) {
3129                 if (sio_data->type == it8782 &&
3130                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3131                         data->has_temp &= ~BIT(2);
3132         }
3133
3134         data->in_internal = sio_data->internal;
3135         data->need_in7_reroute = sio_data->need_in7_reroute;
3136         data->has_in = 0x3ff & ~sio_data->skip_in;
3137
3138         if (has_six_temp(data)) {
3139                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3140
3141                 /* Check for additional temperature sensors */
3142                 if ((reg & 0x03) >= 0x02)
3143                         data->has_temp |= BIT(3);
3144                 if (((reg >> 2) & 0x03) >= 0x02)
3145                         data->has_temp |= BIT(4);
3146                 if (((reg >> 4) & 0x03) >= 0x02)
3147                         data->has_temp |= BIT(5);
3148
3149                 /* Check for additional voltage sensors */
3150                 if ((reg & 0x03) == 0x01)
3151                         data->has_in |= BIT(10);
3152                 if (((reg >> 2) & 0x03) == 0x01)
3153                         data->has_in |= BIT(11);
3154                 if (((reg >> 4) & 0x03) == 0x01)
3155                         data->has_in |= BIT(12);
3156         }
3157
3158         data->has_beep = !!sio_data->beep_pin;
3159
3160         /* Initialize the IT87 chip */
3161         it87_init_device(pdev);
3162
3163         if (!sio_data->skip_vid) {
3164                 data->has_vid = true;
3165                 data->vrm = vid_which_vrm();
3166                 /* VID reading from Super-I/O config space if available */
3167                 data->vid = sio_data->vid_value;
3168         }
3169
3170         /* Prepare for sysfs hooks */
3171         data->groups[0] = &it87_group;
3172         data->groups[1] = &it87_group_in;
3173         data->groups[2] = &it87_group_temp;
3174         data->groups[3] = &it87_group_fan;
3175
3176         if (enable_pwm_interface) {
3177                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3178                 data->has_pwm &= ~sio_data->skip_pwm;
3179
3180                 data->groups[4] = &it87_group_pwm;
3181                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3182                         data->groups[5] = &it87_group_auto_pwm;
3183         }
3184
3185         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3186                                         it87_devices[sio_data->type].name,
3187                                         data, data->groups);
3188         return PTR_ERR_OR_ZERO(hwmon_dev);
3189 }
3190
3191 static void __maybe_unused it87_resume_sio(struct platform_device *pdev)
3192 {
3193         struct it87_data *data = dev_get_drvdata(&pdev->dev);
3194         int err;
3195         int reg2c;
3196
3197         if (!data->need_in7_reroute)
3198                 return;
3199
3200         err = superio_enter(data->sioaddr);
3201         if (err) {
3202                 dev_warn(&pdev->dev,
3203                          "Unable to enter Super I/O to reroute in7 (%d)",
3204                          err);
3205                 return;
3206         }
3207
3208         superio_select(data->sioaddr, GPIO);
3209
3210         reg2c = superio_inb(data->sioaddr, IT87_SIO_PINX2_REG);
3211         if (!(reg2c & BIT(1))) {
3212                 dev_dbg(&pdev->dev,
3213                         "Routing internal VCCH5V to in7 again");
3214
3215                 reg2c |= BIT(1);
3216                 superio_outb(data->sioaddr, IT87_SIO_PINX2_REG,
3217                              reg2c);
3218         }
3219
3220         superio_exit(data->sioaddr);
3221 }
3222
3223 static int __maybe_unused it87_resume(struct device *dev)
3224 {
3225         struct platform_device *pdev = to_platform_device(dev);
3226         struct it87_data *data = dev_get_drvdata(dev);
3227
3228         it87_resume_sio(pdev);
3229
3230         mutex_lock(&data->update_lock);
3231
3232         it87_check_pwm(dev);
3233         it87_check_limit_regs(data);
3234         it87_check_voltage_monitors_reset(data);
3235         it87_check_tachometers_reset(pdev);
3236         it87_check_tachometers_16bit_mode(pdev);
3237
3238         it87_start_monitoring(data);
3239
3240         /* force update */
3241         data->valid = 0;
3242
3243         mutex_unlock(&data->update_lock);
3244
3245         it87_update_device(dev);
3246
3247         return 0;
3248 }
3249
3250 static SIMPLE_DEV_PM_OPS(it87_dev_pm_ops, NULL, it87_resume);
3251
3252 static struct platform_driver it87_driver = {
3253         .driver = {
3254                 .name   = DRVNAME,
3255                 .pm     = &it87_dev_pm_ops,
3256         },
3257         .probe  = it87_probe,
3258 };
3259
3260 static int __init it87_device_add(int index, unsigned short address,
3261                                   const struct it87_sio_data *sio_data)
3262 {
3263         struct platform_device *pdev;
3264         struct resource res = {
3265                 .start  = address + IT87_EC_OFFSET,
3266                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3267                 .name   = DRVNAME,
3268                 .flags  = IORESOURCE_IO,
3269         };
3270         int err;
3271
3272         err = acpi_check_resource_conflict(&res);
3273         if (err)
3274                 return err;
3275
3276         pdev = platform_device_alloc(DRVNAME, address);
3277         if (!pdev)
3278                 return -ENOMEM;
3279
3280         err = platform_device_add_resources(pdev, &res, 1);
3281         if (err) {
3282                 pr_err("Device resource addition failed (%d)\n", err);
3283                 goto exit_device_put;
3284         }
3285
3286         err = platform_device_add_data(pdev, sio_data,
3287                                        sizeof(struct it87_sio_data));
3288         if (err) {
3289                 pr_err("Platform data allocation failed\n");
3290                 goto exit_device_put;
3291         }
3292
3293         err = platform_device_add(pdev);
3294         if (err) {
3295                 pr_err("Device addition failed (%d)\n", err);
3296                 goto exit_device_put;
3297         }
3298
3299         it87_pdev[index] = pdev;
3300         return 0;
3301
3302 exit_device_put:
3303         platform_device_put(pdev);
3304         return err;
3305 }
3306
3307 static int __init sm_it87_init(void)
3308 {
3309         int sioaddr[2] = { REG_2E, REG_4E };
3310         struct it87_sio_data sio_data;
3311         unsigned short isa_address[2];
3312         bool found = false;
3313         int i, err;
3314
3315         err = platform_driver_register(&it87_driver);
3316         if (err)
3317                 return err;
3318
3319         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3320                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3321                 isa_address[i] = 0;
3322                 err = it87_find(sioaddr[i], &isa_address[i], &sio_data);
3323                 if (err || isa_address[i] == 0)
3324                         continue;
3325                 /*
3326                  * Don't register second chip if its ISA address matches
3327                  * the first chip's ISA address.
3328                  */
3329                 if (i && isa_address[i] == isa_address[0])
3330                         break;
3331
3332                 err = it87_device_add(i, isa_address[i], &sio_data);
3333                 if (err)
3334                         goto exit_dev_unregister;
3335
3336                 found = true;
3337
3338                 /*
3339                  * IT8705F may respond on both SIO addresses.
3340                  * Stop probing after finding one.
3341                  */
3342                 if (sio_data.type == it87)
3343                         break;
3344         }
3345
3346         if (!found) {
3347                 err = -ENODEV;
3348                 goto exit_unregister;
3349         }
3350         return 0;
3351
3352 exit_dev_unregister:
3353         /* NULL check handled by platform_device_unregister */
3354         platform_device_unregister(it87_pdev[0]);
3355 exit_unregister:
3356         platform_driver_unregister(&it87_driver);
3357         return err;
3358 }
3359
3360 static void __exit sm_it87_exit(void)
3361 {
3362         /* NULL check handled by platform_device_unregister */
3363         platform_device_unregister(it87_pdev[1]);
3364         platform_device_unregister(it87_pdev[0]);
3365         platform_driver_unregister(&it87_driver);
3366 }
3367
3368 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3369 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3370 module_param(update_vbat, bool, 0);
3371 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3372 module_param(fix_pwm_polarity, bool, 0);
3373 MODULE_PARM_DESC(fix_pwm_polarity,
3374                  "Force PWM polarity to active high (DANGEROUS)");
3375 MODULE_LICENSE("GPL");
3376
3377 module_init(sm_it87_init);
3378 module_exit(sm_it87_exit);