drivers/hwmon/it87.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   4  *           monitoring.
   5  *
   6  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   7  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   8  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   9  *  Fan Controller)
  10  *
  11  *  This driver supports only the Environment Controller in the IT8705F and
  12  *  similar parts.  The other devices are supported by different drivers.
  13  *
  14  *  Supports: IT8603E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8705F  Super I/O chip w/LPC interface
  20  *            IT8712F  Super I/O chip w/LPC interface
  21  *            IT8716F  Super I/O chip w/LPC interface
  22  *            IT8718F  Super I/O chip w/LPC interface
  23  *            IT8720F  Super I/O chip w/LPC interface
  24  *            IT8721F  Super I/O chip w/LPC interface
  25  *            IT8726F  Super I/O chip w/LPC interface
  26  *            IT8728F  Super I/O chip w/LPC interface
  27  *            IT8732F  Super I/O chip w/LPC interface
  28  *            IT8758E  Super I/O chip w/LPC interface
  29  *            IT8771E  Super I/O chip w/LPC interface
  30  *            IT8772E  Super I/O chip w/LPC interface
  31  *            IT8781F  Super I/O chip w/LPC interface
  32  *            IT8782F  Super I/O chip w/LPC interface
  33  *            IT8783E/F Super I/O chip w/LPC interface
  34  *            IT8786E  Super I/O chip w/LPC interface
  35  *            IT8790E  Super I/O chip w/LPC interface
  36  *            IT8792E  Super I/O chip w/LPC interface
  37  *            Sis950   A clone of the IT8705F
  38  *
  39  *  Copyright (C) 2001 Chris Gauthron
  40  *  Copyright (C) 2005-2010 Jean Delvare <jdelvare@suse.de>
  41  */
  42
  43 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  44
  45 #include <linux/bitops.h>
  46 #include <linux/module.h>
  47 #include <linux/init.h>
  48 #include <linux/slab.h>
  49 #include <linux/jiffies.h>
  50 #include <linux/platform_device.h>
  51 #include <linux/hwmon.h>
  52 #include <linux/hwmon-sysfs.h>
  53 #include <linux/hwmon-vid.h>
  54 #include <linux/err.h>
  55 #include <linux/mutex.h>
  56 #include <linux/sysfs.h>
  57 #include <linux/string.h>
  58 #include <linux/dmi.h>
  59 #include <linux/acpi.h>
  60 #include <linux/io.h>
  61
  62 #define DRVNAME "it87"
  63
  64 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  65              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  66              it8792, it8603, it8620, it8622, it8628 };
  67
  68 static unsigned short force_id;
  69 module_param(force_id, ushort, 0);
  70 MODULE_PARM_DESC(force_id, "Override the detected device ID");
  71
  72 static struct platform_device *it87_pdev[2];
  73
  74 #define REG_2E  0x2e    /* The register to read/write */
  75 #define REG_4E  0x4e    /* Secondary register to read/write */
  76
  77 #define DEV     0x07    /* Register: Logical device select */
  78 #define PME     0x04    /* The device with the fan registers in it */
  79
  80 /* The device with the IT8718F/IT8720F VID value in it */
  81 #define GPIO    0x07
  82
  83 #define DEVID   0x20    /* Register: Device ID */
  84 #define DEVREV  0x22    /* Register: Device Revision */
  85
  86 static inline int superio_inb(int ioreg, int reg)
  87 {
  88         outb(reg, ioreg);
  89         return inb(ioreg + 1);
  90 }
  91
  92 static inline void superio_outb(int ioreg, int reg, int val)
  93 {
  94         outb(reg, ioreg);
  95         outb(val, ioreg + 1);
  96 }
  97
  98 static int superio_inw(int ioreg, int reg)
  99 {
 100         int val;
 101
 102         outb(reg++, ioreg);
 103         val = inb(ioreg + 1) << 8;
 104         outb(reg, ioreg);
 105         val |= inb(ioreg + 1);
 106         return val;
 107 }
 108
 109 static inline void superio_select(int ioreg, int ldn)
 110 {
 111         outb(DEV, ioreg);
 112         outb(ldn, ioreg + 1);
 113 }
 114
 115 static inline int superio_enter(int ioreg)
 116 {
 117         /*
 118          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 119          */
 120         if (!request_muxed_region(ioreg, 2, DRVNAME))
 121                 return -EBUSY;
 122
 123         outb(0x87, ioreg);
 124         outb(0x01, ioreg);
 125         outb(0x55, ioreg);
 126         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
 127         return 0;
 128 }
 129
 130 static inline void superio_exit(int ioreg)
 131 {
 132         outb(0x02, ioreg);
 133         outb(0x02, ioreg + 1);
 134         release_region(ioreg, 2);
 135 }
 136
 137 /* Logical device 4 registers */
 138 #define IT8712F_DEVID 0x8712
 139 #define IT8705F_DEVID 0x8705
 140 #define IT8716F_DEVID 0x8716
 141 #define IT8718F_DEVID 0x8718
 142 #define IT8720F_DEVID 0x8720
 143 #define IT8721F_DEVID 0x8721
 144 #define IT8726F_DEVID 0x8726
 145 #define IT8728F_DEVID 0x8728
 146 #define IT8732F_DEVID 0x8732
 147 #define IT8792E_DEVID 0x8733
 148 #define IT8771E_DEVID 0x8771
 149 #define IT8772E_DEVID 0x8772
 150 #define IT8781F_DEVID 0x8781
 151 #define IT8782F_DEVID 0x8782
 152 #define IT8783E_DEVID 0x8783
 153 #define IT8786E_DEVID 0x8786
 154 #define IT8790E_DEVID 0x8790
 155 #define IT8603E_DEVID 0x8603
 156 #define IT8620E_DEVID 0x8620
 157 #define IT8622E_DEVID 0x8622
 158 #define IT8623E_DEVID 0x8623
 159 #define IT8628E_DEVID 0x8628
 160 #define IT87_ACT_REG  0x30
 161 #define IT87_BASE_REG 0x60
 162
 163 /* Logical device 7 registers (IT8712F and later) */
 164 #define IT87_SIO_GPIO1_REG      0x25
 165 #define IT87_SIO_GPIO2_REG      0x26
 166 #define IT87_SIO_GPIO3_REG      0x27
 167 #define IT87_SIO_GPIO4_REG      0x28
 168 #define IT87_SIO_GPIO5_REG      0x29
 169 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 170 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 171 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 172 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 173 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 174
 175 /* Update battery voltage after every reading if true */
 176 static bool update_vbat;
 177
 178 /* Not all BIOSes properly configure the PWM registers */
 179 static bool fix_pwm_polarity;
 180
 181 /* Many IT87 constants specified below */
 182
 183 /* Length of ISA address segment */
 184 #define IT87_EXTENT 8
 185
 186 /* Length of ISA address segment for Environmental Controller */
 187 #define IT87_EC_EXTENT 2
 188
 189 /* Offset of EC registers from ISA base address */
 190 #define IT87_EC_OFFSET 5
 191
 192 /* Where are the ISA address/data registers relative to the EC base address */
 193 #define IT87_ADDR_REG_OFFSET 0
 194 #define IT87_DATA_REG_OFFSET 1
 195
 196 /*----- The IT87 registers -----*/
 197
 198 #define IT87_REG_CONFIG        0x00
 199
 200 #define IT87_REG_ALARM1        0x01
 201 #define IT87_REG_ALARM2        0x02
 202 #define IT87_REG_ALARM3        0x03
 203
 204 /*
 205  * The IT8718F and IT8720F have the VID value in a different register, in
 206  * Super-I/O configuration space.
 207  */
 208 #define IT87_REG_VID           0x0a
 209 /*
 210  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 211  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 212  * mode.
 213  */
 214 #define IT87_REG_FAN_DIV       0x0b
 215 #define IT87_REG_FAN_16BIT     0x0c
 216
 217 /*
 218  * Monitors:
 219  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 220  * - up to 6 temp (1 to 6)
 221  * - up to 6 fan (1 to 6)
 222  */
 223
 224 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 225 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 226 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 227 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 228 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 229
 230 #define IT87_REG_FAN_MAIN_CTRL 0x13
 231 #define IT87_REG_FAN_CTL       0x14
 232 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 233 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 234
 235 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 236                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 237
 238 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 239
 240 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 241 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 242 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 243 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 244
 245 #define IT87_REG_VIN_ENABLE    0x50
 246 #define IT87_REG_TEMP_ENABLE   0x51
 247 #define IT87_REG_TEMP_EXTRA    0x55
 248 #define IT87_REG_BEEP_ENABLE   0x5c
 249
 250 #define IT87_REG_CHIPID        0x58
 251
 252 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 253
 254 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 255 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 256
 257 #define IT87_REG_TEMP456_ENABLE 0x77
 258
 259 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 260 #define NUM_VIN_LIMIT           8
 261 #define NUM_TEMP                6
 262 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 263 #define NUM_TEMP_LIMIT          3
 264 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 265 #define NUM_FAN_DIV             3
 266 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 267 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 268
 269 struct it87_devices {
 270         const char *name;
 271         const char * const suffix;
 272         u32 features;
 273         u8 peci_mask;
 274         u8 old_peci_mask;
 275 };
 276
 277 #define FEAT_12MV_ADC           BIT(0)
 278 #define FEAT_NEWER_AUTOPWM      BIT(1)
 279 #define FEAT_OLD_AUTOPWM        BIT(2)
 280 #define FEAT_16BIT_FANS         BIT(3)
 281 #define FEAT_TEMP_OFFSET        BIT(4)
 282 #define FEAT_TEMP_PECI          BIT(5)
 283 #define FEAT_TEMP_OLD_PECI      BIT(6)
 284 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 285 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 286 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 287 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 288 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 289 #define FEAT_10_9MV_ADC         BIT(12)
 290 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 291 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 292 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 293 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 294 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 295 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 296
 297 static const struct it87_devices it87_devices[] = {
 298         [it87] = {
 299                 .name = "it87",
 300                 .suffix = "F",
 301                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 302         },
 303         [it8712] = {
 304                 .name = "it8712",
 305                 .suffix = "F",
 306                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 307                                                 /* may need to overwrite */
 308         },
 309         [it8716] = {
 310                 .name = "it8716",
 311                 .suffix = "F",
 312                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 313                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 314         },
 315         [it8718] = {
 316                 .name = "it8718",
 317                 .suffix = "F",
 318                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 319                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 320                   | FEAT_PWM_FREQ2,
 321                 .old_peci_mask = 0x4,
 322         },
 323         [it8720] = {
 324                 .name = "it8720",
 325                 .suffix = "F",
 326                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 327                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 328                   | FEAT_PWM_FREQ2,
 329                 .old_peci_mask = 0x4,
 330         },
 331         [it8721] = {
 332                 .name = "it8721",
 333                 .suffix = "F",
 334                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 335                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 336                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 337                   | FEAT_PWM_FREQ2,
 338                 .peci_mask = 0x05,
 339                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 340         },
 341         [it8728] = {
 342                 .name = "it8728",
 343                 .suffix = "F",
 344                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 345                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 346                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 347                 .peci_mask = 0x07,
 348         },
 349         [it8732] = {
 350                 .name = "it8732",
 351                 .suffix = "F",
 352                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 353                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 354                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 355                 .peci_mask = 0x07,
 356                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 357         },
 358         [it8771] = {
 359                 .name = "it8771",
 360                 .suffix = "E",
 361                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 362                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 363                   | FEAT_PWM_FREQ2,
 364                                 /* PECI: guesswork */
 365                                 /* 12mV ADC (OHM) */
 366                                 /* 16 bit fans (OHM) */
 367                                 /* three fans, always 16 bit (guesswork) */
 368                 .peci_mask = 0x07,
 369         },
 370         [it8772] = {
 371                 .name = "it8772",
 372                 .suffix = "E",
 373                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 374                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 375                   | FEAT_PWM_FREQ2,
 376                                 /* PECI (coreboot) */
 377                                 /* 12mV ADC (HWSensors4, OHM) */
 378                                 /* 16 bit fans (HWSensors4, OHM) */
 379                                 /* three fans, always 16 bit (datasheet) */
 380                 .peci_mask = 0x07,
 381         },
 382         [it8781] = {
 383                 .name = "it8781",
 384                 .suffix = "F",
 385                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 386                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 387                 .old_peci_mask = 0x4,
 388         },
 389         [it8782] = {
 390                 .name = "it8782",
 391                 .suffix = "F",
 392                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 393                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 394                 .old_peci_mask = 0x4,
 395         },
 396         [it8783] = {
 397                 .name = "it8783",
 398                 .suffix = "E/F",
 399                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 400                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 401                 .old_peci_mask = 0x4,
 402         },
 403         [it8786] = {
 404                 .name = "it8786",
 405                 .suffix = "E",
 406                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 407                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 408                   | FEAT_PWM_FREQ2,
 409                 .peci_mask = 0x07,
 410         },
 411         [it8790] = {
 412                 .name = "it8790",
 413                 .suffix = "E",
 414                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 415                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 416                   | FEAT_PWM_FREQ2,
 417                 .peci_mask = 0x07,
 418         },
 419         [it8792] = {
 420                 .name = "it8792",
 421                 .suffix = "E",
 422                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 423                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 424                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 425                 .peci_mask = 0x07,
 426                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 427         },
 428         [it8603] = {
 429                 .name = "it8603",
 430                 .suffix = "E",
 431                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 432                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 433                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 434                 .peci_mask = 0x07,
 435         },
 436         [it8620] = {
 437                 .name = "it8620",
 438                 .suffix = "E",
 439                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 440                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 441                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 442                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 443                 .peci_mask = 0x07,
 444         },
 445         [it8622] = {
 446                 .name = "it8622",
 447                 .suffix = "E",
 448                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 449                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 450                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 451                   | FEAT_AVCC3 | FEAT_VIN3_5V,
 452                 .peci_mask = 0x07,
 453         },
 454         [it8628] = {
 455                 .name = "it8628",
 456                 .suffix = "E",
 457                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 458                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 459                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 460                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 461                 .peci_mask = 0x07,
 462         },
 463 };
 464
 465 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 466 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 467 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 468 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 469 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 470 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 471 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 472                                  ((data)->peci_mask & BIT(nr)))
 473 #define has_temp_old_peci(data, nr) \
 474                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 475                                  ((data)->old_peci_mask & BIT(nr)))
 476 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 477 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 478                                                      FEAT_SIX_FANS))
 479 #define has_vid(data)           ((data)->features & FEAT_VID)
 480 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 481 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 482 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 483 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 484                                                      | FEAT_SIX_PWM))
 485 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 486 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 487 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 488 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 489 #define has_scaling(data)       ((data)->features & (FEAT_12MV_ADC | \
 490                                                      FEAT_10_9MV_ADC))
 491
 492 struct it87_sio_data {
 493         int sioaddr;
 494         enum chips type;
 495         /* Values read from Super-I/O config space */
 496         u8 revision;
 497         u8 vid_value;
 498         u8 beep_pin;
 499         u8 internal;    /* Internal sensors can be labeled */
 500         bool need_in7_reroute;
 501         /* Features skipped based on config or DMI */
 502         u16 skip_in;
 503         u8 skip_vid;
 504         u8 skip_fan;
 505         u8 skip_pwm;
 506         u8 skip_temp;
 507 };
 508
 509 /*
 510  * For each registered chip, we need to keep some data in memory.
 511  * The structure is dynamically allocated.
 512  */
 513 struct it87_data {
 514         const struct attribute_group *groups[7];
 515         int sioaddr;
 516         enum chips type;
 517         u32 features;
 518         u8 peci_mask;
 519         u8 old_peci_mask;
 520
 521         unsigned short addr;
 522         const char *name;
 523         struct mutex update_lock;
 524         char valid;             /* !=0 if following fields are valid */
 525         unsigned long last_updated;     /* In jiffies */
 526
 527         u16 in_scaled;          /* Internal voltage sensors are scaled */
 528         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 529         u16 has_in;             /* Bitfield, voltage sensors enabled */
 530         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 531         bool need_in7_reroute;
 532         u8 has_fan;             /* Bitfield, fans enabled */
 533         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 534         u8 has_temp;            /* Bitfield, temp sensors enabled */
 535         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 536         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 537         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 538         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 539         bool has_vid;           /* True if VID supported */
 540         u8 vid;                 /* Register encoding, combined */
 541         u8 vrm;
 542         u32 alarms;             /* Register encoding, combined */
 543         bool has_beep;          /* true if beep supported */
 544         u8 beeps;               /* Register encoding */
 545         u8 fan_main_ctrl;       /* Register value */
 546         u8 fan_ctl;             /* Register value */
 547
 548         /*
 549          * The following 3 arrays correspond to the same registers up to
 550          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 551          * 7, and we want to preserve settings on mode changes, so we have
 552          * to track all values separately.
 553          * Starting with the IT8721F, the manual PWM duty cycles are stored
 554          * in separate registers (8-bit values), so the separate tracking
 555          * is no longer needed, but it is still done to keep the driver
 556          * simple.
 557          */
 558         u8 has_pwm;             /* Bitfield, pwm control enabled */
 559         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 560         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 561         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 562
 563         /* Automatic fan speed control registers */
 564         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 565         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 566 };
 567
 568 static int adc_lsb(const struct it87_data *data, int nr)
 569 {
 570         int lsb;
 571
 572         if (has_12mv_adc(data))
 573                 lsb = 120;
 574         else if (has_10_9mv_adc(data))
 575                 lsb = 109;
 576         else
 577                 lsb = 160;
 578         if (data->in_scaled & BIT(nr))
 579                 lsb <<= 1;
 580         return lsb;
 581 }
 582
 583 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 584 {
 585         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 586         return clamp_val(val, 0, 255);
 587 }
 588
 589 static int in_from_reg(const struct it87_data *data, int nr, int val)
 590 {
 591         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 592 }
 593
 594 static inline u8 FAN_TO_REG(long rpm, int div)
 595 {
 596         if (rpm == 0)
 597                 return 255;
 598         rpm = clamp_val(rpm, 1, 1000000);
 599         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 600 }
 601
 602 static inline u16 FAN16_TO_REG(long rpm)
 603 {
 604         if (rpm == 0)
 605                 return 0xffff;
 606         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 607 }
 608
 609 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 610                                 1350000 / ((val) * (div)))
 611 /* The divider is fixed to 2 in 16-bit mode */
 612 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 613                              1350000 / ((val) * 2))
 614
 615 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 616                                     ((val) + 500) / 1000), -128, 127))
 617 #define TEMP_FROM_REG(val) ((val) * 1000)
 618
 619 static u8 pwm_to_reg(const struct it87_data *data, long val)
 620 {
 621         if (has_newer_autopwm(data))
 622                 return val;
 623         else
 624                 return val >> 1;
 625 }
 626
 627 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 628 {
 629         if (has_newer_autopwm(data))
 630                 return reg;
 631         else
 632                 return (reg & 0x7f) << 1;
 633 }
 634
 635 static int DIV_TO_REG(int val)
 636 {
 637         int answer = 0;
 638
 639         while (answer < 7 && (val >>= 1))
 640                 answer++;
 641         return answer;
 642 }
 643
 644 #define DIV_FROM_REG(val) BIT(val)
 645
 646 /*
 647  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 648  * depending on the chip type, to calculate the actual PWM frequency.
 649  *
 650  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 651  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 652  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 653  * sometimes just one. It is unknown if this is a datasheet error or real,
 654  * so this is ignored for now.
 655  */
 656 static const unsigned int pwm_freq[8] = {
 657         48000000,
 658         24000000,
 659         12000000,
 660         8000000,
 661         6000000,
 662         3000000,
 663         1500000,
 664         750000,
 665 };
 666
 667 /*
 668  * Must be called with data->update_lock held, except during initialization.
 669  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 670  * would slow down the IT87 access and should not be necessary.
 671  */
 672 static int it87_read_value(struct it87_data *data, u8 reg)
 673 {
 674         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 675         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 676 }
 677
 678 /*
 679  * Must be called with data->update_lock held, except during initialization.
 680  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 681  * would slow down the IT87 access and should not be necessary.
 682  */
 683 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 684 {
 685         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 686         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 687 }
 688
 689 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 690 {
 691         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 692         if (has_newer_autopwm(data)) {
 693                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 694                 data->pwm_duty[nr] = it87_read_value(data,
 695                                                      IT87_REG_PWM_DUTY[nr]);
 696         } else {
 697                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 698                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 699                 else                            /* Manual mode */
 700                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 701         }
 702
 703         if (has_old_autopwm(data)) {
 704                 int i;
 705
 706                 for (i = 0; i < 5 ; i++)
 707                         data->auto_temp[nr][i] = it87_read_value(data,
 708                                                 IT87_REG_AUTO_TEMP(nr, i));
 709                 for (i = 0; i < 3 ; i++)
 710                         data->auto_pwm[nr][i] = it87_read_value(data,
 711                                                 IT87_REG_AUTO_PWM(nr, i));
 712         } else if (has_newer_autopwm(data)) {
 713                 int i;
 714
 715                 /*
 716                  * 0: temperature hysteresis (base + 5)
 717                  * 1: fan off temperature (base + 0)
 718                  * 2: fan start temperature (base + 1)
 719                  * 3: fan max temperature (base + 2)
 720                  */
 721                 data->auto_temp[nr][0] =
 722                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 723
 724                 for (i = 0; i < 3 ; i++)
 725                         data->auto_temp[nr][i + 1] =
 726                                 it87_read_value(data,
 727                                                 IT87_REG_AUTO_TEMP(nr, i));
 728                 /*
 729                  * 0: start pwm value (base + 3)
 730                  * 1: pwm slope (base + 4, 1/8th pwm)
 731                  */
 732                 data->auto_pwm[nr][0] =
 733                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 734                 data->auto_pwm[nr][1] =
 735                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 736         }
 737 }
 738
 739 static struct it87_data *it87_update_device(struct device *dev)
 740 {
 741         struct it87_data *data = dev_get_drvdata(dev);
 742         int i;
 743
 744         mutex_lock(&data->update_lock);
 745
 746         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 747             !data->valid) {
 748                 if (update_vbat) {
 749                         /*
 750                          * Cleared after each update, so reenable.  Value
 751                          * returned by this read will be previous value
 752                          */
 753                         it87_write_value(data, IT87_REG_CONFIG,
 754                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 755                 }
 756                 for (i = 0; i < NUM_VIN; i++) {
 757                         if (!(data->has_in & BIT(i)))
 758                                 continue;
 759
 760                         data->in[i][0] =
 761                                 it87_read_value(data, IT87_REG_VIN[i]);
 762
 763                         /* VBAT and AVCC don't have limit registers */
 764                         if (i >= NUM_VIN_LIMIT)
 765                                 continue;
 766
 767                         data->in[i][1] =
 768                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 769                         data->in[i][2] =
 770                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 771                 }
 772
 773                 for (i = 0; i < NUM_FAN; i++) {
 774                         /* Skip disabled fans */
 775                         if (!(data->has_fan & BIT(i)))
 776                                 continue;
 777
 778                         data->fan[i][1] =
 779                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 780                         data->fan[i][0] = it87_read_value(data,
 781                                        IT87_REG_FAN[i]);
 782                         /* Add high byte if in 16-bit mode */
 783                         if (has_16bit_fans(data)) {
 784                                 data->fan[i][0] |= it87_read_value(data,
 785                                                 IT87_REG_FANX[i]) << 8;
 786                                 data->fan[i][1] |= it87_read_value(data,
 787                                                 IT87_REG_FANX_MIN[i]) << 8;
 788                         }
 789                 }
 790                 for (i = 0; i < NUM_TEMP; i++) {
 791                         if (!(data->has_temp & BIT(i)))
 792                                 continue;
 793                         data->temp[i][0] =
 794                                 it87_read_value(data, IT87_REG_TEMP(i));
 795
 796                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 797                                 data->temp[i][3] =
 798                                   it87_read_value(data,
 799                                                   IT87_REG_TEMP_OFFSET[i]);
 800
 801                         if (i >= NUM_TEMP_LIMIT)
 802                                 continue;
 803
 804                         data->temp[i][1] =
 805                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 806                         data->temp[i][2] =
 807                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 808                 }
 809
 810                 /* Newer chips don't have clock dividers */
 811                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 812                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 813                         data->fan_div[0] = i & 0x07;
 814                         data->fan_div[1] = (i >> 3) & 0x07;
 815                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 816                 }
 817
 818                 data->alarms =
 819                         it87_read_value(data, IT87_REG_ALARM1) |
 820                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 821                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 822                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 823
 824                 data->fan_main_ctrl = it87_read_value(data,
 825                                 IT87_REG_FAN_MAIN_CTRL);
 826                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 827                 for (i = 0; i < NUM_PWM; i++) {
 828                         if (!(data->has_pwm & BIT(i)))
 829                                 continue;
 830                         it87_update_pwm_ctrl(data, i);
 831                 }
 832
 833                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 834                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 835                 /*
 836                  * The IT8705F does not have VID capability.
 837                  * The IT8718F and later don't use IT87_REG_VID for the
 838                  * same purpose.
 839                  */
 840                 if (data->type == it8712 || data->type == it8716) {
 841                         data->vid = it87_read_value(data, IT87_REG_VID);
 842                         /*
 843                          * The older IT8712F revisions had only 5 VID pins,
 844                          * but we assume it is always safe to read 6 bits.
 845                          */
 846                         data->vid &= 0x3f;
 847                 }
 848                 data->last_updated = jiffies;
 849                 data->valid = 1;
 850         }
 851
 852         mutex_unlock(&data->update_lock);
 853
 854         return data;
 855 }
 856
 857 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 858                        char *buf)
 859 {
 860         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 861         struct it87_data *data = it87_update_device(dev);
 862         int index = sattr->index;
 863         int nr = sattr->nr;
 864
 865         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 866 }
 867
 868 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 869                       const char *buf, size_t count)
 870 {
 871         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 872         struct it87_data *data = dev_get_drvdata(dev);
 873         int index = sattr->index;
 874         int nr = sattr->nr;
 875         unsigned long val;
 876
 877         if (kstrtoul(buf, 10, &val) < 0)
 878                 return -EINVAL;
 879
 880         mutex_lock(&data->update_lock);
 881         data->in[nr][index] = in_to_reg(data, nr, val);
 882         it87_write_value(data,
 883                          index == 1 ? IT87_REG_VIN_MIN(nr)
 884                                     : IT87_REG_VIN_MAX(nr),
 885                          data->in[nr][index]);
 886         mutex_unlock(&data->update_lock);
 887         return count;
 888 }
 889
 890 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
 891 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
 892                             0, 1);
 893 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
 894                             0, 2);
 895
 896 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
 897 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
 898                             1, 1);
 899 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
 900                             1, 2);
 901
 902 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
 903 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
 904                             2, 1);
 905 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
 906                             2, 2);
 907
 908 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
 909 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
 910                             3, 1);
 911 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
 912                             3, 2);
 913
 914 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
 915 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
 916                             4, 1);
 917 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
 918                             4, 2);
 919
 920 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
 921 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
 922                             5, 1);
 923 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
 924                             5, 2);
 925
 926 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
 927 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
 928                             6, 1);
 929 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
 930                             6, 2);
 931
 932 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
 933 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
 934                             7, 1);
 935 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
 936                             7, 2);
 937
 938 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
 939 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
 940 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
 941 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
 942 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
 943
 944 /* Up to 6 temperatures */
 945 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
 946                          char *buf)
 947 {
 948         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 949         int nr = sattr->nr;
 950         int index = sattr->index;
 951         struct it87_data *data = it87_update_device(dev);
 952
 953         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
 954 }
 955
 956 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
 957                         const char *buf, size_t count)
 958 {
 959         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 960         int nr = sattr->nr;
 961         int index = sattr->index;
 962         struct it87_data *data = dev_get_drvdata(dev);
 963         long val;
 964         u8 reg, regval;
 965
 966         if (kstrtol(buf, 10, &val) < 0)
 967                 return -EINVAL;
 968
 969         mutex_lock(&data->update_lock);
 970
 971         switch (index) {
 972         default:
 973         case 1:
 974                 reg = IT87_REG_TEMP_LOW(nr);
 975                 break;
 976         case 2:
 977                 reg = IT87_REG_TEMP_HIGH(nr);
 978                 break;
 979         case 3:
 980                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 981                 if (!(regval & 0x80)) {
 982                         regval |= 0x80;
 983                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
 984                 }
 985                 data->valid = 0;
 986                 reg = IT87_REG_TEMP_OFFSET[nr];
 987                 break;
 988         }
 989
 990         data->temp[nr][index] = TEMP_TO_REG(val);
 991         it87_write_value(data, reg, data->temp[nr][index]);
 992         mutex_unlock(&data->update_lock);
 993         return count;
 994 }
 995
 996 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
 997 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
 998                             0, 1);
 999 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1000                             0, 2);
1001 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1002                             set_temp, 0, 3);
1003 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1004 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1005                             1, 1);
1006 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1007                             1, 2);
1008 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1009                             set_temp, 1, 3);
1010 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1011 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1012                             2, 1);
1013 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1014                             2, 2);
1015 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1016                             set_temp, 2, 3);
1017 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1018 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1019 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1020
1021 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1022                               char *buf)
1023 {
1024         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1025         int nr = sensor_attr->index;
1026         struct it87_data *data = it87_update_device(dev);
1027         u8 reg = data->sensor;      /* In case value is updated while used */
1028         u8 extra = data->extra;
1029
1030         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1031             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1032                 return sprintf(buf, "6\n");  /* Intel PECI */
1033         if (reg & (1 << nr))
1034                 return sprintf(buf, "3\n");  /* thermal diode */
1035         if (reg & (8 << nr))
1036                 return sprintf(buf, "4\n");  /* thermistor */
1037         return sprintf(buf, "0\n");      /* disabled */
1038 }
1039
1040 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1041                              const char *buf, size_t count)
1042 {
1043         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1044         int nr = sensor_attr->index;
1045
1046         struct it87_data *data = dev_get_drvdata(dev);
1047         long val;
1048         u8 reg, extra;
1049
1050         if (kstrtol(buf, 10, &val) < 0)
1051                 return -EINVAL;
1052
1053         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1054         reg &= ~(1 << nr);
1055         reg &= ~(8 << nr);
1056         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1057                 reg &= 0x3f;
1058         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1059         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1060                 extra &= 0x7f;
1061         if (val == 2) { /* backwards compatibility */
1062                 dev_warn(dev,
1063                          "Sensor type 2 is deprecated, please use 4 instead\n");
1064                 val = 4;
1065         }
1066         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1067         if (val == 3)
1068                 reg |= 1 << nr;
1069         else if (val == 4)
1070                 reg |= 8 << nr;
1071         else if (has_temp_peci(data, nr) && val == 6)
1072                 reg |= (nr + 1) << 6;
1073         else if (has_temp_old_peci(data, nr) && val == 6)
1074                 extra |= 0x80;
1075         else if (val != 0)
1076                 return -EINVAL;
1077
1078         mutex_lock(&data->update_lock);
1079         data->sensor = reg;
1080         data->extra = extra;
1081         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1082         if (has_temp_old_peci(data, nr))
1083                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1084         data->valid = 0;        /* Force cache refresh */
1085         mutex_unlock(&data->update_lock);
1086         return count;
1087 }
1088
1089 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1090                           set_temp_type, 0);
1091 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1092                           set_temp_type, 1);
1093 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1094                           set_temp_type, 2);
1095
1096 /* 6 Fans */
1097
1098 static int pwm_mode(const struct it87_data *data, int nr)
1099 {
1100         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1101                 return 0;                               /* Full speed */
1102         if (data->pwm_ctrl[nr] & 0x80)
1103                 return 2;                               /* Automatic mode */
1104         if ((data->type == it8603 || nr >= 3) &&
1105             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1106                 return 0;                       /* Full speed */
1107
1108         return 1;                               /* Manual mode */
1109 }
1110
1111 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1112                         char *buf)
1113 {
1114         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1115         int nr = sattr->nr;
1116         int index = sattr->index;
1117         int speed;
1118         struct it87_data *data = it87_update_device(dev);
1119
1120         speed = has_16bit_fans(data) ?
1121                 FAN16_FROM_REG(data->fan[nr][index]) :
1122                 FAN_FROM_REG(data->fan[nr][index],
1123                              DIV_FROM_REG(data->fan_div[nr]));
1124         return sprintf(buf, "%d\n", speed);
1125 }
1126
1127 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1128                             char *buf)
1129 {
1130         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1131         struct it87_data *data = it87_update_device(dev);
1132         int nr = sensor_attr->index;
1133
1134         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1135 }
1136
1137 static ssize_t show_pwm_enable(struct device *dev,
1138                                struct device_attribute *attr, char *buf)
1139 {
1140         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1141         struct it87_data *data = it87_update_device(dev);
1142         int nr = sensor_attr->index;
1143
1144         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1145 }
1146
1147 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1148                         char *buf)
1149 {
1150         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1151         struct it87_data *data = it87_update_device(dev);
1152         int nr = sensor_attr->index;
1153
1154         return sprintf(buf, "%d\n",
1155                        pwm_from_reg(data, data->pwm_duty[nr]));
1156 }
1157
1158 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1159                              char *buf)
1160 {
1161         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1162         struct it87_data *data = it87_update_device(dev);
1163         int nr = sensor_attr->index;
1164         unsigned int freq;
1165         int index;
1166
1167         if (has_pwm_freq2(data) && nr == 1)
1168                 index = (data->extra >> 4) & 0x07;
1169         else
1170                 index = (data->fan_ctl >> 4) & 0x07;
1171
1172         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1173
1174         return sprintf(buf, "%u\n", freq);
1175 }
1176
1177 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1178                        const char *buf, size_t count)
1179 {
1180         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1181         int nr = sattr->nr;
1182         int index = sattr->index;
1183
1184         struct it87_data *data = dev_get_drvdata(dev);
1185         long val;
1186         u8 reg;
1187
1188         if (kstrtol(buf, 10, &val) < 0)
1189                 return -EINVAL;
1190
1191         mutex_lock(&data->update_lock);
1192
1193         if (has_16bit_fans(data)) {
1194                 data->fan[nr][index] = FAN16_TO_REG(val);
1195                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1196                                  data->fan[nr][index] & 0xff);
1197                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1198                                  data->fan[nr][index] >> 8);
1199         } else {
1200                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1201                 switch (nr) {
1202                 case 0:
1203                         data->fan_div[nr] = reg & 0x07;
1204                         break;
1205                 case 1:
1206                         data->fan_div[nr] = (reg >> 3) & 0x07;
1207                         break;
1208                 case 2:
1209                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1210                         break;
1211                 }
1212                 data->fan[nr][index] =
1213                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1214                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1215                                  data->fan[nr][index]);
1216         }
1217
1218         mutex_unlock(&data->update_lock);
1219         return count;
1220 }
1221
1222 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1223                            const char *buf, size_t count)
1224 {
1225         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1226         struct it87_data *data = dev_get_drvdata(dev);
1227         int nr = sensor_attr->index;
1228         unsigned long val;
1229         int min;
1230         u8 old;
1231
1232         if (kstrtoul(buf, 10, &val) < 0)
1233                 return -EINVAL;
1234
1235         mutex_lock(&data->update_lock);
1236         old = it87_read_value(data, IT87_REG_FAN_DIV);
1237
1238         /* Save fan min limit */
1239         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1240
1241         switch (nr) {
1242         case 0:
1243         case 1:
1244                 data->fan_div[nr] = DIV_TO_REG(val);
1245                 break;
1246         case 2:
1247                 if (val < 8)
1248                         data->fan_div[nr] = 1;
1249                 else
1250                         data->fan_div[nr] = 3;
1251         }
1252         val = old & 0x80;
1253         val |= (data->fan_div[0] & 0x07);
1254         val |= (data->fan_div[1] & 0x07) << 3;
1255         if (data->fan_div[2] == 3)
1256                 val |= 0x1 << 6;
1257         it87_write_value(data, IT87_REG_FAN_DIV, val);
1258
1259         /* Restore fan min limit */
1260         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1261         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1262
1263         mutex_unlock(&data->update_lock);
1264         return count;
1265 }
1266
1267 /* Returns 0 if OK, -EINVAL otherwise */
1268 static int check_trip_points(struct device *dev, int nr)
1269 {
1270         const struct it87_data *data = dev_get_drvdata(dev);
1271         int i, err = 0;
1272
1273         if (has_old_autopwm(data)) {
1274                 for (i = 0; i < 3; i++) {
1275                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1276                                 err = -EINVAL;
1277                 }
1278                 for (i = 0; i < 2; i++) {
1279                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1280                                 err = -EINVAL;
1281                 }
1282         } else if (has_newer_autopwm(data)) {
1283                 for (i = 1; i < 3; i++) {
1284                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1285                                 err = -EINVAL;
1286                 }
1287         }
1288
1289         if (err) {
1290                 dev_err(dev,
1291                         "Inconsistent trip points, not switching to automatic mode\n");
1292                 dev_err(dev, "Adjust the trip points and try again\n");
1293         }
1294         return err;
1295 }
1296
1297 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1298                               const char *buf, size_t count)
1299 {
1300         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1301         struct it87_data *data = dev_get_drvdata(dev);
1302         int nr = sensor_attr->index;
1303         long val;
1304
1305         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1306                 return -EINVAL;
1307
1308         /* Check trip points before switching to automatic mode */
1309         if (val == 2) {
1310                 if (check_trip_points(dev, nr) < 0)
1311                         return -EINVAL;
1312         }
1313
1314         mutex_lock(&data->update_lock);
1315
1316         if (val == 0) {
1317                 if (nr < 3 && data->type != it8603) {
1318                         int tmp;
1319                         /* make sure the fan is on when in on/off mode */
1320                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1321                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1322                         /* set on/off mode */
1323                         data->fan_main_ctrl &= ~BIT(nr);
1324                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1325                                          data->fan_main_ctrl);
1326                 } else {
1327                         u8 ctrl;
1328
1329                         /* No on/off mode, set maximum pwm value */
1330                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1331                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1332                                          data->pwm_duty[nr]);
1333                         /* and set manual mode */
1334                         if (has_newer_autopwm(data)) {
1335                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1336                                         data->pwm_temp_map[nr];
1337                         } else {
1338                                 ctrl = data->pwm_duty[nr];
1339                         }
1340                         data->pwm_ctrl[nr] = ctrl;
1341                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1342                 }
1343         } else {
1344                 u8 ctrl;
1345
1346                 if (has_newer_autopwm(data)) {
1347                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1348                                 data->pwm_temp_map[nr];
1349                         if (val != 1)
1350                                 ctrl |= 0x80;
1351                 } else {
1352                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1353                 }
1354                 data->pwm_ctrl[nr] = ctrl;
1355                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1356
1357                 if (data->type != it8603 && nr < 3) {
1358                         /* set SmartGuardian mode */
1359                         data->fan_main_ctrl |= BIT(nr);
1360                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1361                                          data->fan_main_ctrl);
1362                 }
1363         }
1364
1365         mutex_unlock(&data->update_lock);
1366         return count;
1367 }
1368
1369 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1370                        const char *buf, size_t count)
1371 {
1372         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1373         struct it87_data *data = dev_get_drvdata(dev);
1374         int nr = sensor_attr->index;
1375         long val;
1376
1377         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1378                 return -EINVAL;
1379
1380         mutex_lock(&data->update_lock);
1381         it87_update_pwm_ctrl(data, nr);
1382         if (has_newer_autopwm(data)) {
1383                 /*
1384                  * If we are in automatic mode, the PWM duty cycle register
1385                  * is read-only so we can't write the value.
1386                  */
1387                 if (data->pwm_ctrl[nr] & 0x80) {
1388                         mutex_unlock(&data->update_lock);
1389                         return -EBUSY;
1390                 }
1391                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1392                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1393                                  data->pwm_duty[nr]);
1394         } else {
1395                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1396                 /*
1397                  * If we are in manual mode, write the duty cycle immediately;
1398                  * otherwise, just store it for later use.
1399                  */
1400                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1401                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1402                         it87_write_value(data, IT87_REG_PWM[nr],
1403                                          data->pwm_ctrl[nr]);
1404                 }
1405         }
1406         mutex_unlock(&data->update_lock);
1407         return count;
1408 }
1409
1410 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1411                             const char *buf, size_t count)
1412 {
1413         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1414         struct it87_data *data = dev_get_drvdata(dev);
1415         int nr = sensor_attr->index;
1416         unsigned long val;
1417         int i;
1418
1419         if (kstrtoul(buf, 10, &val) < 0)
1420                 return -EINVAL;
1421
1422         val = clamp_val(val, 0, 1000000);
1423         val *= has_newer_autopwm(data) ? 256 : 128;
1424
1425         /* Search for the nearest available frequency */
1426         for (i = 0; i < 7; i++) {
1427                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1428                         break;
1429         }
1430
1431         mutex_lock(&data->update_lock);
1432         if (nr == 0) {
1433                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1434                 data->fan_ctl |= i << 4;
1435                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1436         } else {
1437                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1438                 data->extra |= i << 4;
1439                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1440         }
1441         mutex_unlock(&data->update_lock);
1442
1443         return count;
1444 }
1445
1446 static ssize_t show_pwm_temp_map(struct device *dev,
1447                                  struct device_attribute *attr, char *buf)
1448 {
1449         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1450         struct it87_data *data = it87_update_device(dev);
1451         int nr = sensor_attr->index;
1452         int map;
1453
1454         map = data->pwm_temp_map[nr];
1455         if (map >= 3)
1456                 map = 0;        /* Should never happen */
1457         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1458                 map += 3;
1459
1460         return sprintf(buf, "%d\n", (int)BIT(map));
1461 }
1462
1463 static ssize_t set_pwm_temp_map(struct device *dev,
1464                                 struct device_attribute *attr, const char *buf,
1465                                 size_t count)
1466 {
1467         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1468         struct it87_data *data = dev_get_drvdata(dev);
1469         int nr = sensor_attr->index;
1470         long val;
1471         u8 reg;
1472
1473         if (kstrtol(buf, 10, &val) < 0)
1474                 return -EINVAL;
1475
1476         if (nr >= 3)
1477                 val -= 3;
1478
1479         switch (val) {
1480         case BIT(0):
1481                 reg = 0x00;
1482                 break;
1483         case BIT(1):
1484                 reg = 0x01;
1485                 break;
1486         case BIT(2):
1487                 reg = 0x02;
1488                 break;
1489         default:
1490                 return -EINVAL;
1491         }
1492
1493         mutex_lock(&data->update_lock);
1494         it87_update_pwm_ctrl(data, nr);
1495         data->pwm_temp_map[nr] = reg;
1496         /*
1497          * If we are in automatic mode, write the temp mapping immediately;
1498          * otherwise, just store it for later use.
1499          */
1500         if (data->pwm_ctrl[nr] & 0x80) {
1501                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1502                                                 data->pwm_temp_map[nr];
1503                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1504         }
1505         mutex_unlock(&data->update_lock);
1506         return count;
1507 }
1508
1509 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1510                              char *buf)
1511 {
1512         struct it87_data *data = it87_update_device(dev);
1513         struct sensor_device_attribute_2 *sensor_attr =
1514                         to_sensor_dev_attr_2(attr);
1515         int nr = sensor_attr->nr;
1516         int point = sensor_attr->index;
1517
1518         return sprintf(buf, "%d\n",
1519                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1520 }
1521
1522 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1523                             const char *buf, size_t count)
1524 {
1525         struct it87_data *data = dev_get_drvdata(dev);
1526         struct sensor_device_attribute_2 *sensor_attr =
1527                         to_sensor_dev_attr_2(attr);
1528         int nr = sensor_attr->nr;
1529         int point = sensor_attr->index;
1530         int regaddr;
1531         long val;
1532
1533         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1534                 return -EINVAL;
1535
1536         mutex_lock(&data->update_lock);
1537         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1538         if (has_newer_autopwm(data))
1539                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1540         else
1541                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1542         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1543         mutex_unlock(&data->update_lock);
1544         return count;
1545 }
1546
1547 static ssize_t show_auto_pwm_slope(struct device *dev,
1548                                    struct device_attribute *attr, char *buf)
1549 {
1550         struct it87_data *data = it87_update_device(dev);
1551         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1552         int nr = sensor_attr->index;
1553
1554         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1555 }
1556
1557 static ssize_t set_auto_pwm_slope(struct device *dev,
1558                                   struct device_attribute *attr,
1559                                   const char *buf, size_t count)
1560 {
1561         struct it87_data *data = dev_get_drvdata(dev);
1562         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1563         int nr = sensor_attr->index;
1564         unsigned long val;
1565
1566         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1567                 return -EINVAL;
1568
1569         mutex_lock(&data->update_lock);
1570         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1571         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1572                          data->auto_pwm[nr][1]);
1573         mutex_unlock(&data->update_lock);
1574         return count;
1575 }
1576
1577 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1578                               char *buf)
1579 {
1580         struct it87_data *data = it87_update_device(dev);
1581         struct sensor_device_attribute_2 *sensor_attr =
1582                         to_sensor_dev_attr_2(attr);
1583         int nr = sensor_attr->nr;
1584         int point = sensor_attr->index;
1585         int reg;
1586
1587         if (has_old_autopwm(data) || point)
1588                 reg = data->auto_temp[nr][point];
1589         else
1590                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1591
1592         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1593 }
1594
1595 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1596                              const char *buf, size_t count)
1597 {
1598         struct it87_data *data = dev_get_drvdata(dev);
1599         struct sensor_device_attribute_2 *sensor_attr =
1600                         to_sensor_dev_attr_2(attr);
1601         int nr = sensor_attr->nr;
1602         int point = sensor_attr->index;
1603         long val;
1604         int reg;
1605
1606         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1607                 return -EINVAL;
1608
1609         mutex_lock(&data->update_lock);
1610         if (has_newer_autopwm(data) && !point) {
1611                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1612                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1613                 data->auto_temp[nr][0] = reg;
1614                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1615         } else {
1616                 reg = TEMP_TO_REG(val);
1617                 data->auto_temp[nr][point] = reg;
1618                 if (has_newer_autopwm(data))
1619                         point--;
1620                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1621         }
1622         mutex_unlock(&data->update_lock);
1623         return count;
1624 }
1625
1626 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1627 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1628                             0, 1);
1629 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1630                           set_fan_div, 0);
1631
1632 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1633 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1634                             1, 1);
1635 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1636                           set_fan_div, 1);
1637
1638 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1639 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1640                             2, 1);
1641 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1642                           set_fan_div, 2);
1643
1644 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1645 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1646                             3, 1);
1647
1648 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1649 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1650                             4, 1);
1651
1652 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1653 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1654                             5, 1);
1655
1656 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1657                           show_pwm_enable, set_pwm_enable, 0);
1658 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1659 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1660                           set_pwm_freq, 0);
1661 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1662                           show_pwm_temp_map, set_pwm_temp_map, 0);
1663 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1664                             show_auto_pwm, set_auto_pwm, 0, 0);
1665 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1666                             show_auto_pwm, set_auto_pwm, 0, 1);
1667 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1668                             show_auto_pwm, set_auto_pwm, 0, 2);
1669 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1670                             show_auto_pwm, NULL, 0, 3);
1671 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1672                             show_auto_temp, set_auto_temp, 0, 1);
1673 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1674                             show_auto_temp, set_auto_temp, 0, 0);
1675 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1676                             show_auto_temp, set_auto_temp, 0, 2);
1677 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1678                             show_auto_temp, set_auto_temp, 0, 3);
1679 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1680                             show_auto_temp, set_auto_temp, 0, 4);
1681 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1682                             show_auto_pwm, set_auto_pwm, 0, 0);
1683 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1684                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1685
1686 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1687                           show_pwm_enable, set_pwm_enable, 1);
1688 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1689 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1690 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1691                           show_pwm_temp_map, set_pwm_temp_map, 1);
1692 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1693                             show_auto_pwm, set_auto_pwm, 1, 0);
1694 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1695                             show_auto_pwm, set_auto_pwm, 1, 1);
1696 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1697                             show_auto_pwm, set_auto_pwm, 1, 2);
1698 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1699                             show_auto_pwm, NULL, 1, 3);
1700 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1701                             show_auto_temp, set_auto_temp, 1, 1);
1702 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1703                             show_auto_temp, set_auto_temp, 1, 0);
1704 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1705                             show_auto_temp, set_auto_temp, 1, 2);
1706 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1707                             show_auto_temp, set_auto_temp, 1, 3);
1708 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1709                             show_auto_temp, set_auto_temp, 1, 4);
1710 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1711                             show_auto_pwm, set_auto_pwm, 1, 0);
1712 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1713                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1714
1715 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1716                           show_pwm_enable, set_pwm_enable, 2);
1717 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1718 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1719 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1720                           show_pwm_temp_map, set_pwm_temp_map, 2);
1721 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1722                             show_auto_pwm, set_auto_pwm, 2, 0);
1723 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1724                             show_auto_pwm, set_auto_pwm, 2, 1);
1725 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1726                             show_auto_pwm, set_auto_pwm, 2, 2);
1727 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1728                             show_auto_pwm, NULL, 2, 3);
1729 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1730                             show_auto_temp, set_auto_temp, 2, 1);
1731 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1732                             show_auto_temp, set_auto_temp, 2, 0);
1733 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1734                             show_auto_temp, set_auto_temp, 2, 2);
1735 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1736                             show_auto_temp, set_auto_temp, 2, 3);
1737 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1738                             show_auto_temp, set_auto_temp, 2, 4);
1739 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1740                             show_auto_pwm, set_auto_pwm, 2, 0);
1741 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1742                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1743
1744 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1745                           show_pwm_enable, set_pwm_enable, 3);
1746 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1747 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1748 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1749                           show_pwm_temp_map, set_pwm_temp_map, 3);
1750 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1751                             show_auto_temp, set_auto_temp, 2, 1);
1752 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1753                             show_auto_temp, set_auto_temp, 2, 0);
1754 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1755                             show_auto_temp, set_auto_temp, 2, 2);
1756 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1757                             show_auto_temp, set_auto_temp, 2, 3);
1758 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1759                             show_auto_pwm, set_auto_pwm, 3, 0);
1760 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1761                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1762
1763 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1764                           show_pwm_enable, set_pwm_enable, 4);
1765 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1766 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1767 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1768                           show_pwm_temp_map, set_pwm_temp_map, 4);
1769 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1770                             show_auto_temp, set_auto_temp, 2, 1);
1771 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1772                             show_auto_temp, set_auto_temp, 2, 0);
1773 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1774                             show_auto_temp, set_auto_temp, 2, 2);
1775 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1776                             show_auto_temp, set_auto_temp, 2, 3);
1777 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1778                             show_auto_pwm, set_auto_pwm, 4, 0);
1779 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1780                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1781
1782 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1783                           show_pwm_enable, set_pwm_enable, 5);
1784 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1785 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1786 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1787                           show_pwm_temp_map, set_pwm_temp_map, 5);
1788 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1789                             show_auto_temp, set_auto_temp, 2, 1);
1790 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1791                             show_auto_temp, set_auto_temp, 2, 0);
1792 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1793                             show_auto_temp, set_auto_temp, 2, 2);
1794 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1795                             show_auto_temp, set_auto_temp, 2, 3);
1796 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1797                             show_auto_pwm, set_auto_pwm, 5, 0);
1798 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1799                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1800
1801 /* Alarms */
1802 static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1803                            char *buf)
1804 {
1805         struct it87_data *data = it87_update_device(dev);
1806
1807         return sprintf(buf, "%u\n", data->alarms);
1808 }
1809 static DEVICE_ATTR_RO(alarms);
1810
1811 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
1812                           char *buf)
1813 {
1814         struct it87_data *data = it87_update_device(dev);
1815         int bitnr = to_sensor_dev_attr(attr)->index;
1816
1817         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
1818 }
1819
1820 static ssize_t clear_intrusion(struct device *dev,
1821                                struct device_attribute *attr, const char *buf,
1822                                size_t count)
1823 {
1824         struct it87_data *data = dev_get_drvdata(dev);
1825         int config;
1826         long val;
1827
1828         if (kstrtol(buf, 10, &val) < 0 || val != 0)
1829                 return -EINVAL;
1830
1831         mutex_lock(&data->update_lock);
1832         config = it87_read_value(data, IT87_REG_CONFIG);
1833         if (config < 0) {
1834                 count = config;
1835         } else {
1836                 config |= BIT(5);
1837                 it87_write_value(data, IT87_REG_CONFIG, config);
1838                 /* Invalidate cache to force re-read */
1839                 data->valid = 0;
1840         }
1841         mutex_unlock(&data->update_lock);
1842
1843         return count;
1844 }
1845
1846 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
1847 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
1848 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
1849 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
1850 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
1851 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
1852 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
1853 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
1854 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
1855 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
1856 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
1857 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
1858 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
1859 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
1860 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
1861 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
1862 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
1863 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
1864                           show_alarm, clear_intrusion, 4);
1865
1866 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
1867                          char *buf)
1868 {
1869         struct it87_data *data = it87_update_device(dev);
1870         int bitnr = to_sensor_dev_attr(attr)->index;
1871
1872         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
1873 }
1874
1875 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
1876                         const char *buf, size_t count)
1877 {
1878         int bitnr = to_sensor_dev_attr(attr)->index;
1879         struct it87_data *data = dev_get_drvdata(dev);
1880         long val;
1881
1882         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
1883                 return -EINVAL;
1884
1885         mutex_lock(&data->update_lock);
1886         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1887         if (val)
1888                 data->beeps |= BIT(bitnr);
1889         else
1890                 data->beeps &= ~BIT(bitnr);
1891         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
1892         mutex_unlock(&data->update_lock);
1893         return count;
1894 }
1895
1896 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
1897                           show_beep, set_beep, 1);
1898 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
1899 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
1900 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
1901 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
1902 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
1903 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
1904 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
1905 /* fanX_beep writability is set later */
1906 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
1907 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
1908 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
1909 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
1910 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
1911 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
1912 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
1913                           show_beep, set_beep, 2);
1914 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
1915 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
1916
1917 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
1918                         char *buf)
1919 {
1920         struct it87_data *data = dev_get_drvdata(dev);
1921
1922         return sprintf(buf, "%u\n", data->vrm);
1923 }
1924
1925 static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
1926                          const char *buf, size_t count)
1927 {
1928         struct it87_data *data = dev_get_drvdata(dev);
1929         unsigned long val;
1930
1931         if (kstrtoul(buf, 10, &val) < 0)
1932                 return -EINVAL;
1933
1934         data->vrm = val;
1935
1936         return count;
1937 }
1938 static DEVICE_ATTR_RW(vrm);
1939
1940 static ssize_t cpu0_vid_show(struct device *dev,
1941                              struct device_attribute *attr, char *buf)
1942 {
1943         struct it87_data *data = it87_update_device(dev);
1944
1945         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
1946 }
1947 static DEVICE_ATTR_RO(cpu0_vid);
1948
1949 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
1950                           char *buf)
1951 {
1952         static const char * const labels[] = {
1953                 "+5V",
1954                 "5VSB",
1955                 "Vbat",
1956                 "AVCC",
1957         };
1958         static const char * const labels_it8721[] = {
1959                 "+3.3V",
1960                 "3VSB",
1961                 "Vbat",
1962                 "+3.3V",
1963         };
1964         struct it87_data *data = dev_get_drvdata(dev);
1965         int nr = to_sensor_dev_attr(attr)->index;
1966         const char *label;
1967
1968         if (has_vin3_5v(data) && nr == 0)
1969                 label = labels[0];
1970         else if (has_12mv_adc(data) || has_10_9mv_adc(data))
1971                 label = labels_it8721[nr];
1972         else
1973                 label = labels[nr];
1974
1975         return sprintf(buf, "%s\n", label);
1976 }
1977 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
1978 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
1979 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
1980 /* AVCC3 */
1981 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
1982
1983 static umode_t it87_in_is_visible(struct kobject *kobj,
1984                                   struct attribute *attr, int index)
1985 {
1986         struct device *dev = container_of(kobj, struct device, kobj);
1987         struct it87_data *data = dev_get_drvdata(dev);
1988         int i = index / 5;      /* voltage index */
1989         int a = index % 5;      /* attribute index */
1990
1991         if (index >= 40) {      /* in8 and higher only have input attributes */
1992                 i = index - 40 + 8;
1993                 a = 0;
1994         }
1995
1996         if (!(data->has_in & BIT(i)))
1997                 return 0;
1998
1999         if (a == 4 && !data->has_beep)
2000                 return 0;
2001
2002         return attr->mode;
2003 }
2004
2005 static struct attribute *it87_attributes_in[] = {
2006         &sensor_dev_attr_in0_input.dev_attr.attr,
2007         &sensor_dev_attr_in0_min.dev_attr.attr,
2008         &sensor_dev_attr_in0_max.dev_attr.attr,
2009         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2010         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2011
2012         &sensor_dev_attr_in1_input.dev_attr.attr,
2013         &sensor_dev_attr_in1_min.dev_attr.attr,
2014         &sensor_dev_attr_in1_max.dev_attr.attr,
2015         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2016         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2017
2018         &sensor_dev_attr_in2_input.dev_attr.attr,
2019         &sensor_dev_attr_in2_min.dev_attr.attr,
2020         &sensor_dev_attr_in2_max.dev_attr.attr,
2021         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2022         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2023
2024         &sensor_dev_attr_in3_input.dev_attr.attr,
2025         &sensor_dev_attr_in3_min.dev_attr.attr,
2026         &sensor_dev_attr_in3_max.dev_attr.attr,
2027         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2028         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2029
2030         &sensor_dev_attr_in4_input.dev_attr.attr,
2031         &sensor_dev_attr_in4_min.dev_attr.attr,
2032         &sensor_dev_attr_in4_max.dev_attr.attr,
2033         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2034         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2035
2036         &sensor_dev_attr_in5_input.dev_attr.attr,
2037         &sensor_dev_attr_in5_min.dev_attr.attr,
2038         &sensor_dev_attr_in5_max.dev_attr.attr,
2039         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2040         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2041
2042         &sensor_dev_attr_in6_input.dev_attr.attr,
2043         &sensor_dev_attr_in6_min.dev_attr.attr,
2044         &sensor_dev_attr_in6_max.dev_attr.attr,
2045         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2046         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2047
2048         &sensor_dev_attr_in7_input.dev_attr.attr,
2049         &sensor_dev_attr_in7_min.dev_attr.attr,
2050         &sensor_dev_attr_in7_max.dev_attr.attr,
2051         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2052         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2053
2054         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2055         &sensor_dev_attr_in9_input.dev_attr.attr,
2056         &sensor_dev_attr_in10_input.dev_attr.attr,
2057         &sensor_dev_attr_in11_input.dev_attr.attr,
2058         &sensor_dev_attr_in12_input.dev_attr.attr,
2059         NULL
2060 };
2061
2062 static const struct attribute_group it87_group_in = {
2063         .attrs = it87_attributes_in,
2064         .is_visible = it87_in_is_visible,
2065 };
2066
2067 static umode_t it87_temp_is_visible(struct kobject *kobj,
2068                                     struct attribute *attr, int index)
2069 {
2070         struct device *dev = container_of(kobj, struct device, kobj);
2071         struct it87_data *data = dev_get_drvdata(dev);
2072         int i = index / 7;      /* temperature index */
2073         int a = index % 7;      /* attribute index */
2074
2075         if (index >= 21) {
2076                 i = index - 21 + 3;
2077                 a = 0;
2078         }
2079
2080         if (!(data->has_temp & BIT(i)))
2081                 return 0;
2082
2083         if (a == 5 && !has_temp_offset(data))
2084                 return 0;
2085
2086         if (a == 6 && !data->has_beep)
2087                 return 0;
2088
2089         return attr->mode;
2090 }
2091
2092 static struct attribute *it87_attributes_temp[] = {
2093         &sensor_dev_attr_temp1_input.dev_attr.attr,
2094         &sensor_dev_attr_temp1_max.dev_attr.attr,
2095         &sensor_dev_attr_temp1_min.dev_attr.attr,
2096         &sensor_dev_attr_temp1_type.dev_attr.attr,
2097         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2098         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2099         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2100
2101         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2102         &sensor_dev_attr_temp2_max.dev_attr.attr,
2103         &sensor_dev_attr_temp2_min.dev_attr.attr,
2104         &sensor_dev_attr_temp2_type.dev_attr.attr,
2105         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2106         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2107         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2108
2109         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2110         &sensor_dev_attr_temp3_max.dev_attr.attr,
2111         &sensor_dev_attr_temp3_min.dev_attr.attr,
2112         &sensor_dev_attr_temp3_type.dev_attr.attr,
2113         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2114         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2115         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2116
2117         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2118         &sensor_dev_attr_temp5_input.dev_attr.attr,
2119         &sensor_dev_attr_temp6_input.dev_attr.attr,
2120         NULL
2121 };
2122
2123 static const struct attribute_group it87_group_temp = {
2124         .attrs = it87_attributes_temp,
2125         .is_visible = it87_temp_is_visible,
2126 };
2127
2128 static umode_t it87_is_visible(struct kobject *kobj,
2129                                struct attribute *attr, int index)
2130 {
2131         struct device *dev = container_of(kobj, struct device, kobj);
2132         struct it87_data *data = dev_get_drvdata(dev);
2133
2134         if ((index == 2 || index == 3) && !data->has_vid)
2135                 return 0;
2136
2137         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2138                 return 0;
2139
2140         return attr->mode;
2141 }
2142
2143 static struct attribute *it87_attributes[] = {
2144         &dev_attr_alarms.attr,
2145         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2146         &dev_attr_vrm.attr,                             /* 2 */
2147         &dev_attr_cpu0_vid.attr,                        /* 3 */
2148         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2149         &sensor_dev_attr_in7_label.dev_attr.attr,
2150         &sensor_dev_attr_in8_label.dev_attr.attr,
2151         &sensor_dev_attr_in9_label.dev_attr.attr,
2152         NULL
2153 };
2154
2155 static const struct attribute_group it87_group = {
2156         .attrs = it87_attributes,
2157         .is_visible = it87_is_visible,
2158 };
2159
2160 static umode_t it87_fan_is_visible(struct kobject *kobj,
2161                                    struct attribute *attr, int index)
2162 {
2163         struct device *dev = container_of(kobj, struct device, kobj);
2164         struct it87_data *data = dev_get_drvdata(dev);
2165         int i = index / 5;      /* fan index */
2166         int a = index % 5;      /* attribute index */
2167
2168         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2169                 i = (index - 15) / 4 + 3;
2170                 a = (index - 15) % 4;
2171         }
2172
2173         if (!(data->has_fan & BIT(i)))
2174                 return 0;
2175
2176         if (a == 3) {                           /* beep */
2177                 if (!data->has_beep)
2178                         return 0;
2179                 /* first fan beep attribute is writable */
2180                 if (i == __ffs(data->has_fan))
2181                         return attr->mode | S_IWUSR;
2182         }
2183
2184         if (a == 4 && has_16bit_fans(data))     /* divisor */
2185                 return 0;
2186
2187         return attr->mode;
2188 }
2189
2190 static struct attribute *it87_attributes_fan[] = {
2191         &sensor_dev_attr_fan1_input.dev_attr.attr,
2192         &sensor_dev_attr_fan1_min.dev_attr.attr,
2193         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2194         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2195         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2196
2197         &sensor_dev_attr_fan2_input.dev_attr.attr,
2198         &sensor_dev_attr_fan2_min.dev_attr.attr,
2199         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2200         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2201         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2202
2203         &sensor_dev_attr_fan3_input.dev_attr.attr,
2204         &sensor_dev_attr_fan3_min.dev_attr.attr,
2205         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2206         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2207         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2208
2209         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2210         &sensor_dev_attr_fan4_min.dev_attr.attr,
2211         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2212         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2213
2214         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2215         &sensor_dev_attr_fan5_min.dev_attr.attr,
2216         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2217         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2218
2219         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2220         &sensor_dev_attr_fan6_min.dev_attr.attr,
2221         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2222         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2223         NULL
2224 };
2225
2226 static const struct attribute_group it87_group_fan = {
2227         .attrs = it87_attributes_fan,
2228         .is_visible = it87_fan_is_visible,
2229 };
2230
2231 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2232                                    struct attribute *attr, int index)
2233 {
2234         struct device *dev = container_of(kobj, struct device, kobj);
2235         struct it87_data *data = dev_get_drvdata(dev);
2236         int i = index / 4;      /* pwm index */
2237         int a = index % 4;      /* attribute index */
2238
2239         if (!(data->has_pwm & BIT(i)))
2240                 return 0;
2241
2242         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2243         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2244                 return attr->mode | S_IWUSR;
2245
2246         /* pwm2_freq is writable if there are two pwm frequency selects */
2247         if (has_pwm_freq2(data) && i == 1 && a == 2)
2248                 return attr->mode | S_IWUSR;
2249
2250         return attr->mode;
2251 }
2252
2253 static struct attribute *it87_attributes_pwm[] = {
2254         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2255         &sensor_dev_attr_pwm1.dev_attr.attr,
2256         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2257         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2258
2259         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2260         &sensor_dev_attr_pwm2.dev_attr.attr,
2261         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2262         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2263
2264         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2265         &sensor_dev_attr_pwm3.dev_attr.attr,
2266         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2267         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2268
2269         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2270         &sensor_dev_attr_pwm4.dev_attr.attr,
2271         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2272         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2273
2274         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2275         &sensor_dev_attr_pwm5.dev_attr.attr,
2276         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2277         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2278
2279         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2280         &sensor_dev_attr_pwm6.dev_attr.attr,
2281         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2282         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2283
2284         NULL
2285 };
2286
2287 static const struct attribute_group it87_group_pwm = {
2288         .attrs = it87_attributes_pwm,
2289         .is_visible = it87_pwm_is_visible,
2290 };
2291
2292 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2293                                         struct attribute *attr, int index)
2294 {
2295         struct device *dev = container_of(kobj, struct device, kobj);
2296         struct it87_data *data = dev_get_drvdata(dev);
2297         int i = index / 11;     /* pwm index */
2298         int a = index % 11;     /* attribute index */
2299
2300         if (index >= 33) {      /* pwm 4..6 */
2301                 i = (index - 33) / 6 + 3;
2302                 a = (index - 33) % 6 + 4;
2303         }
2304
2305         if (!(data->has_pwm & BIT(i)))
2306                 return 0;
2307
2308         if (has_newer_autopwm(data)) {
2309                 if (a < 4)      /* no auto point pwm */
2310                         return 0;
2311                 if (a == 8)     /* no auto_point4 */
2312                         return 0;
2313         }
2314         if (has_old_autopwm(data)) {
2315                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2316                         return 0;
2317         }
2318
2319         return attr->mode;
2320 }
2321
2322 static struct attribute *it87_attributes_auto_pwm[] = {
2323         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2324         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2325         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2326         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2327         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2328         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2329         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2330         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2331         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2332         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2333         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2334
2335         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2336         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2337         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2338         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2339         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2340         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2341         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2342         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2343         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2344         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2345         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2346
2347         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2348         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2349         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2350         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2351         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2352         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2353         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2354         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2355         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2356         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2357         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2358
2359         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2360         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2361         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2362         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2363         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2364         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2365
2366         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2367         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2368         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2369         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2370         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2371         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2372
2373         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2374         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2375         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2376         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2377         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2378         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2379
2380         NULL,
2381 };
2382
2383 static const struct attribute_group it87_group_auto_pwm = {
2384         .attrs = it87_attributes_auto_pwm,
2385         .is_visible = it87_auto_pwm_is_visible,
2386 };
2387
2388 /* SuperIO detection - will change isa_address if a chip is found */
2389 static int __init it87_find(int sioaddr, unsigned short *address,
2390                             struct it87_sio_data *sio_data)
2391 {
2392         int err;
2393         u16 chip_type;
2394         const char *board_vendor, *board_name;
2395         const struct it87_devices *config;
2396
2397         err = superio_enter(sioaddr);
2398         if (err)
2399                 return err;
2400
2401         err = -ENODEV;
2402         chip_type = force_id ? force_id : superio_inw(sioaddr, DEVID);
2403
2404         switch (chip_type) {
2405         case IT8705F_DEVID:
2406                 sio_data->type = it87;
2407                 break;
2408         case IT8712F_DEVID:
2409                 sio_data->type = it8712;
2410                 break;
2411         case IT8716F_DEVID:
2412         case IT8726F_DEVID:
2413                 sio_data->type = it8716;
2414                 break;
2415         case IT8718F_DEVID:
2416                 sio_data->type = it8718;
2417                 break;
2418         case IT8720F_DEVID:
2419                 sio_data->type = it8720;
2420                 break;
2421         case IT8721F_DEVID:
2422                 sio_data->type = it8721;
2423                 break;
2424         case IT8728F_DEVID:
2425                 sio_data->type = it8728;
2426                 break;
2427         case IT8732F_DEVID:
2428                 sio_data->type = it8732;
2429                 break;
2430         case IT8792E_DEVID:
2431                 sio_data->type = it8792;
2432                 break;
2433         case IT8771E_DEVID:
2434                 sio_data->type = it8771;
2435                 break;
2436         case IT8772E_DEVID:
2437                 sio_data->type = it8772;
2438                 break;
2439         case IT8781F_DEVID:
2440                 sio_data->type = it8781;
2441                 break;
2442         case IT8782F_DEVID:
2443                 sio_data->type = it8782;
2444                 break;
2445         case IT8783E_DEVID:
2446                 sio_data->type = it8783;
2447                 break;
2448         case IT8786E_DEVID:
2449                 sio_data->type = it8786;
2450                 break;
2451         case IT8790E_DEVID:
2452                 sio_data->type = it8790;
2453                 break;
2454         case IT8603E_DEVID:
2455         case IT8623E_DEVID:
2456                 sio_data->type = it8603;
2457                 break;
2458         case IT8620E_DEVID:
2459                 sio_data->type = it8620;
2460                 break;
2461         case IT8622E_DEVID:
2462                 sio_data->type = it8622;
2463                 break;
2464         case IT8628E_DEVID:
2465                 sio_data->type = it8628;
2466                 break;
2467         case 0xffff:    /* No device at all */
2468                 goto exit;
2469         default:
2470                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2471                 goto exit;
2472         }
2473
2474         superio_select(sioaddr, PME);
2475         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2476                 pr_info("Device not activated, skipping\n");
2477                 goto exit;
2478         }
2479
2480         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2481         if (*address == 0) {
2482                 pr_info("Base address not set, skipping\n");
2483                 goto exit;
2484         }
2485
2486         err = 0;
2487         sio_data->sioaddr = sioaddr;
2488         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2489         pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
2490                 it87_devices[sio_data->type].suffix,
2491                 *address, sio_data->revision);
2492
2493         config = &it87_devices[sio_data->type];
2494
2495         /* in7 (VSB or VCCH5V) is always internal on some chips */
2496         if (has_in7_internal(config))
2497                 sio_data->internal |= BIT(1);
2498
2499         /* in8 (Vbat) is always internal */
2500         sio_data->internal |= BIT(2);
2501
2502         /* in9 (AVCC3), always internal if supported */
2503         if (has_avcc3(config))
2504                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2505         else
2506                 sio_data->skip_in |= BIT(9);
2507
2508         if (!has_five_pwm(config))
2509                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2510         else if (!has_six_pwm(config))
2511                 sio_data->skip_pwm |= BIT(5);
2512
2513         if (!has_vid(config))
2514                 sio_data->skip_vid = 1;
2515
2516         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2517         if (sio_data->type == it87) {
2518                 /* The IT8705F has a different LD number for GPIO */
2519                 superio_select(sioaddr, 5);
2520                 sio_data->beep_pin = superio_inb(sioaddr,
2521                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2522         } else if (sio_data->type == it8783) {
2523                 int reg25, reg27, reg2a, reg2c, regef;
2524
2525                 superio_select(sioaddr, GPIO);
2526
2527                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2528                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2529                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2530                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2531                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2532
2533                 /* Check if fan3 is there or not */
2534                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2535                         sio_data->skip_fan |= BIT(2);
2536                 if ((reg25 & BIT(4)) ||
2537                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2538                         sio_data->skip_pwm |= BIT(2);
2539
2540                 /* Check if fan2 is there or not */
2541                 if (reg27 & BIT(7))
2542                         sio_data->skip_fan |= BIT(1);
2543                 if (reg27 & BIT(3))
2544                         sio_data->skip_pwm |= BIT(1);
2545
2546                 /* VIN5 */
2547                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2548                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2549
2550                 /* VIN6 */
2551                 if (reg27 & BIT(1))
2552                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2553
2554                 /*
2555                  * VIN7
2556                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2557                  */
2558                 if (reg27 & BIT(2)) {
2559                         /*
2560                          * The data sheet is a bit unclear regarding the
2561                          * internal voltage divider for VCCH5V. It says
2562                          * "This bit enables and switches VIN7 (pin 91) to the
2563                          * internal voltage divider for VCCH5V".
2564                          * This is different to other chips, where the internal
2565                          * voltage divider would connect VIN7 to an internal
2566                          * voltage source. Maybe that is the case here as well.
2567                          *
2568                          * Since we don't know for sure, re-route it if that is
2569                          * not the case, and ask the user to report if the
2570                          * resulting voltage is sane.
2571                          */
2572                         if (!(reg2c & BIT(1))) {
2573                                 reg2c |= BIT(1);
2574                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2575                                              reg2c);
2576                                 sio_data->need_in7_reroute = true;
2577                                 pr_notice("Routing internal VCCH5V to in7.\n");
2578                         }
2579                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2580                         pr_notice("Please report if it displays a reasonable voltage.\n");
2581                 }
2582
2583                 if (reg2c & BIT(0))
2584                         sio_data->internal |= BIT(0);
2585                 if (reg2c & BIT(1))
2586                         sio_data->internal |= BIT(1);
2587
2588                 sio_data->beep_pin = superio_inb(sioaddr,
2589                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2590         } else if (sio_data->type == it8603) {
2591                 int reg27, reg29;
2592
2593                 superio_select(sioaddr, GPIO);
2594
2595                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2596
2597                 /* Check if fan3 is there or not */
2598                 if (reg27 & BIT(6))
2599                         sio_data->skip_pwm |= BIT(2);
2600                 if (reg27 & BIT(7))
2601                         sio_data->skip_fan |= BIT(2);
2602
2603                 /* Check if fan2 is there or not */
2604                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2605                 if (reg29 & BIT(1))
2606                         sio_data->skip_pwm |= BIT(1);
2607                 if (reg29 & BIT(2))
2608                         sio_data->skip_fan |= BIT(1);
2609
2610                 sio_data->skip_in |= BIT(5); /* No VIN5 */
2611                 sio_data->skip_in |= BIT(6); /* No VIN6 */
2612
2613                 sio_data->beep_pin = superio_inb(sioaddr,
2614                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2615         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2616                 int reg;
2617
2618                 superio_select(sioaddr, GPIO);
2619
2620                 /* Check for pwm5 */
2621                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2622                 if (reg & BIT(6))
2623                         sio_data->skip_pwm |= BIT(4);
2624
2625                 /* Check for fan4, fan5 */
2626                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2627                 if (!(reg & BIT(5)))
2628                         sio_data->skip_fan |= BIT(3);
2629                 if (!(reg & BIT(4)))
2630                         sio_data->skip_fan |= BIT(4);
2631
2632                 /* Check for pwm3, fan3 */
2633                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2634                 if (reg & BIT(6))
2635                         sio_data->skip_pwm |= BIT(2);
2636                 if (reg & BIT(7))
2637                         sio_data->skip_fan |= BIT(2);
2638
2639                 /* Check for pwm4 */
2640                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2641                 if (reg & BIT(2))
2642                         sio_data->skip_pwm |= BIT(3);
2643
2644                 /* Check for pwm2, fan2 */
2645                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2646                 if (reg & BIT(1))
2647                         sio_data->skip_pwm |= BIT(1);
2648                 if (reg & BIT(2))
2649                         sio_data->skip_fan |= BIT(1);
2650                 /* Check for pwm6, fan6 */
2651                 if (!(reg & BIT(7))) {
2652                         sio_data->skip_pwm |= BIT(5);
2653                         sio_data->skip_fan |= BIT(5);
2654                 }
2655
2656                 /* Check if AVCC is on VIN3 */
2657                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2658                 if (reg & BIT(0))
2659                         sio_data->internal |= BIT(0);
2660                 else
2661                         sio_data->skip_in |= BIT(9);
2662
2663                 sio_data->beep_pin = superio_inb(sioaddr,
2664                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2665         } else if (sio_data->type == it8622) {
2666                 int reg;
2667
2668                 superio_select(sioaddr, GPIO);
2669
2670                 /* Check for pwm4, fan4 */
2671                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2672                 if (reg & BIT(6))
2673                         sio_data->skip_fan |= BIT(3);
2674                 if (reg & BIT(5))
2675                         sio_data->skip_pwm |= BIT(3);
2676
2677                 /* Check for pwm3, fan3, pwm5, fan5 */
2678                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2679                 if (reg & BIT(6))
2680                         sio_data->skip_pwm |= BIT(2);
2681                 if (reg & BIT(7))
2682                         sio_data->skip_fan |= BIT(2);
2683                 if (reg & BIT(3))
2684                         sio_data->skip_pwm |= BIT(4);
2685                 if (reg & BIT(1))
2686                         sio_data->skip_fan |= BIT(4);
2687
2688                 /* Check for pwm2, fan2 */
2689                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2690                 if (reg & BIT(1))
2691                         sio_data->skip_pwm |= BIT(1);
2692                 if (reg & BIT(2))
2693                         sio_data->skip_fan |= BIT(1);
2694
2695                 /* Check for AVCC */
2696                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2697                 if (!(reg & BIT(0)))
2698                         sio_data->skip_in |= BIT(9);
2699
2700                 sio_data->beep_pin = superio_inb(sioaddr,
2701                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2702         } else {
2703                 int reg;
2704                 bool uart6;
2705
2706                 superio_select(sioaddr, GPIO);
2707
2708                 /* Check for fan4, fan5 */
2709                 if (has_five_fans(config)) {
2710                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2711                         switch (sio_data->type) {
2712                         case it8718:
2713                                 if (reg & BIT(5))
2714                                         sio_data->skip_fan |= BIT(3);
2715                                 if (reg & BIT(4))
2716                                         sio_data->skip_fan |= BIT(4);
2717                                 break;
2718                         case it8720:
2719                         case it8721:
2720                         case it8728:
2721                                 if (!(reg & BIT(5)))
2722                                         sio_data->skip_fan |= BIT(3);
2723                                 if (!(reg & BIT(4)))
2724                                         sio_data->skip_fan |= BIT(4);
2725                                 break;
2726                         default:
2727                                 break;
2728                         }
2729                 }
2730
2731                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2732                 if (!sio_data->skip_vid) {
2733                         /* We need at least 4 VID pins */
2734                         if (reg & 0x0f) {
2735                                 pr_info("VID is disabled (pins used for GPIO)\n");
2736                                 sio_data->skip_vid = 1;
2737                         }
2738                 }
2739
2740                 /* Check if fan3 is there or not */
2741                 if (reg & BIT(6))
2742                         sio_data->skip_pwm |= BIT(2);
2743                 if (reg & BIT(7))
2744                         sio_data->skip_fan |= BIT(2);
2745
2746                 /* Check if fan2 is there or not */
2747                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2748                 if (reg & BIT(1))
2749                         sio_data->skip_pwm |= BIT(1);
2750                 if (reg & BIT(2))
2751                         sio_data->skip_fan |= BIT(1);
2752
2753                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2754                     !(sio_data->skip_vid))
2755                         sio_data->vid_value = superio_inb(sioaddr,
2756                                                           IT87_SIO_VID_REG);
2757
2758                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2759
2760                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2761
2762                 /*
2763                  * The IT8720F has no VIN7 pin, so VCCH5V should always be
2764                  * routed internally to VIN7 with an internal divider.
2765                  * Curiously, there still is a configuration bit to control
2766                  * this, which means it can be set incorrectly. And even
2767                  * more curiously, many boards out there are improperly
2768                  * configured, even though the IT8720F datasheet claims
2769                  * that the internal routing of VCCH5V to VIN7 is the default
2770                  * setting. So we force the internal routing in this case.
2771                  *
2772                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2773                  * If UART6 is enabled, re-route VIN7 to the internal divider
2774                  * if that is not already the case.
2775                  */
2776                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
2777                         reg |= BIT(1);
2778                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
2779                         sio_data->need_in7_reroute = true;
2780                         pr_notice("Routing internal VCCH5V to in7\n");
2781                 }
2782                 if (reg & BIT(0))
2783                         sio_data->internal |= BIT(0);
2784                 if (reg & BIT(1))
2785                         sio_data->internal |= BIT(1);
2786
2787                 /*
2788                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
2789                  * While VIN7 can be routed to the internal voltage divider,
2790                  * VIN5 and VIN6 are not available if UART6 is enabled.
2791                  *
2792                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
2793                  * is the temperature source. Since we can not read the
2794                  * temperature source here, skip_temp is preliminary.
2795                  */
2796                 if (uart6) {
2797                         sio_data->skip_in |= BIT(5) | BIT(6);
2798                         sio_data->skip_temp |= BIT(2);
2799                 }
2800
2801                 sio_data->beep_pin = superio_inb(sioaddr,
2802                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2803         }
2804         if (sio_data->beep_pin)
2805                 pr_info("Beeping is supported\n");
2806
2807         /* Disable specific features based on DMI strings */
2808         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
2809         board_name = dmi_get_system_info(DMI_BOARD_NAME);
2810         if (board_vendor && board_name) {
2811                 if (strcmp(board_vendor, "nVIDIA") == 0 &&
2812                     strcmp(board_name, "FN68PT") == 0) {
2813                         /*
2814                          * On the Shuttle SN68PT, FAN_CTL2 is apparently not
2815                          * connected to a fan, but to something else. One user
2816                          * has reported instant system power-off when changing
2817                          * the PWM2 duty cycle, so we disable it.
2818                          * I use the board name string as the trigger in case
2819                          * the same board is ever used in other systems.
2820                          */
2821                         pr_info("Disabling pwm2 due to hardware constraints\n");
2822                         sio_data->skip_pwm = BIT(1);
2823                 }
2824         }
2825
2826 exit:
2827         superio_exit(sioaddr);
2828         return err;
2829 }
2830
2831 /*
2832  * Some chips seem to have default value 0xff for all limit
2833  * registers. For low voltage limits it makes no sense and triggers
2834  * alarms, so change to 0 instead. For high temperature limits, it
2835  * means -1 degree C, which surprisingly doesn't trigger an alarm,
2836  * but is still confusing, so change to 127 degrees C.
2837  */
2838 static void it87_check_limit_regs(struct it87_data *data)
2839 {
2840         int i, reg;
2841
2842         for (i = 0; i < NUM_VIN_LIMIT; i++) {
2843                 reg = it87_read_value(data, IT87_REG_VIN_MIN(i));
2844                 if (reg == 0xff)
2845                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
2846         }
2847         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
2848                 reg = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
2849                 if (reg == 0xff)
2850                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
2851         }
2852 }
2853
2854 /* Check if voltage monitors are reset manually or by some reason */
2855 static void it87_check_voltage_monitors_reset(struct it87_data *data)
2856 {
2857         int reg;
2858
2859         reg = it87_read_value(data, IT87_REG_VIN_ENABLE);
2860         if ((reg & 0xff) == 0) {
2861                 /* Enable all voltage monitors */
2862                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
2863         }
2864 }
2865
2866 /* Check if tachometers are reset manually or by some reason */
2867 static void it87_check_tachometers_reset(struct platform_device *pdev)
2868 {
2869         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2870         struct it87_data *data = platform_get_drvdata(pdev);
2871         u8 mask, fan_main_ctrl;
2872
2873         mask = 0x70 & ~(sio_data->skip_fan << 4);
2874         fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2875         if ((fan_main_ctrl & mask) == 0) {
2876                 /* Enable all fan tachometers */
2877                 fan_main_ctrl |= mask;
2878                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
2879                                  fan_main_ctrl);
2880         }
2881 }
2882
2883 /* Set tachometers to 16-bit mode if needed */
2884 static void it87_check_tachometers_16bit_mode(struct platform_device *pdev)
2885 {
2886         struct it87_data *data = platform_get_drvdata(pdev);
2887         int reg;
2888
2889         if (!has_fan16_config(data))
2890                 return;
2891
2892         reg = it87_read_value(data, IT87_REG_FAN_16BIT);
2893         if (~reg & 0x07 & data->has_fan) {
2894                 dev_dbg(&pdev->dev,
2895                         "Setting fan1-3 to 16-bit mode\n");
2896                 it87_write_value(data, IT87_REG_FAN_16BIT,
2897                                  reg | 0x07);
2898         }
2899 }
2900
2901 static void it87_start_monitoring(struct it87_data *data)
2902 {
2903         it87_write_value(data, IT87_REG_CONFIG,
2904                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
2905                          | (update_vbat ? 0x41 : 0x01));
2906 }
2907
2908 /* Called when we have found a new IT87. */
2909 static void it87_init_device(struct platform_device *pdev)
2910 {
2911         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
2912         struct it87_data *data = platform_get_drvdata(pdev);
2913         int tmp, i;
2914
2915         /*
2916          * For each PWM channel:
2917          * - If it is in automatic mode, setting to manual mode should set
2918          *   the fan to full speed by default.
2919          * - If it is in manual mode, we need a mapping to temperature
2920          *   channels to use when later setting to automatic mode later.
2921          *   Use a 1:1 mapping by default (we are clueless.)
2922          * In both cases, the value can (and should) be changed by the user
2923          * prior to switching to a different mode.
2924          * Note that this is no longer needed for the IT8721F and later, as
2925          * these have separate registers for the temperature mapping and the
2926          * manual duty cycle.
2927          */
2928         for (i = 0; i < NUM_AUTO_PWM; i++) {
2929                 data->pwm_temp_map[i] = i;
2930                 data->pwm_duty[i] = 0x7f;       /* Full speed */
2931                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
2932         }
2933
2934         it87_check_limit_regs(data);
2935
2936         /*
2937          * Temperature channels are not forcibly enabled, as they can be
2938          * set to two different sensor types and we can't guess which one
2939          * is correct for a given system. These channels can be enabled at
2940          * run-time through the temp{1-3}_type sysfs accessors if needed.
2941          */
2942
2943         it87_check_voltage_monitors_reset(data);
2944
2945         it87_check_tachometers_reset(pdev);
2946
2947         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
2948         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
2949
2950         it87_check_tachometers_16bit_mode(pdev);
2951
2952         /* Check for additional fans */
2953         if (has_five_fans(data)) {
2954                 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
2955
2956                 if (tmp & BIT(4))
2957                         data->has_fan |= BIT(3); /* fan4 enabled */
2958                 if (tmp & BIT(5))
2959                         data->has_fan |= BIT(4); /* fan5 enabled */
2960                 if (has_six_fans(data) && (tmp & BIT(2)))
2961                         data->has_fan |= BIT(5); /* fan6 enabled */
2962         }
2963
2964         /* Fan input pins may be used for alternative functions */
2965         data->has_fan &= ~sio_data->skip_fan;
2966
2967         /* Check if pwm5, pwm6 are enabled */
2968         if (has_six_pwm(data)) {
2969                 /* The following code may be IT8620E specific */
2970                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
2971                 if ((tmp & 0xc0) == 0xc0)
2972                         sio_data->skip_pwm |= BIT(4);
2973                 if (!(tmp & BIT(3)))
2974                         sio_data->skip_pwm |= BIT(5);
2975         }
2976
2977         it87_start_monitoring(data);
2978 }
2979
2980 /* Return 1 if and only if the PWM interface is safe to use */
2981 static int it87_check_pwm(struct device *dev)
2982 {
2983         struct it87_data *data = dev_get_drvdata(dev);
2984         /*
2985          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
2986          * and polarity set to active low is sign that this is the case so we
2987          * disable pwm control to protect the user.
2988          */
2989         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
2990
2991         if ((tmp & 0x87) == 0) {
2992                 if (fix_pwm_polarity) {
2993                         /*
2994                          * The user asks us to attempt a chip reconfiguration.
2995                          * This means switching to active high polarity and
2996                          * inverting all fan speed values.
2997                          */
2998                         int i;
2999                         u8 pwm[3];
3000
3001                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3002                                 pwm[i] = it87_read_value(data,
3003                                                          IT87_REG_PWM[i]);
3004
3005                         /*
3006                          * If any fan is in automatic pwm mode, the polarity
3007                          * might be correct, as suspicious as it seems, so we
3008                          * better don't change anything (but still disable the
3009                          * PWM interface).
3010                          */
3011                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3012                                 dev_info(dev,
3013                                          "Reconfiguring PWM to active high polarity\n");
3014                                 it87_write_value(data, IT87_REG_FAN_CTL,
3015                                                  tmp | 0x87);
3016                                 for (i = 0; i < 3; i++)
3017                                         it87_write_value(data,
3018                                                          IT87_REG_PWM[i],
3019                                                          0x7f & ~pwm[i]);
3020                                 return 1;
3021                         }
3022
3023                         dev_info(dev,
3024                                  "PWM configuration is too broken to be fixed\n");
3025                 }
3026
3027                 return 0;
3028         } else if (fix_pwm_polarity) {
3029                 dev_info(dev,
3030                          "PWM configuration looks sane, won't touch\n");
3031         }
3032
3033         return 1;
3034 }
3035
3036 static int it87_probe(struct platform_device *pdev)
3037 {
3038         struct it87_data *data;
3039         struct resource *res;
3040         struct device *dev = &pdev->dev;
3041         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3042         int enable_pwm_interface;
3043         struct device *hwmon_dev;
3044
3045         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3046         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3047                                  DRVNAME)) {
3048                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3049                         (unsigned long)res->start,
3050                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3051                 return -EBUSY;
3052         }
3053
3054         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3055         if (!data)
3056                 return -ENOMEM;
3057
3058         data->addr = res->start;
3059         data->sioaddr = sio_data->sioaddr;
3060         data->type = sio_data->type;
3061         data->features = it87_devices[sio_data->type].features;
3062         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3063         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3064         /*
3065          * IT8705F Datasheet 0.4.1, 3h == Version G.
3066          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3067          * These are the first revisions with 16-bit tachometer support.
3068          */
3069         switch (data->type) {
3070         case it87:
3071                 if (sio_data->revision >= 0x03) {
3072                         data->features &= ~FEAT_OLD_AUTOPWM;
3073                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3074                 }
3075                 break;
3076         case it8712:
3077                 if (sio_data->revision >= 0x08) {
3078                         data->features &= ~FEAT_OLD_AUTOPWM;
3079                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3080                                           FEAT_FIVE_FANS;
3081                 }
3082                 break;
3083         default:
3084                 break;
3085         }
3086
3087         /* Now, we do the remaining detection. */
3088         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3089             it87_read_value(data, IT87_REG_CHIPID) != 0x90)
3090                 return -ENODEV;
3091
3092         platform_set_drvdata(pdev, data);
3093
3094         mutex_init(&data->update_lock);
3095
3096         /* Check PWM configuration */
3097         enable_pwm_interface = it87_check_pwm(dev);
3098         if (!enable_pwm_interface)
3099                 dev_info(dev,
3100                          "Detected broken BIOS defaults, disabling PWM interface\n");
3101
3102         /* Starting with IT8721F, we handle scaling of internal voltages */
3103         if (has_scaling(data)) {
3104                 if (sio_data->internal & BIT(0))
3105                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3106                 if (sio_data->internal & BIT(1))
3107                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3108                 if (sio_data->internal & BIT(2))
3109                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3110                 if (sio_data->internal & BIT(3))
3111                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3112         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3113                    sio_data->type == it8783) {
3114                 if (sio_data->internal & BIT(0))
3115                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3116                 if (sio_data->internal & BIT(1))
3117                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3118         }
3119
3120         data->has_temp = 0x07;
3121         if (sio_data->skip_temp & BIT(2)) {
3122                 if (sio_data->type == it8782 &&
3123                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3124                         data->has_temp &= ~BIT(2);
3125         }
3126
3127         data->in_internal = sio_data->internal;
3128         data->need_in7_reroute = sio_data->need_in7_reroute;
3129         data->has_in = 0x3ff & ~sio_data->skip_in;
3130
3131         if (has_six_temp(data)) {
3132                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3133
3134                 /* Check for additional temperature sensors */
3135                 if ((reg & 0x03) >= 0x02)
3136                         data->has_temp |= BIT(3);
3137                 if (((reg >> 2) & 0x03) >= 0x02)
3138                         data->has_temp |= BIT(4);
3139                 if (((reg >> 4) & 0x03) >= 0x02)
3140                         data->has_temp |= BIT(5);
3141
3142                 /* Check for additional voltage sensors */
3143                 if ((reg & 0x03) == 0x01)
3144                         data->has_in |= BIT(10);
3145                 if (((reg >> 2) & 0x03) == 0x01)
3146                         data->has_in |= BIT(11);
3147                 if (((reg >> 4) & 0x03) == 0x01)
3148                         data->has_in |= BIT(12);
3149         }
3150
3151         data->has_beep = !!sio_data->beep_pin;
3152
3153         /* Initialize the IT87 chip */
3154         it87_init_device(pdev);
3155
3156         if (!sio_data->skip_vid) {
3157                 data->has_vid = true;
3158                 data->vrm = vid_which_vrm();
3159                 /* VID reading from Super-I/O config space if available */
3160                 data->vid = sio_data->vid_value;
3161         }
3162
3163         /* Prepare for sysfs hooks */
3164         data->groups[0] = &it87_group;
3165         data->groups[1] = &it87_group_in;
3166         data->groups[2] = &it87_group_temp;
3167         data->groups[3] = &it87_group_fan;
3168
3169         if (enable_pwm_interface) {
3170                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3171                 data->has_pwm &= ~sio_data->skip_pwm;
3172
3173                 data->groups[4] = &it87_group_pwm;
3174                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3175                         data->groups[5] = &it87_group_auto_pwm;
3176         }
3177
3178         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3179                                         it87_devices[sio_data->type].name,
3180                                         data, data->groups);
3181         return PTR_ERR_OR_ZERO(hwmon_dev);
3182 }
3183
3184 static void __maybe_unused it87_resume_sio(struct platform_device *pdev)
3185 {
3186         struct it87_data *data = dev_get_drvdata(&pdev->dev);
3187         int err;
3188         int reg2c;
3189
3190         if (!data->need_in7_reroute)
3191                 return;
3192
3193         err = superio_enter(data->sioaddr);
3194         if (err) {
3195                 dev_warn(&pdev->dev,
3196                          "Unable to enter Super I/O to reroute in7 (%d)",
3197                          err);
3198                 return;
3199         }
3200
3201         superio_select(data->sioaddr, GPIO);
3202
3203         reg2c = superio_inb(data->sioaddr, IT87_SIO_PINX2_REG);
3204         if (!(reg2c & BIT(1))) {
3205                 dev_dbg(&pdev->dev,
3206                         "Routing internal VCCH5V to in7 again");
3207
3208                 reg2c |= BIT(1);
3209                 superio_outb(data->sioaddr, IT87_SIO_PINX2_REG,
3210                              reg2c);
3211         }
3212
3213         superio_exit(data->sioaddr);
3214 }
3215
3216 static int __maybe_unused it87_resume(struct device *dev)
3217 {
3218         struct platform_device *pdev = to_platform_device(dev);
3219         struct it87_data *data = dev_get_drvdata(dev);
3220
3221         it87_resume_sio(pdev);
3222
3223         mutex_lock(&data->update_lock);
3224
3225         it87_check_pwm(dev);
3226         it87_check_limit_regs(data);
3227         it87_check_voltage_monitors_reset(data);
3228         it87_check_tachometers_reset(pdev);
3229         it87_check_tachometers_16bit_mode(pdev);
3230
3231         it87_start_monitoring(data);
3232
3233         /* force update */
3234         data->valid = 0;
3235
3236         mutex_unlock(&data->update_lock);
3237
3238         it87_update_device(dev);
3239
3240         return 0;
3241 }
3242
3243 static SIMPLE_DEV_PM_OPS(it87_dev_pm_ops, NULL, it87_resume);
3244
3245 static struct platform_driver it87_driver = {
3246         .driver = {
3247                 .name   = DRVNAME,
3248                 .pm     = &it87_dev_pm_ops,
3249         },
3250         .probe  = it87_probe,
3251 };
3252
3253 static int __init it87_device_add(int index, unsigned short address,
3254                                   const struct it87_sio_data *sio_data)
3255 {
3256         struct platform_device *pdev;
3257         struct resource res = {
3258                 .start  = address + IT87_EC_OFFSET,
3259                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3260                 .name   = DRVNAME,
3261                 .flags  = IORESOURCE_IO,
3262         };
3263         int err;
3264
3265         err = acpi_check_resource_conflict(&res);
3266         if (err)
3267                 return err;
3268
3269         pdev = platform_device_alloc(DRVNAME, address);
3270         if (!pdev)
3271                 return -ENOMEM;
3272
3273         err = platform_device_add_resources(pdev, &res, 1);
3274         if (err) {
3275                 pr_err("Device resource addition failed (%d)\n", err);
3276                 goto exit_device_put;
3277         }
3278
3279         err = platform_device_add_data(pdev, sio_data,
3280                                        sizeof(struct it87_sio_data));
3281         if (err) {
3282                 pr_err("Platform data allocation failed\n");
3283                 goto exit_device_put;
3284         }
3285
3286         err = platform_device_add(pdev);
3287         if (err) {
3288                 pr_err("Device addition failed (%d)\n", err);
3289                 goto exit_device_put;
3290         }
3291
3292         it87_pdev[index] = pdev;
3293         return 0;
3294
3295 exit_device_put:
3296         platform_device_put(pdev);
3297         return err;
3298 }
3299
3300 static int __init sm_it87_init(void)
3301 {
3302         int sioaddr[2] = { REG_2E, REG_4E };
3303         struct it87_sio_data sio_data;
3304         unsigned short isa_address[2];
3305         bool found = false;
3306         int i, err;
3307
3308         err = platform_driver_register(&it87_driver);
3309         if (err)
3310                 return err;
3311
3312         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3313                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3314                 isa_address[i] = 0;
3315                 err = it87_find(sioaddr[i], &isa_address[i], &sio_data);
3316                 if (err || isa_address[i] == 0)
3317                         continue;
3318                 /*
3319                  * Don't register second chip if its ISA address matches
3320                  * the first chip's ISA address.
3321                  */
3322                 if (i && isa_address[i] == isa_address[0])
3323                         break;
3324
3325                 err = it87_device_add(i, isa_address[i], &sio_data);
3326                 if (err)
3327                         goto exit_dev_unregister;
3328
3329                 found = true;
3330
3331                 /*
3332                  * IT8705F may respond on both SIO addresses.
3333                  * Stop probing after finding one.
3334                  */
3335                 if (sio_data.type == it87)
3336                         break;
3337         }
3338
3339         if (!found) {
3340                 err = -ENODEV;
3341                 goto exit_unregister;
3342         }
3343         return 0;
3344
3345 exit_dev_unregister:
3346         /* NULL check handled by platform_device_unregister */
3347         platform_device_unregister(it87_pdev[0]);
3348 exit_unregister:
3349         platform_driver_unregister(&it87_driver);
3350         return err;
3351 }
3352
3353 static void __exit sm_it87_exit(void)
3354 {
3355         /* NULL check handled by platform_device_unregister */
3356         platform_device_unregister(it87_pdev[1]);
3357         platform_device_unregister(it87_pdev[0]);
3358         platform_driver_unregister(&it87_driver);
3359 }
3360
3361 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <jdelvare@suse.de>");
3362 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3363 module_param(update_vbat, bool, 0);
3364 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3365 module_param(fix_pwm_polarity, bool, 0);
3366 MODULE_PARM_DESC(fix_pwm_polarity,
3367                  "Force PWM polarity to active high (DANGEROUS)");
3368 MODULE_LICENSE("GPL");
3369
3370 module_init(sm_it87_init);
3371 module_exit(sm_it87_exit);