drivers/hid/amd-sfh-hid/amd_sfh_pcie.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * AMD MP2 PCIe communication driver
   4  * Copyright 2020-2021 Advanced Micro Devices, Inc.
   5  *
   6  * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
   7  *          Sandeep Singh <Sandeep.singh@amd.com>
   8  *          Basavaraj Natikar <Basavaraj.Natikar@amd.com>
   9  */
  10
  11 #include <linux/bitops.h>
  12 #include <linux/delay.h>
  13 #include <linux/dma-mapping.h>
  14 #include <linux/dmi.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/io-64-nonatomic-lo-hi.h>
  17 #include <linux/iopoll.h>
  18 #include <linux/module.h>
  19 #include <linux/slab.h>
  20
  21 #include "amd_sfh_pcie.h"
  22 #include "sfh1_1/amd_sfh_init.h"
  23
  24 #define DRIVER_NAME     "pcie_mp2_amd"
  25 #define DRIVER_DESC     "AMD(R) PCIe MP2 Communication Driver"
  26
  27 #define ACEL_EN         BIT(0)
  28 #define GYRO_EN         BIT(1)
  29 #define MAGNO_EN        BIT(2)
  30 #define HPD_EN          BIT(16)
  31 #define ALS_EN          BIT(19)
  32 #define ACS_EN          BIT(22)
  33
  34 static int sensor_mask_override = -1;
  35 module_param_named(sensor_mask, sensor_mask_override, int, 0444);
  36 MODULE_PARM_DESC(sensor_mask, "override the detected sensors mask");
  37
  38 static int amd_sfh_wait_response_v2(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts)
  39 {
  40         union cmd_response cmd_resp;
  41
  42         /* Get response with status within a max of 1600 ms timeout */
  43         if (!readl_poll_timeout(mp2->mmio + AMD_P2C_MSG(0), cmd_resp.resp,
  44                                 (cmd_resp.response_v2.response == sensor_sts &&
  45                                 cmd_resp.response_v2.status == 0 && (sid == 0xff ||
  46                                 cmd_resp.response_v2.sensor_id == sid)), 500, 1600000))
  47                 return cmd_resp.response_v2.response;
  48
  49         return SENSOR_DISABLED;
  50 }
  51
  52 static void amd_start_sensor_v2(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)
  53 {
  54         union sfh_cmd_base cmd_base;
  55
  56         cmd_base.ul = 0;
  57         cmd_base.cmd_v2.cmd_id = ENABLE_SENSOR;
  58         cmd_base.cmd_v2.intr_disable = 1;
  59         cmd_base.cmd_v2.period = info.period;
  60         cmd_base.cmd_v2.sensor_id = info.sensor_idx;
  61         cmd_base.cmd_v2.length = 16;
  62
  63         if (info.sensor_idx == als_idx)
  64                 cmd_base.cmd_v2.mem_type = USE_C2P_REG;
  65
  66         writeq(info.dma_address, privdata->mmio + AMD_C2P_MSG1);
  67         writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
  68 }
  69
  70 static void amd_stop_sensor_v2(struct amd_mp2_dev *privdata, u16 sensor_idx)
  71 {
  72         union sfh_cmd_base cmd_base;
  73
  74         cmd_base.ul = 0;
  75         cmd_base.cmd_v2.cmd_id = DISABLE_SENSOR;
  76         cmd_base.cmd_v2.intr_disable = 1;
  77         cmd_base.cmd_v2.period = 0;
  78         cmd_base.cmd_v2.sensor_id = sensor_idx;
  79         cmd_base.cmd_v2.length  = 16;
  80
  81         writeq(0x0, privdata->mmio + AMD_C2P_MSG1);
  82         writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
  83 }
  84
  85 static void amd_stop_all_sensor_v2(struct amd_mp2_dev *privdata)
  86 {
  87         union sfh_cmd_base cmd_base;
  88
  89         cmd_base.cmd_v2.cmd_id = STOP_ALL_SENSORS;
  90         cmd_base.cmd_v2.intr_disable = 1;
  91         cmd_base.cmd_v2.period = 0;
  92         cmd_base.cmd_v2.sensor_id = 0;
  93
  94         writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
  95 }
  96
  97 void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata)
  98 {
  99         if (readl(privdata->mmio + AMD_P2C_MSG(4))) {
 100                 writel(0, privdata->mmio + AMD_P2C_MSG(4));
 101                 writel(0xf, privdata->mmio + AMD_P2C_MSG(5));
 102         }
 103 }
 104
 105 void amd_sfh_clear_intr(struct amd_mp2_dev *privdata)
 106 {
 107         if (privdata->mp2_ops->clear_intr)
 108                 privdata->mp2_ops->clear_intr(privdata);
 109 }
 110
 111 static irqreturn_t amd_sfh_irq_handler(int irq, void *data)
 112 {
 113         amd_sfh_clear_intr(data);
 114
 115         return IRQ_HANDLED;
 116 }
 117
 118 int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata)
 119 {
 120         int rc;
 121
 122         pci_intx(privdata->pdev, true);
 123
 124         rc = devm_request_irq(&privdata->pdev->dev, privdata->pdev->irq,
 125                               amd_sfh_irq_handler, 0, DRIVER_NAME, privdata);
 126         if (rc) {
 127                 dev_err(&privdata->pdev->dev, "failed to request irq %d err=%d\n",
 128                         privdata->pdev->irq, rc);
 129                 return rc;
 130         }
 131
 132         return 0;
 133 }
 134
 135 static int amd_sfh_dis_sts_v2(struct amd_mp2_dev *privdata)
 136 {
 137         return (readl(privdata->mmio + AMD_P2C_MSG(1)) &
 138                       SENSOR_DISCOVERY_STATUS_MASK) >> SENSOR_DISCOVERY_STATUS_SHIFT;
 139 }
 140
 141 static void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info)
 142 {
 143         union sfh_cmd_param cmd_param;
 144         union sfh_cmd_base cmd_base;
 145
 146         /* fill up command register */
 147         memset(&cmd_base, 0, sizeof(cmd_base));
 148         cmd_base.s.cmd_id = ENABLE_SENSOR;
 149         cmd_base.s.period = info.period;
 150         cmd_base.s.sensor_id = info.sensor_idx;
 151
 152         /* fill up command param register */
 153         memset(&cmd_param, 0, sizeof(cmd_param));
 154         cmd_param.s.buf_layout = 1;
 155         cmd_param.s.buf_length = 16;
 156
 157         writeq(info.dma_address, privdata->mmio + AMD_C2P_MSG2);
 158         writel(cmd_param.ul, privdata->mmio + AMD_C2P_MSG1);
 159         writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
 160 }
 161
 162 static void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx)
 163 {
 164         union sfh_cmd_base cmd_base;
 165
 166         /* fill up command register */
 167         memset(&cmd_base, 0, sizeof(cmd_base));
 168         cmd_base.s.cmd_id = DISABLE_SENSOR;
 169         cmd_base.s.period = 0;
 170         cmd_base.s.sensor_id = sensor_idx;
 171
 172         writeq(0x0, privdata->mmio + AMD_C2P_MSG2);
 173         writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
 174 }
 175
 176 static void amd_stop_all_sensors(struct amd_mp2_dev *privdata)
 177 {
 178         union sfh_cmd_base cmd_base;
 179
 180         /* fill up command register */
 181         memset(&cmd_base, 0, sizeof(cmd_base));
 182         cmd_base.s.cmd_id = STOP_ALL_SENSORS;
 183         cmd_base.s.period = 0;
 184         cmd_base.s.sensor_id = 0;
 185
 186         writel(cmd_base.ul, privdata->mmio + AMD_C2P_MSG0);
 187 }
 188
 189 static const struct dmi_system_id dmi_sensor_mask_overrides[] = {
 190         {
 191                 .matches = {
 192                         DMI_MATCH(DMI_PRODUCT_NAME, "HP ENVY x360 Convertible 13-ag0xxx"),
 193                 },
 194                 .driver_data = (void *)(ACEL_EN | MAGNO_EN),
 195         },
 196         {
 197                 .matches = {
 198                         DMI_MATCH(DMI_PRODUCT_NAME, "HP ENVY x360 Convertible 15-cp0xxx"),
 199                 },
 200                 .driver_data = (void *)(ACEL_EN | MAGNO_EN),
 201         },
 202         { }
 203 };
 204
 205 int amd_mp2_get_sensor_num(struct amd_mp2_dev *privdata, u8 *sensor_id)
 206 {
 207         int activestatus, num_of_sensors = 0;
 208         const struct dmi_system_id *dmi_id;
 209
 210         if (sensor_mask_override == -1) {
 211                 dmi_id = dmi_first_match(dmi_sensor_mask_overrides);
 212                 if (dmi_id)
 213                         sensor_mask_override = (long)dmi_id->driver_data;
 214         }
 215
 216         if (sensor_mask_override >= 0) {
 217                 activestatus = sensor_mask_override;
 218         } else {
 219                 activestatus = privdata->mp2_acs >> 4;
 220         }
 221
 222         if (ACEL_EN  & activestatus)
 223                 sensor_id[num_of_sensors++] = accel_idx;
 224
 225         if (GYRO_EN & activestatus)
 226                 sensor_id[num_of_sensors++] = gyro_idx;
 227
 228         if (MAGNO_EN & activestatus)
 229                 sensor_id[num_of_sensors++] = mag_idx;
 230
 231         if (ALS_EN & activestatus)
 232                 sensor_id[num_of_sensors++] = als_idx;
 233
 234         if (HPD_EN & activestatus)
 235                 sensor_id[num_of_sensors++] = HPD_IDX;
 236
 237         if (ACS_EN & activestatus)
 238                 sensor_id[num_of_sensors++] = ACS_IDX;
 239
 240         return num_of_sensors;
 241 }
 242
 243 static void amd_mp2_pci_remove(void *privdata)
 244 {
 245         struct amd_mp2_dev *mp2 = privdata;
 246         amd_sfh_hid_client_deinit(privdata);
 247         mp2->mp2_ops->stop_all(mp2);
 248         pci_intx(mp2->pdev, false);
 249         amd_sfh_clear_intr(mp2);
 250 }
 251
 252 static struct amd_mp2_ops amd_sfh_ops_v2 = {
 253         .start = amd_start_sensor_v2,
 254         .stop = amd_stop_sensor_v2,
 255         .stop_all = amd_stop_all_sensor_v2,
 256         .response = amd_sfh_wait_response_v2,
 257         .clear_intr = amd_sfh_clear_intr_v2,
 258         .init_intr = amd_sfh_irq_init_v2,
 259         .discovery_status = amd_sfh_dis_sts_v2,
 260         .remove = amd_mp2_pci_remove,
 261 };
 262
 263 static struct amd_mp2_ops amd_sfh_ops = {
 264         .start = amd_start_sensor,
 265         .stop = amd_stop_sensor,
 266         .stop_all = amd_stop_all_sensors,
 267         .remove = amd_mp2_pci_remove,
 268 };
 269
 270 static void mp2_select_ops(struct amd_mp2_dev *privdata)
 271 {
 272         u8 acs;
 273
 274         privdata->mp2_acs = readl(privdata->mmio + AMD_P2C_MSG3);
 275         acs = privdata->mp2_acs & GENMASK(3, 0);
 276
 277         switch (acs) {
 278         case V2_STATUS:
 279                 privdata->mp2_ops = &amd_sfh_ops_v2;
 280                 break;
 281         default:
 282                 privdata->mp2_ops = &amd_sfh_ops;
 283                 break;
 284         }
 285 }
 286
 287 int amd_sfh_irq_init(struct amd_mp2_dev *privdata)
 288 {
 289         if (privdata->mp2_ops->init_intr)
 290                 return privdata->mp2_ops->init_intr(privdata);
 291
 292         return 0;
 293 }
 294
 295 static const struct dmi_system_id dmi_nodevs[] = {
 296         {
 297                 /*
 298                  * Google Chromebooks use Chrome OS Embedded Controller Sensor
 299                  * Hub instead of Sensor Hub Fusion and leaves MP2
 300                  * uninitialized, which disables all functionalities, even
 301                  * including the registers necessary for feature detections.
 302                  */
 303                 .matches = {
 304                         DMI_MATCH(DMI_SYS_VENDOR, "Google"),
 305                 },
 306         },
 307         { }
 308 };
 309
 310 static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 311 {
 312         struct amd_mp2_dev *privdata;
 313         int rc;
 314
 315         if (dmi_first_match(dmi_nodevs))
 316                 return -ENODEV;
 317
 318         privdata = devm_kzalloc(&pdev->dev, sizeof(*privdata), GFP_KERNEL);
 319         if (!privdata)
 320                 return -ENOMEM;
 321
 322         privdata->pdev = pdev;
 323         dev_set_drvdata(&pdev->dev, privdata);
 324         rc = pcim_enable_device(pdev);
 325         if (rc)
 326                 return rc;
 327
 328         rc = pcim_iomap_regions(pdev, BIT(2), DRIVER_NAME);
 329         if (rc)
 330                 return rc;
 331
 332         privdata->mmio = pcim_iomap_table(pdev)[2];
 333         pci_set_master(pdev);
 334         rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
 335         if (rc) {
 336                 dev_err(&pdev->dev, "failed to set DMA mask\n");
 337                 return rc;
 338         }
 339
 340         privdata->cl_data = devm_kzalloc(&pdev->dev, sizeof(struct amdtp_cl_data), GFP_KERNEL);
 341         if (!privdata->cl_data)
 342                 return -ENOMEM;
 343
 344         privdata->sfh1_1_ops = (const struct amd_sfh1_1_ops *)id->driver_data;
 345         if (privdata->sfh1_1_ops) {
 346                 rc = privdata->sfh1_1_ops->init(privdata);
 347                 if (rc)
 348                         return rc;
 349                 goto init_done;
 350         }
 351
 352         mp2_select_ops(privdata);
 353
 354         rc = amd_sfh_irq_init(privdata);
 355         if (rc) {
 356                 dev_err(&pdev->dev, "amd_sfh_irq_init failed\n");
 357                 return rc;
 358         }
 359
 360         rc = amd_sfh_hid_client_init(privdata);
 361         if (rc) {
 362                 amd_sfh_clear_intr(privdata);
 363                 if (rc != -EOPNOTSUPP)
 364                         dev_err(&pdev->dev, "amd_sfh_hid_client_init failed\n");
 365                 return rc;
 366         }
 367
 368 init_done:
 369         amd_sfh_clear_intr(privdata);
 370
 371         return devm_add_action_or_reset(&pdev->dev, privdata->mp2_ops->remove, privdata);
 372 }
 373
 374 static void amd_sfh_shutdown(struct pci_dev *pdev)
 375 {
 376         struct amd_mp2_dev *mp2 = pci_get_drvdata(pdev);
 377
 378         if (mp2 && mp2->mp2_ops)
 379                 mp2->mp2_ops->stop_all(mp2);
 380 }
 381
 382 static int __maybe_unused amd_mp2_pci_resume(struct device *dev)
 383 {
 384         struct amd_mp2_dev *mp2 = dev_get_drvdata(dev);
 385
 386         mp2->mp2_ops->resume(mp2);
 387
 388         return 0;
 389 }
 390
 391 static int __maybe_unused amd_mp2_pci_suspend(struct device *dev)
 392 {
 393         struct amd_mp2_dev *mp2 = dev_get_drvdata(dev);
 394
 395         mp2->mp2_ops->suspend(mp2);
 396
 397         return 0;
 398 }
 399
 400 static SIMPLE_DEV_PM_OPS(amd_mp2_pm_ops, amd_mp2_pci_suspend,
 401                 amd_mp2_pci_resume);
 402
 403 static const struct pci_device_id amd_mp2_pci_tbl[] = {
 404         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2) },
 405         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2_1_1),
 406           .driver_data = (kernel_ulong_t)&sfh1_1_ops },
 407         { }
 408 };
 409 MODULE_DEVICE_TABLE(pci, amd_mp2_pci_tbl);
 410
 411 static struct pci_driver amd_mp2_pci_driver = {
 412         .name           = DRIVER_NAME,
 413         .id_table       = amd_mp2_pci_tbl,
 414         .probe          = amd_mp2_pci_probe,
 415         .driver.pm      = &amd_mp2_pm_ops,
 416         .shutdown       = amd_sfh_shutdown,
 417 };
 418 module_pci_driver(amd_mp2_pci_driver);
 419
 420 MODULE_DESCRIPTION(DRIVER_DESC);
 421 MODULE_LICENSE("Dual BSD/GPL");
 422 MODULE_AUTHOR("Shyam Sundar S K <Shyam-sundar.S-k@amd.com>");
 423 MODULE_AUTHOR("Sandeep Singh <Sandeep.singh@amd.com>");
 424 MODULE_AUTHOR("Basavaraj Natikar <Basavaraj.Natikar@amd.com>");