drivers/gpu/ipu-v3/ipu-image-convert.c

   1 /*
   2  * Copyright (C) 2012-2016 Mentor Graphics Inc.
   3  *
   4  * Queued image conversion support, with tiling and rotation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; either version 2 of the License, or (at your
   9  * option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  13  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  14  * for more details.
  15  */
  16
  17 #include <linux/interrupt.h>
  18 #include <linux/dma-mapping.h>
  19 #include <video/imx-ipu-image-convert.h>
  20 #include "ipu-prv.h"
  21
  22 /*
  23  * The IC Resizer has a restriction that the output frame from the
  24  * resizer must be 1024 or less in both width (pixels) and height
  25  * (lines).
  26  *
  27  * The image converter attempts to split up a conversion when
  28  * the desired output (converted) frame resolution exceeds the
  29  * IC resizer limit of 1024 in either dimension.
  30  *
  31  * If either dimension of the output frame exceeds the limit, the
  32  * dimension is split into 1, 2, or 4 equal stripes, for a maximum
  33  * of 4*4 or 16 tiles. A conversion is then carried out for each
  34  * tile (but taking care to pass the full frame stride length to
  35  * the DMA channel's parameter memory!). IDMA double-buffering is used
  36  * to convert each tile back-to-back when possible (see note below
  37  * when double_buffering boolean is set).
  38  *
  39  * Note that the input frame must be split up into the same number
  40  * of tiles as the output frame.
  41  *
  42  * FIXME: at this point there is no attempt to deal with visible seams
  43  * at the tile boundaries when upscaling. The seams are caused by a reset
  44  * of the bilinear upscale interpolation when starting a new tile. The
  45  * seams are barely visible for small upscale factors, but become
  46  * increasingly visible as the upscale factor gets larger, since more
  47  * interpolated pixels get thrown out at the tile boundaries. A possilble
  48  * fix might be to overlap tiles of different sizes, but this must be done
  49  * while also maintaining the IDMAC dma buffer address alignment and 8x8 IRT
  50  * alignment restrictions of each tile.
  51  */
  52
  53 #define MAX_STRIPES_W    4
  54 #define MAX_STRIPES_H    4
  55 #define MAX_TILES (MAX_STRIPES_W * MAX_STRIPES_H)
  56
  57 #define MIN_W     16
  58 #define MIN_H     8
  59 #define MAX_W     4096
  60 #define MAX_H     4096
  61
  62 enum ipu_image_convert_type {
  63         IMAGE_CONVERT_IN = 0,
  64         IMAGE_CONVERT_OUT,
  65 };
  66
  67 struct ipu_image_convert_dma_buf {
  68         void          *virt;
  69         dma_addr_t    phys;
  70         unsigned long len;
  71 };
  72
  73 struct ipu_image_convert_dma_chan {
  74         int in;
  75         int out;
  76         int rot_in;
  77         int rot_out;
  78         int vdi_in_p;
  79         int vdi_in;
  80         int vdi_in_n;
  81 };
  82
  83 /* dimensions of one tile */
  84 struct ipu_image_tile {
  85         u32 width;
  86         u32 height;
  87         /* size and strides are in bytes */
  88         u32 size;
  89         u32 stride;
  90         u32 rot_stride;
  91         /* start Y or packed offset of this tile */
  92         u32 offset;
  93         /* offset from start to tile in U plane, for planar formats */
  94         u32 u_off;
  95         /* offset from start to tile in V plane, for planar formats */
  96         u32 v_off;
  97 };
  98
  99 struct ipu_image_convert_image {
 100         struct ipu_image base;
 101         enum ipu_image_convert_type type;
 102
 103         const struct ipu_image_pixfmt *fmt;
 104         unsigned int stride;
 105
 106         /* # of rows (horizontal stripes) if dest height is > 1024 */
 107         unsigned int num_rows;
 108         /* # of columns (vertical stripes) if dest width is > 1024 */
 109         unsigned int num_cols;
 110
 111         struct ipu_image_tile tile[MAX_TILES];
 112 };
 113
 114 struct ipu_image_pixfmt {
 115         u32     fourcc;        /* V4L2 fourcc */
 116         int     bpp;           /* total bpp */
 117         int     uv_width_dec;  /* decimation in width for U/V planes */
 118         int     uv_height_dec; /* decimation in height for U/V planes */
 119         bool    planar;        /* planar format */
 120         bool    uv_swapped;    /* U and V planes are swapped */
 121         bool    uv_packed;     /* partial planar (U and V in same plane) */
 122 };
 123
 124 struct ipu_image_convert_ctx;
 125 struct ipu_image_convert_chan;
 126 struct ipu_image_convert_priv;
 127
 128 struct ipu_image_convert_ctx {
 129         struct ipu_image_convert_chan *chan;
 130
 131         ipu_image_convert_cb_t complete;
 132         void *complete_context;
 133
 134         /* Source/destination image data and rotation mode */
 135         struct ipu_image_convert_image in;
 136         struct ipu_image_convert_image out;
 137         enum ipu_rotate_mode rot_mode;
 138
 139         /* intermediate buffer for rotation */
 140         struct ipu_image_convert_dma_buf rot_intermediate[2];
 141
 142         /* current buffer number for double buffering */
 143         int cur_buf_num;
 144
 145         bool aborting;
 146         struct completion aborted;
 147
 148         /* can we use double-buffering for this conversion operation? */
 149         bool double_buffering;
 150         /* num_rows * num_cols */
 151         unsigned int num_tiles;
 152         /* next tile to process */
 153         unsigned int next_tile;
 154         /* where to place converted tile in dest image */
 155         unsigned int out_tile_map[MAX_TILES];
 156
 157         struct list_head list;
 158 };
 159
 160 struct ipu_image_convert_chan {
 161         struct ipu_image_convert_priv *priv;
 162
 163         enum ipu_ic_task ic_task;
 164         const struct ipu_image_convert_dma_chan *dma_ch;
 165
 166         struct ipu_ic *ic;
 167         struct ipuv3_channel *in_chan;
 168         struct ipuv3_channel *out_chan;
 169         struct ipuv3_channel *rotation_in_chan;
 170         struct ipuv3_channel *rotation_out_chan;
 171
 172         /* the IPU end-of-frame irqs */
 173         int out_eof_irq;
 174         int rot_out_eof_irq;
 175
 176         spinlock_t irqlock;
 177
 178         /* list of convert contexts */
 179         struct list_head ctx_list;
 180         /* queue of conversion runs */
 181         struct list_head pending_q;
 182         /* queue of completed runs */
 183         struct list_head done_q;
 184
 185         /* the current conversion run */
 186         struct ipu_image_convert_run *current_run;
 187 };
 188
 189 struct ipu_image_convert_priv {
 190         struct ipu_image_convert_chan chan[IC_NUM_TASKS];
 191         struct ipu_soc *ipu;
 192 };
 193
 194 static const struct ipu_image_convert_dma_chan
 195 image_convert_dma_chan[IC_NUM_TASKS] = {
 196         [IC_TASK_VIEWFINDER] = {
 197                 .in = IPUV3_CHANNEL_MEM_IC_PRP_VF,
 198                 .out = IPUV3_CHANNEL_IC_PRP_VF_MEM,
 199                 .rot_in = IPUV3_CHANNEL_MEM_ROT_VF,
 200                 .rot_out = IPUV3_CHANNEL_ROT_VF_MEM,
 201                 .vdi_in_p = IPUV3_CHANNEL_MEM_VDI_PREV,
 202                 .vdi_in = IPUV3_CHANNEL_MEM_VDI_CUR,
 203                 .vdi_in_n = IPUV3_CHANNEL_MEM_VDI_NEXT,
 204         },
 205         [IC_TASK_POST_PROCESSOR] = {
 206                 .in = IPUV3_CHANNEL_MEM_IC_PP,
 207                 .out = IPUV3_CHANNEL_IC_PP_MEM,
 208                 .rot_in = IPUV3_CHANNEL_MEM_ROT_PP,
 209                 .rot_out = IPUV3_CHANNEL_ROT_PP_MEM,
 210         },
 211 };
 212
 213 static const struct ipu_image_pixfmt image_convert_formats[] = {
 214         {
 215                 .fourcc = V4L2_PIX_FMT_RGB565,
 216                 .bpp    = 16,
 217         }, {
 218                 .fourcc = V4L2_PIX_FMT_RGB24,
 219                 .bpp    = 24,
 220         }, {
 221                 .fourcc = V4L2_PIX_FMT_BGR24,
 222                 .bpp    = 24,
 223         }, {
 224                 .fourcc = V4L2_PIX_FMT_RGB32,
 225                 .bpp    = 32,
 226         }, {
 227                 .fourcc = V4L2_PIX_FMT_BGR32,
 228                 .bpp    = 32,
 229         }, {
 230                 .fourcc = V4L2_PIX_FMT_YUYV,
 231                 .bpp    = 16,
 232                 .uv_width_dec = 2,
 233                 .uv_height_dec = 1,
 234         }, {
 235                 .fourcc = V4L2_PIX_FMT_UYVY,
 236                 .bpp    = 16,
 237                 .uv_width_dec = 2,
 238                 .uv_height_dec = 1,
 239         }, {
 240                 .fourcc = V4L2_PIX_FMT_YUV420,
 241                 .bpp    = 12,
 242                 .planar = true,
 243                 .uv_width_dec = 2,
 244                 .uv_height_dec = 2,
 245         }, {
 246                 .fourcc = V4L2_PIX_FMT_YVU420,
 247                 .bpp    = 12,
 248                 .planar = true,
 249                 .uv_width_dec = 2,
 250                 .uv_height_dec = 2,
 251                 .uv_swapped = true,
 252         }, {
 253                 .fourcc = V4L2_PIX_FMT_NV12,
 254                 .bpp    = 12,
 255                 .planar = true,
 256                 .uv_width_dec = 2,
 257                 .uv_height_dec = 2,
 258                 .uv_packed = true,
 259         }, {
 260                 .fourcc = V4L2_PIX_FMT_YUV422P,
 261                 .bpp    = 16,
 262                 .planar = true,
 263                 .uv_width_dec = 2,
 264                 .uv_height_dec = 1,
 265         }, {
 266                 .fourcc = V4L2_PIX_FMT_NV16,
 267                 .bpp    = 16,
 268                 .planar = true,
 269                 .uv_width_dec = 2,
 270                 .uv_height_dec = 1,
 271                 .uv_packed = true,
 272         },
 273 };
 274
 275 static const struct ipu_image_pixfmt *get_format(u32 fourcc)
 276 {
 277         const struct ipu_image_pixfmt *ret = NULL;
 278         unsigned int i;
 279
 280         for (i = 0; i < ARRAY_SIZE(image_convert_formats); i++) {
 281                 if (image_convert_formats[i].fourcc == fourcc) {
 282                         ret = &image_convert_formats[i];
 283                         break;
 284                 }
 285         }
 286
 287         return ret;
 288 }
 289
 290 static void dump_format(struct ipu_image_convert_ctx *ctx,
 291                         struct ipu_image_convert_image *ic_image)
 292 {
 293         struct ipu_image_convert_chan *chan = ctx->chan;
 294         struct ipu_image_convert_priv *priv = chan->priv;
 295
 296         dev_dbg(priv->ipu->dev,
 297                 "task %u: ctx %p: %s format: %dx%d (%dx%d tiles of size %dx%d), %c%c%c%c\n",
 298                 chan->ic_task, ctx,
 299                 ic_image->type == IMAGE_CONVERT_OUT ? "Output" : "Input",
 300                 ic_image->base.pix.width, ic_image->base.pix.height,
 301                 ic_image->num_cols, ic_image->num_rows,
 302                 ic_image->tile[0].width, ic_image->tile[0].height,
 303                 ic_image->fmt->fourcc & 0xff,
 304                 (ic_image->fmt->fourcc >> 8) & 0xff,
 305                 (ic_image->fmt->fourcc >> 16) & 0xff,
 306                 (ic_image->fmt->fourcc >> 24) & 0xff);
 307 }
 308
 309 int ipu_image_convert_enum_format(int index, u32 *fourcc)
 310 {
 311         const struct ipu_image_pixfmt *fmt;
 312
 313         if (index >= (int)ARRAY_SIZE(image_convert_formats))
 314                 return -EINVAL;
 315
 316         /* Format found */
 317         fmt = &image_convert_formats[index];
 318         *fourcc = fmt->fourcc;
 319         return 0;
 320 }
 321 EXPORT_SYMBOL_GPL(ipu_image_convert_enum_format);
 322
 323 static void free_dma_buf(struct ipu_image_convert_priv *priv,
 324                          struct ipu_image_convert_dma_buf *buf)
 325 {
 326         if (buf->virt)
 327                 dma_free_coherent(priv->ipu->dev,
 328                                   buf->len, buf->virt, buf->phys);
 329         buf->virt = NULL;
 330         buf->phys = 0;
 331 }
 332
 333 static int alloc_dma_buf(struct ipu_image_convert_priv *priv,
 334                          struct ipu_image_convert_dma_buf *buf,
 335                          int size)
 336 {
 337         buf->len = PAGE_ALIGN(size);
 338         buf->virt = dma_alloc_coherent(priv->ipu->dev, buf->len, &buf->phys,
 339                                        GFP_DMA | GFP_KERNEL);
 340         if (!buf->virt) {
 341                 dev_err(priv->ipu->dev, "failed to alloc dma buffer\n");
 342                 return -ENOMEM;
 343         }
 344
 345         return 0;
 346 }
 347
 348 static inline int num_stripes(int dim)
 349 {
 350         if (dim <= 1024)
 351                 return 1;
 352         else if (dim <= 2048)
 353                 return 2;
 354         else
 355                 return 4;
 356 }
 357
 358 static void calc_tile_dimensions(struct ipu_image_convert_ctx *ctx,
 359                                  struct ipu_image_convert_image *image)
 360 {
 361         int i;
 362
 363         for (i = 0; i < ctx->num_tiles; i++) {
 364                 struct ipu_image_tile *tile = &image->tile[i];
 365
 366                 tile->height = image->base.pix.height / image->num_rows;
 367                 tile->width = image->base.pix.width / image->num_cols;
 368                 tile->size = ((tile->height * image->fmt->bpp) >> 3) *
 369                         tile->width;
 370
 371                 if (image->fmt->planar) {
 372                         tile->stride = tile->width;
 373                         tile->rot_stride = tile->height;
 374                 } else {
 375                         tile->stride =
 376                                 (image->fmt->bpp * tile->width) >> 3;
 377                         tile->rot_stride =
 378                                 (image->fmt->bpp * tile->height) >> 3;
 379                 }
 380         }
 381 }
 382
 383 /*
 384  * Use the rotation transformation to find the tile coordinates
 385  * (row, col) of a tile in the destination frame that corresponds
 386  * to the given tile coordinates of a source frame. The destination
 387  * coordinate is then converted to a tile index.
 388  */
 389 static int transform_tile_index(struct ipu_image_convert_ctx *ctx,
 390                                 int src_row, int src_col)
 391 {
 392         struct ipu_image_convert_chan *chan = ctx->chan;
 393         struct ipu_image_convert_priv *priv = chan->priv;
 394         struct ipu_image_convert_image *s_image = &ctx->in;
 395         struct ipu_image_convert_image *d_image = &ctx->out;
 396         int dst_row, dst_col;
 397
 398         /* with no rotation it's a 1:1 mapping */
 399         if (ctx->rot_mode == IPU_ROTATE_NONE)
 400                 return src_row * s_image->num_cols + src_col;
 401
 402         /*
 403          * before doing the transform, first we have to translate
 404          * source row,col for an origin in the center of s_image
 405          */
 406         src_row = src_row * 2 - (s_image->num_rows - 1);
 407         src_col = src_col * 2 - (s_image->num_cols - 1);
 408
 409         /* do the rotation transform */
 410         if (ctx->rot_mode & IPU_ROT_BIT_90) {
 411                 dst_col = -src_row;
 412                 dst_row = src_col;
 413         } else {
 414                 dst_col = src_col;
 415                 dst_row = src_row;
 416         }
 417
 418         /* apply flip */
 419         if (ctx->rot_mode & IPU_ROT_BIT_HFLIP)
 420                 dst_col = -dst_col;
 421         if (ctx->rot_mode & IPU_ROT_BIT_VFLIP)
 422                 dst_row = -dst_row;
 423
 424         dev_dbg(priv->ipu->dev, "task %u: ctx %p: [%d,%d] --> [%d,%d]\n",
 425                 chan->ic_task, ctx, src_col, src_row, dst_col, dst_row);
 426
 427         /*
 428          * finally translate dest row,col using an origin in upper
 429          * left of d_image
 430          */
 431         dst_row += d_image->num_rows - 1;
 432         dst_col += d_image->num_cols - 1;
 433         dst_row /= 2;
 434         dst_col /= 2;
 435
 436         return dst_row * d_image->num_cols + dst_col;
 437 }
 438
 439 /*
 440  * Fill the out_tile_map[] with transformed destination tile indeces.
 441  */
 442 static void calc_out_tile_map(struct ipu_image_convert_ctx *ctx)
 443 {
 444         struct ipu_image_convert_image *s_image = &ctx->in;
 445         unsigned int row, col, tile = 0;
 446
 447         for (row = 0; row < s_image->num_rows; row++) {
 448                 for (col = 0; col < s_image->num_cols; col++) {
 449                         ctx->out_tile_map[tile] =
 450                                 transform_tile_index(ctx, row, col);
 451                         tile++;
 452                 }
 453         }
 454 }
 455
 456 static void calc_tile_offsets_planar(struct ipu_image_convert_ctx *ctx,
 457                                      struct ipu_image_convert_image *image)
 458 {
 459         struct ipu_image_convert_chan *chan = ctx->chan;
 460         struct ipu_image_convert_priv *priv = chan->priv;
 461         const struct ipu_image_pixfmt *fmt = image->fmt;
 462         unsigned int row, col, tile = 0;
 463         u32 H, w, h, y_stride, uv_stride;
 464         u32 uv_row_off, uv_col_off, uv_off, u_off, v_off, tmp;
 465         u32 y_row_off, y_col_off, y_off;
 466         u32 y_size, uv_size;
 467
 468         /* setup some convenience vars */
 469         H = image->base.pix.height;
 470
 471         y_stride = image->stride;
 472         uv_stride = y_stride / fmt->uv_width_dec;
 473         if (fmt->uv_packed)
 474                 uv_stride *= 2;
 475
 476         y_size = H * y_stride;
 477         uv_size = y_size / (fmt->uv_width_dec * fmt->uv_height_dec);
 478
 479         for (row = 0; row < image->num_rows; row++) {
 480                 w = image->tile[tile].width;
 481                 h = image->tile[tile].height;
 482                 y_row_off = row * h * y_stride;
 483                 uv_row_off = (row * h * uv_stride) / fmt->uv_height_dec;
 484
 485                 for (col = 0; col < image->num_cols; col++) {
 486                         y_col_off = col * w;
 487                         uv_col_off = y_col_off / fmt->uv_width_dec;
 488                         if (fmt->uv_packed)
 489                                 uv_col_off *= 2;
 490
 491                         y_off = y_row_off + y_col_off;
 492                         uv_off = uv_row_off + uv_col_off;
 493
 494                         u_off = y_size - y_off + uv_off;
 495                         v_off = (fmt->uv_packed) ? 0 : u_off + uv_size;
 496                         if (fmt->uv_swapped) {
 497                                 tmp = u_off;
 498                                 u_off = v_off;
 499                                 v_off = tmp;
 500                         }
 501
 502                         image->tile[tile].offset = y_off;
 503                         image->tile[tile].u_off = u_off;
 504                         image->tile[tile++].v_off = v_off;
 505
 506                         dev_dbg(priv->ipu->dev,
 507                                 "task %u: ctx %p: %s@[%d,%d]: y_off %08x, u_off %08x, v_off %08x\n",
 508                                 chan->ic_task, ctx,
 509                                 image->type == IMAGE_CONVERT_IN ?
 510                                 "Input" : "Output", row, col,
 511                                 y_off, u_off, v_off);
 512                 }
 513         }
 514 }
 515
 516 static void calc_tile_offsets_packed(struct ipu_image_convert_ctx *ctx,
 517                                      struct ipu_image_convert_image *image)
 518 {
 519         struct ipu_image_convert_chan *chan = ctx->chan;
 520         struct ipu_image_convert_priv *priv = chan->priv;
 521         const struct ipu_image_pixfmt *fmt = image->fmt;
 522         unsigned int row, col, tile = 0;
 523         u32 w, h, bpp, stride;
 524         u32 row_off, col_off;
 525
 526         /* setup some convenience vars */
 527         stride = image->stride;
 528         bpp = fmt->bpp;
 529
 530         for (row = 0; row < image->num_rows; row++) {
 531                 w = image->tile[tile].width;
 532                 h = image->tile[tile].height;
 533                 row_off = row * h * stride;
 534
 535                 for (col = 0; col < image->num_cols; col++) {
 536                         col_off = (col * w * bpp) >> 3;
 537
 538                         image->tile[tile].offset = row_off + col_off;
 539                         image->tile[tile].u_off = 0;
 540                         image->tile[tile++].v_off = 0;
 541
 542                         dev_dbg(priv->ipu->dev,
 543                                 "task %u: ctx %p: %s@[%d,%d]: phys %08x\n",
 544                                 chan->ic_task, ctx,
 545                                 image->type == IMAGE_CONVERT_IN ?
 546                                 "Input" : "Output", row, col,
 547                                 row_off + col_off);
 548                 }
 549         }
 550 }
 551
 552 static void calc_tile_offsets(struct ipu_image_convert_ctx *ctx,
 553                               struct ipu_image_convert_image *image)
 554 {
 555         if (image->fmt->planar)
 556                 calc_tile_offsets_planar(ctx, image);
 557         else
 558                 calc_tile_offsets_packed(ctx, image);
 559 }
 560
 561 /*
 562  * return the number of runs in given queue (pending_q or done_q)
 563  * for this context. hold irqlock when calling.
 564  */
 565 static int get_run_count(struct ipu_image_convert_ctx *ctx,
 566                          struct list_head *q)
 567 {
 568         struct ipu_image_convert_run *run;
 569         int count = 0;
 570
 571         lockdep_assert_held(&ctx->chan->irqlock);
 572
 573         list_for_each_entry(run, q, list) {
 574                 if (run->ctx == ctx)
 575                         count++;
 576         }
 577
 578         return count;
 579 }
 580
 581 static void convert_stop(struct ipu_image_convert_run *run)
 582 {
 583         struct ipu_image_convert_ctx *ctx = run->ctx;
 584         struct ipu_image_convert_chan *chan = ctx->chan;
 585         struct ipu_image_convert_priv *priv = chan->priv;
 586
 587         dev_dbg(priv->ipu->dev, "%s: task %u: stopping ctx %p run %p\n",
 588                 __func__, chan->ic_task, ctx, run);
 589
 590         /* disable IC tasks and the channels */
 591         ipu_ic_task_disable(chan->ic);
 592         ipu_idmac_disable_channel(chan->in_chan);
 593         ipu_idmac_disable_channel(chan->out_chan);
 594
 595         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 596                 ipu_idmac_disable_channel(chan->rotation_in_chan);
 597                 ipu_idmac_disable_channel(chan->rotation_out_chan);
 598                 ipu_idmac_unlink(chan->out_chan, chan->rotation_in_chan);
 599         }
 600
 601         ipu_ic_disable(chan->ic);
 602 }
 603
 604 static void init_idmac_channel(struct ipu_image_convert_ctx *ctx,
 605                                struct ipuv3_channel *channel,
 606                                struct ipu_image_convert_image *image,
 607                                enum ipu_rotate_mode rot_mode,
 608                                bool rot_swap_width_height)
 609 {
 610         struct ipu_image_convert_chan *chan = ctx->chan;
 611         unsigned int burst_size;
 612         u32 width, height, stride;
 613         dma_addr_t addr0, addr1 = 0;
 614         struct ipu_image tile_image;
 615         unsigned int tile_idx[2];
 616
 617         if (image->type == IMAGE_CONVERT_OUT) {
 618                 tile_idx[0] = ctx->out_tile_map[0];
 619                 tile_idx[1] = ctx->out_tile_map[1];
 620         } else {
 621                 tile_idx[0] = 0;
 622                 tile_idx[1] = 1;
 623         }
 624
 625         if (rot_swap_width_height) {
 626                 width = image->tile[0].height;
 627                 height = image->tile[0].width;
 628                 stride = image->tile[0].rot_stride;
 629                 addr0 = ctx->rot_intermediate[0].phys;
 630                 if (ctx->double_buffering)
 631                         addr1 = ctx->rot_intermediate[1].phys;
 632         } else {
 633                 width = image->tile[0].width;
 634                 height = image->tile[0].height;
 635                 stride = image->stride;
 636                 addr0 = image->base.phys0 +
 637                         image->tile[tile_idx[0]].offset;
 638                 if (ctx->double_buffering)
 639                         addr1 = image->base.phys0 +
 640                                 image->tile[tile_idx[1]].offset;
 641         }
 642
 643         ipu_cpmem_zero(channel);
 644
 645         memset(&tile_image, 0, sizeof(tile_image));
 646         tile_image.pix.width = tile_image.rect.width = width;
 647         tile_image.pix.height = tile_image.rect.height = height;
 648         tile_image.pix.bytesperline = stride;
 649         tile_image.pix.pixelformat =  image->fmt->fourcc;
 650         tile_image.phys0 = addr0;
 651         tile_image.phys1 = addr1;
 652         ipu_cpmem_set_image(channel, &tile_image);
 653
 654         if (image->fmt->planar && !rot_swap_width_height)
 655                 ipu_cpmem_set_uv_offset(channel,
 656                                         image->tile[tile_idx[0]].u_off,
 657                                         image->tile[tile_idx[0]].v_off);
 658
 659         if (rot_mode)
 660                 ipu_cpmem_set_rotation(channel, rot_mode);
 661
 662         if (channel == chan->rotation_in_chan ||
 663             channel == chan->rotation_out_chan) {
 664                 burst_size = 8;
 665                 ipu_cpmem_set_block_mode(channel);
 666         } else
 667                 burst_size = (width % 16) ? 8 : 16;
 668
 669         ipu_cpmem_set_burstsize(channel, burst_size);
 670
 671         ipu_ic_task_idma_init(chan->ic, channel, width, height,
 672                               burst_size, rot_mode);
 673
 674         ipu_cpmem_set_axi_id(channel, 1);
 675
 676         ipu_idmac_set_double_buffer(channel, ctx->double_buffering);
 677 }
 678
 679 static int convert_start(struct ipu_image_convert_run *run)
 680 {
 681         struct ipu_image_convert_ctx *ctx = run->ctx;
 682         struct ipu_image_convert_chan *chan = ctx->chan;
 683         struct ipu_image_convert_priv *priv = chan->priv;
 684         struct ipu_image_convert_image *s_image = &ctx->in;
 685         struct ipu_image_convert_image *d_image = &ctx->out;
 686         enum ipu_color_space src_cs, dest_cs;
 687         unsigned int dest_width, dest_height;
 688         int ret;
 689
 690         dev_dbg(priv->ipu->dev, "%s: task %u: starting ctx %p run %p\n",
 691                 __func__, chan->ic_task, ctx, run);
 692
 693         src_cs = ipu_pixelformat_to_colorspace(s_image->fmt->fourcc);
 694         dest_cs = ipu_pixelformat_to_colorspace(d_image->fmt->fourcc);
 695
 696         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 697                 /* swap width/height for resizer */
 698                 dest_width = d_image->tile[0].height;
 699                 dest_height = d_image->tile[0].width;
 700         } else {
 701                 dest_width = d_image->tile[0].width;
 702                 dest_height = d_image->tile[0].height;
 703         }
 704
 705         /* setup the IC resizer and CSC */
 706         ret = ipu_ic_task_init(chan->ic,
 707                                s_image->tile[0].width,
 708                                s_image->tile[0].height,
 709                                dest_width,
 710                                dest_height,
 711                                src_cs, dest_cs);
 712         if (ret) {
 713                 dev_err(priv->ipu->dev, "ipu_ic_task_init failed, %d\n", ret);
 714                 return ret;
 715         }
 716
 717         /* init the source MEM-->IC PP IDMAC channel */
 718         init_idmac_channel(ctx, chan->in_chan, s_image,
 719                            IPU_ROTATE_NONE, false);
 720
 721         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 722                 /* init the IC PP-->MEM IDMAC channel */
 723                 init_idmac_channel(ctx, chan->out_chan, d_image,
 724                                    IPU_ROTATE_NONE, true);
 725
 726                 /* init the MEM-->IC PP ROT IDMAC channel */
 727                 init_idmac_channel(ctx, chan->rotation_in_chan, d_image,
 728                                    ctx->rot_mode, true);
 729
 730                 /* init the destination IC PP ROT-->MEM IDMAC channel */
 731                 init_idmac_channel(ctx, chan->rotation_out_chan, d_image,
 732                                    IPU_ROTATE_NONE, false);
 733
 734                 /* now link IC PP-->MEM to MEM-->IC PP ROT */
 735                 ipu_idmac_link(chan->out_chan, chan->rotation_in_chan);
 736         } else {
 737                 /* init the destination IC PP-->MEM IDMAC channel */
 738                 init_idmac_channel(ctx, chan->out_chan, d_image,
 739                                    ctx->rot_mode, false);
 740         }
 741
 742         /* enable the IC */
 743         ipu_ic_enable(chan->ic);
 744
 745         /* set buffers ready */
 746         ipu_idmac_select_buffer(chan->in_chan, 0);
 747         ipu_idmac_select_buffer(chan->out_chan, 0);
 748         if (ipu_rot_mode_is_irt(ctx->rot_mode))
 749                 ipu_idmac_select_buffer(chan->rotation_out_chan, 0);
 750         if (ctx->double_buffering) {
 751                 ipu_idmac_select_buffer(chan->in_chan, 1);
 752                 ipu_idmac_select_buffer(chan->out_chan, 1);
 753                 if (ipu_rot_mode_is_irt(ctx->rot_mode))
 754                         ipu_idmac_select_buffer(chan->rotation_out_chan, 1);
 755         }
 756
 757         /* enable the channels! */
 758         ipu_idmac_enable_channel(chan->in_chan);
 759         ipu_idmac_enable_channel(chan->out_chan);
 760         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 761                 ipu_idmac_enable_channel(chan->rotation_in_chan);
 762                 ipu_idmac_enable_channel(chan->rotation_out_chan);
 763         }
 764
 765         ipu_ic_task_enable(chan->ic);
 766
 767         ipu_cpmem_dump(chan->in_chan);
 768         ipu_cpmem_dump(chan->out_chan);
 769         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
 770                 ipu_cpmem_dump(chan->rotation_in_chan);
 771                 ipu_cpmem_dump(chan->rotation_out_chan);
 772         }
 773
 774         ipu_dump(priv->ipu);
 775
 776         return 0;
 777 }
 778
 779 /* hold irqlock when calling */
 780 static int do_run(struct ipu_image_convert_run *run)
 781 {
 782         struct ipu_image_convert_ctx *ctx = run->ctx;
 783         struct ipu_image_convert_chan *chan = ctx->chan;
 784
 785         lockdep_assert_held(&chan->irqlock);
 786
 787         ctx->in.base.phys0 = run->in_phys;
 788         ctx->out.base.phys0 = run->out_phys;
 789
 790         ctx->cur_buf_num = 0;
 791         ctx->next_tile = 1;
 792
 793         /* remove run from pending_q and set as current */
 794         list_del(&run->list);
 795         chan->current_run = run;
 796
 797         return convert_start(run);
 798 }
 799
 800 /* hold irqlock when calling */
 801 static void run_next(struct ipu_image_convert_chan *chan)
 802 {
 803         struct ipu_image_convert_priv *priv = chan->priv;
 804         struct ipu_image_convert_run *run, *tmp;
 805         int ret;
 806
 807         lockdep_assert_held(&chan->irqlock);
 808
 809         list_for_each_entry_safe(run, tmp, &chan->pending_q, list) {
 810                 /* skip contexts that are aborting */
 811                 if (run->ctx->aborting) {
 812                         dev_dbg(priv->ipu->dev,
 813                                 "%s: task %u: skipping aborting ctx %p run %p\n",
 814                                 __func__, chan->ic_task, run->ctx, run);
 815                         continue;
 816                 }
 817
 818                 ret = do_run(run);
 819                 if (!ret)
 820                         break;
 821
 822                 /*
 823                  * something went wrong with start, add the run
 824                  * to done q and continue to the next run in the
 825                  * pending q.
 826                  */
 827                 run->status = ret;
 828                 list_add_tail(&run->list, &chan->done_q);
 829                 chan->current_run = NULL;
 830         }
 831 }
 832
 833 static void empty_done_q(struct ipu_image_convert_chan *chan)
 834 {
 835         struct ipu_image_convert_priv *priv = chan->priv;
 836         struct ipu_image_convert_run *run;
 837         unsigned long flags;
 838
 839         spin_lock_irqsave(&chan->irqlock, flags);
 840
 841         while (!list_empty(&chan->done_q)) {
 842                 run = list_entry(chan->done_q.next,
 843                                  struct ipu_image_convert_run,
 844                                  list);
 845
 846                 list_del(&run->list);
 847
 848                 dev_dbg(priv->ipu->dev,
 849                         "%s: task %u: completing ctx %p run %p with %d\n",
 850                         __func__, chan->ic_task, run->ctx, run, run->status);
 851
 852                 /* call the completion callback and free the run */
 853                 spin_unlock_irqrestore(&chan->irqlock, flags);
 854                 run->ctx->complete(run, run->ctx->complete_context);
 855                 spin_lock_irqsave(&chan->irqlock, flags);
 856         }
 857
 858         spin_unlock_irqrestore(&chan->irqlock, flags);
 859 }
 860
 861 /*
 862  * the bottom half thread clears out the done_q, calling the
 863  * completion handler for each.
 864  */
 865 static irqreturn_t do_bh(int irq, void *dev_id)
 866 {
 867         struct ipu_image_convert_chan *chan = dev_id;
 868         struct ipu_image_convert_priv *priv = chan->priv;
 869         struct ipu_image_convert_ctx *ctx;
 870         unsigned long flags;
 871
 872         dev_dbg(priv->ipu->dev, "%s: task %u: enter\n", __func__,
 873                 chan->ic_task);
 874
 875         empty_done_q(chan);
 876
 877         spin_lock_irqsave(&chan->irqlock, flags);
 878
 879         /*
 880          * the done_q is cleared out, signal any contexts
 881          * that are aborting that abort can complete.
 882          */
 883         list_for_each_entry(ctx, &chan->ctx_list, list) {
 884                 if (ctx->aborting) {
 885                         dev_dbg(priv->ipu->dev,
 886                                 "%s: task %u: signaling abort for ctx %p\n",
 887                                 __func__, chan->ic_task, ctx);
 888                         complete(&ctx->aborted);
 889                 }
 890         }
 891
 892         spin_unlock_irqrestore(&chan->irqlock, flags);
 893
 894         dev_dbg(priv->ipu->dev, "%s: task %u: exit\n", __func__,
 895                 chan->ic_task);
 896
 897         return IRQ_HANDLED;
 898 }
 899
 900 /* hold irqlock when calling */
 901 static irqreturn_t do_irq(struct ipu_image_convert_run *run)
 902 {
 903         struct ipu_image_convert_ctx *ctx = run->ctx;
 904         struct ipu_image_convert_chan *chan = ctx->chan;
 905         struct ipu_image_tile *src_tile, *dst_tile;
 906         struct ipu_image_convert_image *s_image = &ctx->in;
 907         struct ipu_image_convert_image *d_image = &ctx->out;
 908         struct ipuv3_channel *outch;
 909         unsigned int dst_idx;
 910
 911         lockdep_assert_held(&chan->irqlock);
 912
 913         outch = ipu_rot_mode_is_irt(ctx->rot_mode) ?
 914                 chan->rotation_out_chan : chan->out_chan;
 915
 916         /*
 917          * It is difficult to stop the channel DMA before the channels
 918          * enter the paused state. Without double-buffering the channels
 919          * are always in a paused state when the EOF irq occurs, so it
 920          * is safe to stop the channels now. For double-buffering we
 921          * just ignore the abort until the operation completes, when it
 922          * is safe to shut down.
 923          */
 924         if (ctx->aborting && !ctx->double_buffering) {
 925                 convert_stop(run);
 926                 run->status = -EIO;
 927                 goto done;
 928         }
 929
 930         if (ctx->next_tile == ctx->num_tiles) {
 931                 /*
 932                  * the conversion is complete
 933                  */
 934                 convert_stop(run);
 935                 run->status = 0;
 936                 goto done;
 937         }
 938
 939         /*
 940          * not done, place the next tile buffers.
 941          */
 942         if (!ctx->double_buffering) {
 943
 944                 src_tile = &s_image->tile[ctx->next_tile];
 945                 dst_idx = ctx->out_tile_map[ctx->next_tile];
 946                 dst_tile = &d_image->tile[dst_idx];
 947
 948                 ipu_cpmem_set_buffer(chan->in_chan, 0,
 949                                      s_image->base.phys0 + src_tile->offset);
 950                 ipu_cpmem_set_buffer(outch, 0,
 951                                      d_image->base.phys0 + dst_tile->offset);
 952                 if (s_image->fmt->planar)
 953                         ipu_cpmem_set_uv_offset(chan->in_chan,
 954                                                 src_tile->u_off,
 955                                                 src_tile->v_off);
 956                 if (d_image->fmt->planar)
 957                         ipu_cpmem_set_uv_offset(outch,
 958                                                 dst_tile->u_off,
 959                                                 dst_tile->v_off);
 960
 961                 ipu_idmac_select_buffer(chan->in_chan, 0);
 962                 ipu_idmac_select_buffer(outch, 0);
 963
 964         } else if (ctx->next_tile < ctx->num_tiles - 1) {
 965
 966                 src_tile = &s_image->tile[ctx->next_tile + 1];
 967                 dst_idx = ctx->out_tile_map[ctx->next_tile + 1];
 968                 dst_tile = &d_image->tile[dst_idx];
 969
 970                 ipu_cpmem_set_buffer(chan->in_chan, ctx->cur_buf_num,
 971                                      s_image->base.phys0 + src_tile->offset);
 972                 ipu_cpmem_set_buffer(outch, ctx->cur_buf_num,
 973                                      d_image->base.phys0 + dst_tile->offset);
 974
 975                 ipu_idmac_select_buffer(chan->in_chan, ctx->cur_buf_num);
 976                 ipu_idmac_select_buffer(outch, ctx->cur_buf_num);
 977
 978                 ctx->cur_buf_num ^= 1;
 979         }
 980
 981         ctx->next_tile++;
 982         return IRQ_HANDLED;
 983 done:
 984         list_add_tail(&run->list, &chan->done_q);
 985         chan->current_run = NULL;
 986         run_next(chan);
 987         return IRQ_WAKE_THREAD;
 988 }
 989
 990 static irqreturn_t eof_irq(int irq, void *data)
 991 {
 992         struct ipu_image_convert_chan *chan = data;
 993         struct ipu_image_convert_priv *priv = chan->priv;
 994         struct ipu_image_convert_ctx *ctx;
 995         struct ipu_image_convert_run *run;
 996         unsigned long flags;
 997         irqreturn_t ret;
 998
 999         spin_lock_irqsave(&chan->irqlock, flags);
1000
1001         /* get current run and its context */
1002         run = chan->current_run;
1003         if (!run) {
1004                 ret = IRQ_NONE;
1005                 goto out;
1006         }
1007
1008         ctx = run->ctx;
1009
1010         if (irq == chan->out_eof_irq) {
1011                 if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
1012                         /* this is a rotation op, just ignore */
1013                         ret = IRQ_HANDLED;
1014                         goto out;
1015                 }
1016         } else if (irq == chan->rot_out_eof_irq) {
1017                 if (!ipu_rot_mode_is_irt(ctx->rot_mode)) {
1018                         /* this was NOT a rotation op, shouldn't happen */
1019                         dev_err(priv->ipu->dev,
1020                                 "Unexpected rotation interrupt\n");
1021                         ret = IRQ_HANDLED;
1022                         goto out;
1023                 }
1024         } else {
1025                 dev_err(priv->ipu->dev, "Received unknown irq %d\n", irq);
1026                 ret = IRQ_NONE;
1027                 goto out;
1028         }
1029
1030         ret = do_irq(run);
1031 out:
1032         spin_unlock_irqrestore(&chan->irqlock, flags);
1033         return ret;
1034 }
1035
1036 /*
1037  * try to force the completion of runs for this ctx. Called when
1038  * abort wait times out in ipu_image_convert_abort().
1039  */
1040 static void force_abort(struct ipu_image_convert_ctx *ctx)
1041 {
1042         struct ipu_image_convert_chan *chan = ctx->chan;
1043         struct ipu_image_convert_run *run;
1044         unsigned long flags;
1045
1046         spin_lock_irqsave(&chan->irqlock, flags);
1047
1048         run = chan->current_run;
1049         if (run && run->ctx == ctx) {
1050                 convert_stop(run);
1051                 run->status = -EIO;
1052                 list_add_tail(&run->list, &chan->done_q);
1053                 chan->current_run = NULL;
1054                 run_next(chan);
1055         }
1056
1057         spin_unlock_irqrestore(&chan->irqlock, flags);
1058
1059         empty_done_q(chan);
1060 }
1061
1062 static void release_ipu_resources(struct ipu_image_convert_chan *chan)
1063 {
1064         if (chan->out_eof_irq >= 0)
1065                 free_irq(chan->out_eof_irq, chan);
1066         if (chan->rot_out_eof_irq >= 0)
1067                 free_irq(chan->rot_out_eof_irq, chan);
1068
1069         if (!IS_ERR_OR_NULL(chan->in_chan))
1070                 ipu_idmac_put(chan->in_chan);
1071         if (!IS_ERR_OR_NULL(chan->out_chan))
1072                 ipu_idmac_put(chan->out_chan);
1073         if (!IS_ERR_OR_NULL(chan->rotation_in_chan))
1074                 ipu_idmac_put(chan->rotation_in_chan);
1075         if (!IS_ERR_OR_NULL(chan->rotation_out_chan))
1076                 ipu_idmac_put(chan->rotation_out_chan);
1077         if (!IS_ERR_OR_NULL(chan->ic))
1078                 ipu_ic_put(chan->ic);
1079
1080         chan->in_chan = chan->out_chan = chan->rotation_in_chan =
1081                 chan->rotation_out_chan = NULL;
1082         chan->out_eof_irq = chan->rot_out_eof_irq = -1;
1083 }
1084
1085 static int get_ipu_resources(struct ipu_image_convert_chan *chan)
1086 {
1087         const struct ipu_image_convert_dma_chan *dma = chan->dma_ch;
1088         struct ipu_image_convert_priv *priv = chan->priv;
1089         int ret;
1090
1091         /* get IC */
1092         chan->ic = ipu_ic_get(priv->ipu, chan->ic_task);
1093         if (IS_ERR(chan->ic)) {
1094                 dev_err(priv->ipu->dev, "could not acquire IC\n");
1095                 ret = PTR_ERR(chan->ic);
1096                 goto err;
1097         }
1098
1099         /* get IDMAC channels */
1100         chan->in_chan = ipu_idmac_get(priv->ipu, dma->in);
1101         chan->out_chan = ipu_idmac_get(priv->ipu, dma->out);
1102         if (IS_ERR(chan->in_chan) || IS_ERR(chan->out_chan)) {
1103                 dev_err(priv->ipu->dev, "could not acquire idmac channels\n");
1104                 ret = -EBUSY;
1105                 goto err;
1106         }
1107
1108         chan->rotation_in_chan = ipu_idmac_get(priv->ipu, dma->rot_in);
1109         chan->rotation_out_chan = ipu_idmac_get(priv->ipu, dma->rot_out);
1110         if (IS_ERR(chan->rotation_in_chan) || IS_ERR(chan->rotation_out_chan)) {
1111                 dev_err(priv->ipu->dev,
1112                         "could not acquire idmac rotation channels\n");
1113                 ret = -EBUSY;
1114                 goto err;
1115         }
1116
1117         /* acquire the EOF interrupts */
1118         chan->out_eof_irq = ipu_idmac_channel_irq(priv->ipu,
1119                                                   chan->out_chan,
1120                                                   IPU_IRQ_EOF);
1121
1122         ret = request_threaded_irq(chan->out_eof_irq, eof_irq, do_bh,
1123                                    0, "ipu-ic", chan);
1124         if (ret < 0) {
1125                 dev_err(priv->ipu->dev, "could not acquire irq %d\n",
1126                          chan->out_eof_irq);
1127                 chan->out_eof_irq = -1;
1128                 goto err;
1129         }
1130
1131         chan->rot_out_eof_irq = ipu_idmac_channel_irq(priv->ipu,
1132                                                      chan->rotation_out_chan,
1133                                                      IPU_IRQ_EOF);
1134
1135         ret = request_threaded_irq(chan->rot_out_eof_irq, eof_irq, do_bh,
1136                                    0, "ipu-ic", chan);
1137         if (ret < 0) {
1138                 dev_err(priv->ipu->dev, "could not acquire irq %d\n",
1139                         chan->rot_out_eof_irq);
1140                 chan->rot_out_eof_irq = -1;
1141                 goto err;
1142         }
1143
1144         return 0;
1145 err:
1146         release_ipu_resources(chan);
1147         return ret;
1148 }
1149
1150 static int fill_image(struct ipu_image_convert_ctx *ctx,
1151                       struct ipu_image_convert_image *ic_image,
1152                       struct ipu_image *image,
1153                       enum ipu_image_convert_type type)
1154 {
1155         struct ipu_image_convert_priv *priv = ctx->chan->priv;
1156
1157         ic_image->base = *image;
1158         ic_image->type = type;
1159
1160         ic_image->fmt = get_format(image->pix.pixelformat);
1161         if (!ic_image->fmt) {
1162                 dev_err(priv->ipu->dev, "pixelformat not supported for %s\n",
1163                         type == IMAGE_CONVERT_OUT ? "Output" : "Input");
1164                 return -EINVAL;
1165         }
1166
1167         if (ic_image->fmt->planar)
1168                 ic_image->stride = ic_image->base.pix.width;
1169         else
1170                 ic_image->stride  = ic_image->base.pix.bytesperline;
1171
1172         calc_tile_dimensions(ctx, ic_image);
1173         calc_tile_offsets(ctx, ic_image);
1174
1175         return 0;
1176 }
1177
1178 /* borrowed from drivers/media/v4l2-core/v4l2-common.c */
1179 static unsigned int clamp_align(unsigned int x, unsigned int min,
1180                                 unsigned int max, unsigned int align)
1181 {
1182         /* Bits that must be zero to be aligned */
1183         unsigned int mask = ~((1 << align) - 1);
1184
1185         /* Clamp to aligned min and max */
1186         x = clamp(x, (min + ~mask) & mask, max & mask);
1187
1188         /* Round to nearest aligned value */
1189         if (align)
1190                 x = (x + (1 << (align - 1))) & mask;
1191
1192         return x;
1193 }
1194
1195 /*
1196  * We have to adjust the tile width such that the tile physaddrs and
1197  * U and V plane offsets are multiples of 8 bytes as required by
1198  * the IPU DMA Controller. For the planar formats, this corresponds
1199  * to a pixel alignment of 16 (but use a more formal equation since
1200  * the variables are available). For all the packed formats, 8 is
1201  * good enough.
1202  */
1203 static inline u32 tile_width_align(const struct ipu_image_pixfmt *fmt)
1204 {
1205         return fmt->planar ? 8 * fmt->uv_width_dec : 8;
1206 }
1207
1208 /*
1209  * For tile height alignment, we have to ensure that the output tile
1210  * heights are multiples of 8 lines if the IRT is required by the
1211  * given rotation mode (the IRT performs rotations on 8x8 blocks
1212  * at a time). If the IRT is not used, or for input image tiles,
1213  * 2 lines are good enough.
1214  */
1215 static inline u32 tile_height_align(enum ipu_image_convert_type type,
1216                                     enum ipu_rotate_mode rot_mode)
1217 {
1218         return (type == IMAGE_CONVERT_OUT &&
1219                 ipu_rot_mode_is_irt(rot_mode)) ? 8 : 2;
1220 }
1221
1222 /* Adjusts input/output images to IPU restrictions */
1223 void ipu_image_convert_adjust(struct ipu_image *in, struct ipu_image *out,
1224                               enum ipu_rotate_mode rot_mode)
1225 {
1226         const struct ipu_image_pixfmt *infmt, *outfmt;
1227         unsigned int num_in_rows, num_in_cols;
1228         unsigned int num_out_rows, num_out_cols;
1229         u32 w_align, h_align;
1230
1231         infmt = get_format(in->pix.pixelformat);
1232         outfmt = get_format(out->pix.pixelformat);
1233
1234         /* set some default pixel formats if needed */
1235         if (!infmt) {
1236                 in->pix.pixelformat = V4L2_PIX_FMT_RGB24;
1237                 infmt = get_format(V4L2_PIX_FMT_RGB24);
1238         }
1239         if (!outfmt) {
1240                 out->pix.pixelformat = V4L2_PIX_FMT_RGB24;
1241                 outfmt = get_format(V4L2_PIX_FMT_RGB24);
1242         }
1243
1244         /* image converter does not handle fields */
1245         in->pix.field = out->pix.field = V4L2_FIELD_NONE;
1246
1247         /* resizer cannot downsize more than 4:1 */
1248         if (ipu_rot_mode_is_irt(rot_mode)) {
1249                 out->pix.height = max_t(__u32, out->pix.height,
1250                                         in->pix.width / 4);
1251                 out->pix.width = max_t(__u32, out->pix.width,
1252                                        in->pix.height / 4);
1253         } else {
1254                 out->pix.width = max_t(__u32, out->pix.width,
1255                                        in->pix.width / 4);
1256                 out->pix.height = max_t(__u32, out->pix.height,
1257                                         in->pix.height / 4);
1258         }
1259
1260         /* get tiling rows/cols from output format */
1261         num_out_rows = num_stripes(out->pix.height);
1262         num_out_cols = num_stripes(out->pix.width);
1263         if (ipu_rot_mode_is_irt(rot_mode)) {
1264                 num_in_rows = num_out_cols;
1265                 num_in_cols = num_out_rows;
1266         } else {
1267                 num_in_rows = num_out_rows;
1268                 num_in_cols = num_out_cols;
1269         }
1270
1271         /* align input width/height */
1272         w_align = ilog2(tile_width_align(infmt) * num_in_cols);
1273         h_align = ilog2(tile_height_align(IMAGE_CONVERT_IN, rot_mode) *
1274                         num_in_rows);
1275         in->pix.width = clamp_align(in->pix.width, MIN_W, MAX_W, w_align);
1276         in->pix.height = clamp_align(in->pix.height, MIN_H, MAX_H, h_align);
1277
1278         /* align output width/height */
1279         w_align = ilog2(tile_width_align(outfmt) * num_out_cols);
1280         h_align = ilog2(tile_height_align(IMAGE_CONVERT_OUT, rot_mode) *
1281                         num_out_rows);
1282         out->pix.width = clamp_align(out->pix.width, MIN_W, MAX_W, w_align);
1283         out->pix.height = clamp_align(out->pix.height, MIN_H, MAX_H, h_align);
1284
1285         /* set input/output strides and image sizes */
1286         in->pix.bytesperline = (in->pix.width * infmt->bpp) >> 3;
1287         in->pix.sizeimage = in->pix.height * in->pix.bytesperline;
1288         out->pix.bytesperline = (out->pix.width * outfmt->bpp) >> 3;
1289         out->pix.sizeimage = out->pix.height * out->pix.bytesperline;
1290 }
1291 EXPORT_SYMBOL_GPL(ipu_image_convert_adjust);
1292
1293 /*
1294  * this is used by ipu_image_convert_prepare() to verify set input and
1295  * output images are valid before starting the conversion. Clients can
1296  * also call it before calling ipu_image_convert_prepare().
1297  */
1298 int ipu_image_convert_verify(struct ipu_image *in, struct ipu_image *out,
1299                              enum ipu_rotate_mode rot_mode)
1300 {
1301         struct ipu_image testin, testout;
1302
1303         testin = *in;
1304         testout = *out;
1305
1306         ipu_image_convert_adjust(&testin, &testout, rot_mode);
1307
1308         if (testin.pix.width != in->pix.width ||
1309             testin.pix.height != in->pix.height ||
1310             testout.pix.width != out->pix.width ||
1311             testout.pix.height != out->pix.height)
1312                 return -EINVAL;
1313
1314         return 0;
1315 }
1316 EXPORT_SYMBOL_GPL(ipu_image_convert_verify);
1317
1318 /*
1319  * Call ipu_image_convert_prepare() to prepare for the conversion of
1320  * given images and rotation mode. Returns a new conversion context.
1321  */
1322 struct ipu_image_convert_ctx *
1323 ipu_image_convert_prepare(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
1324                           struct ipu_image *in, struct ipu_image *out,
1325                           enum ipu_rotate_mode rot_mode,
1326                           ipu_image_convert_cb_t complete,
1327                           void *complete_context)
1328 {
1329         struct ipu_image_convert_priv *priv = ipu->image_convert_priv;
1330         struct ipu_image_convert_image *s_image, *d_image;
1331         struct ipu_image_convert_chan *chan;
1332         struct ipu_image_convert_ctx *ctx;
1333         unsigned long flags;
1334         bool get_res;
1335         int ret;
1336
1337         if (!in || !out || !complete ||
1338             (ic_task != IC_TASK_VIEWFINDER &&
1339              ic_task != IC_TASK_POST_PROCESSOR))
1340                 return ERR_PTR(-EINVAL);
1341
1342         /* verify the in/out images before continuing */
1343         ret = ipu_image_convert_verify(in, out, rot_mode);
1344         if (ret) {
1345                 dev_err(priv->ipu->dev, "%s: in/out formats invalid\n",
1346                         __func__);
1347                 return ERR_PTR(ret);
1348         }
1349
1350         chan = &priv->chan[ic_task];
1351
1352         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1353         if (!ctx)
1354                 return ERR_PTR(-ENOMEM);
1355
1356         dev_dbg(priv->ipu->dev, "%s: task %u: ctx %p\n", __func__,
1357                 chan->ic_task, ctx);
1358
1359         ctx->chan = chan;
1360         init_completion(&ctx->aborted);
1361
1362         s_image = &ctx->in;
1363         d_image = &ctx->out;
1364
1365         /* set tiling and rotation */
1366         d_image->num_rows = num_stripes(out->pix.height);
1367         d_image->num_cols = num_stripes(out->pix.width);
1368         if (ipu_rot_mode_is_irt(rot_mode)) {
1369                 s_image->num_rows = d_image->num_cols;
1370                 s_image->num_cols = d_image->num_rows;
1371         } else {
1372                 s_image->num_rows = d_image->num_rows;
1373                 s_image->num_cols = d_image->num_cols;
1374         }
1375
1376         ctx->num_tiles = d_image->num_cols * d_image->num_rows;
1377         ctx->rot_mode = rot_mode;
1378
1379         ret = fill_image(ctx, s_image, in, IMAGE_CONVERT_IN);
1380         if (ret)
1381                 goto out_free;
1382         ret = fill_image(ctx, d_image, out, IMAGE_CONVERT_OUT);
1383         if (ret)
1384                 goto out_free;
1385
1386         calc_out_tile_map(ctx);
1387
1388         dump_format(ctx, s_image);
1389         dump_format(ctx, d_image);
1390
1391         ctx->complete = complete;
1392         ctx->complete_context = complete_context;
1393
1394         /*
1395          * Can we use double-buffering for this operation? If there is
1396          * only one tile (the whole image can be converted in a single
1397          * operation) there's no point in using double-buffering. Also,
1398          * the IPU's IDMAC channels allow only a single U and V plane
1399          * offset shared between both buffers, but these offsets change
1400          * for every tile, and therefore would have to be updated for
1401          * each buffer which is not possible. So double-buffering is
1402          * impossible when either the source or destination images are
1403          * a planar format (YUV420, YUV422P, etc.).
1404          */
1405         ctx->double_buffering = (ctx->num_tiles > 1 &&
1406                                  !s_image->fmt->planar &&
1407                                  !d_image->fmt->planar);
1408
1409         if (ipu_rot_mode_is_irt(ctx->rot_mode)) {
1410                 ret = alloc_dma_buf(priv, &ctx->rot_intermediate[0],
1411                                     d_image->tile[0].size);
1412                 if (ret)
1413                         goto out_free;
1414                 if (ctx->double_buffering) {
1415                         ret = alloc_dma_buf(priv,
1416                                             &ctx->rot_intermediate[1],
1417                                             d_image->tile[0].size);
1418                         if (ret)
1419                                 goto out_free_dmabuf0;
1420                 }
1421         }
1422
1423         spin_lock_irqsave(&chan->irqlock, flags);
1424
1425         get_res = list_empty(&chan->ctx_list);
1426
1427         list_add_tail(&ctx->list, &chan->ctx_list);
1428
1429         spin_unlock_irqrestore(&chan->irqlock, flags);
1430
1431         if (get_res) {
1432                 ret = get_ipu_resources(chan);
1433                 if (ret)
1434                         goto out_free_dmabuf1;
1435         }
1436
1437         return ctx;
1438
1439 out_free_dmabuf1:
1440         free_dma_buf(priv, &ctx->rot_intermediate[1]);
1441         spin_lock_irqsave(&chan->irqlock, flags);
1442         list_del(&ctx->list);
1443         spin_unlock_irqrestore(&chan->irqlock, flags);
1444 out_free_dmabuf0:
1445         free_dma_buf(priv, &ctx->rot_intermediate[0]);
1446 out_free:
1447         kfree(ctx);
1448         return ERR_PTR(ret);
1449 }
1450 EXPORT_SYMBOL_GPL(ipu_image_convert_prepare);
1451
1452 /*
1453  * Carry out a single image conversion run. Only the physaddr's of the input
1454  * and output image buffers are needed. The conversion context must have
1455  * been created previously with ipu_image_convert_prepare().
1456  */
1457 int ipu_image_convert_queue(struct ipu_image_convert_run *run)
1458 {
1459         struct ipu_image_convert_chan *chan;
1460         struct ipu_image_convert_priv *priv;
1461         struct ipu_image_convert_ctx *ctx;
1462         unsigned long flags;
1463         int ret = 0;
1464
1465         if (!run || !run->ctx || !run->in_phys || !run->out_phys)
1466                 return -EINVAL;
1467
1468         ctx = run->ctx;
1469         chan = ctx->chan;
1470         priv = chan->priv;
1471
1472         dev_dbg(priv->ipu->dev, "%s: task %u: ctx %p run %p\n", __func__,
1473                 chan->ic_task, ctx, run);
1474
1475         INIT_LIST_HEAD(&run->list);
1476
1477         spin_lock_irqsave(&chan->irqlock, flags);
1478
1479         if (ctx->aborting) {
1480                 ret = -EIO;
1481                 goto unlock;
1482         }
1483
1484         list_add_tail(&run->list, &chan->pending_q);
1485
1486         if (!chan->current_run) {
1487                 ret = do_run(run);
1488                 if (ret)
1489                         chan->current_run = NULL;
1490         }
1491 unlock:
1492         spin_unlock_irqrestore(&chan->irqlock, flags);
1493         return ret;
1494 }
1495 EXPORT_SYMBOL_GPL(ipu_image_convert_queue);
1496
1497 /* Abort any active or pending conversions for this context */
1498 static void __ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
1499 {
1500         struct ipu_image_convert_chan *chan = ctx->chan;
1501         struct ipu_image_convert_priv *priv = chan->priv;
1502         struct ipu_image_convert_run *run, *active_run, *tmp;
1503         unsigned long flags;
1504         int run_count, ret;
1505         bool need_abort;
1506
1507         reinit_completion(&ctx->aborted);
1508
1509         spin_lock_irqsave(&chan->irqlock, flags);
1510
1511         /* move all remaining pending runs in this context to done_q */
1512         list_for_each_entry_safe(run, tmp, &chan->pending_q, list) {
1513                 if (run->ctx != ctx)
1514                         continue;
1515                 run->status = -EIO;
1516                 list_move_tail(&run->list, &chan->done_q);
1517         }
1518
1519         run_count = get_run_count(ctx, &chan->done_q);
1520         active_run = (chan->current_run && chan->current_run->ctx == ctx) ?
1521                 chan->current_run : NULL;
1522
1523         need_abort = (run_count || active_run);
1524
1525         ctx->aborting = true;
1526
1527         spin_unlock_irqrestore(&chan->irqlock, flags);
1528
1529         if (!need_abort) {
1530                 dev_dbg(priv->ipu->dev,
1531                         "%s: task %u: no abort needed for ctx %p\n",
1532                         __func__, chan->ic_task, ctx);
1533                 return;
1534         }
1535
1536         dev_dbg(priv->ipu->dev,
1537                 "%s: task %u: wait for completion: %d runs, active run %p\n",
1538                 __func__, chan->ic_task, run_count, active_run);
1539
1540         ret = wait_for_completion_timeout(&ctx->aborted,
1541                                           msecs_to_jiffies(10000));
1542         if (ret == 0) {
1543                 dev_warn(priv->ipu->dev, "%s: timeout\n", __func__);
1544                 force_abort(ctx);
1545         }
1546 }
1547
1548 void ipu_image_convert_abort(struct ipu_image_convert_ctx *ctx)
1549 {
1550         __ipu_image_convert_abort(ctx);
1551         ctx->aborting = false;
1552 }
1553 EXPORT_SYMBOL_GPL(ipu_image_convert_abort);
1554
1555 /* Unprepare image conversion context */
1556 void ipu_image_convert_unprepare(struct ipu_image_convert_ctx *ctx)
1557 {
1558         struct ipu_image_convert_chan *chan = ctx->chan;
1559         struct ipu_image_convert_priv *priv = chan->priv;
1560         unsigned long flags;
1561         bool put_res;
1562
1563         /* make sure no runs are hanging around */
1564         __ipu_image_convert_abort(ctx);
1565
1566         dev_dbg(priv->ipu->dev, "%s: task %u: removing ctx %p\n", __func__,
1567                 chan->ic_task, ctx);
1568
1569         spin_lock_irqsave(&chan->irqlock, flags);
1570
1571         list_del(&ctx->list);
1572
1573         put_res = list_empty(&chan->ctx_list);
1574
1575         spin_unlock_irqrestore(&chan->irqlock, flags);
1576
1577         if (put_res)
1578                 release_ipu_resources(chan);
1579
1580         free_dma_buf(priv, &ctx->rot_intermediate[1]);
1581         free_dma_buf(priv, &ctx->rot_intermediate[0]);
1582
1583         kfree(ctx);
1584 }
1585 EXPORT_SYMBOL_GPL(ipu_image_convert_unprepare);
1586
1587 /*
1588  * "Canned" asynchronous single image conversion. Allocates and returns
1589  * a new conversion run.  On successful return the caller must free the
1590  * run and call ipu_image_convert_unprepare() after conversion completes.
1591  */
1592 struct ipu_image_convert_run *
1593 ipu_image_convert(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
1594                   struct ipu_image *in, struct ipu_image *out,
1595                   enum ipu_rotate_mode rot_mode,
1596                   ipu_image_convert_cb_t complete,
1597                   void *complete_context)
1598 {
1599         struct ipu_image_convert_ctx *ctx;
1600         struct ipu_image_convert_run *run;
1601         int ret;
1602
1603         ctx = ipu_image_convert_prepare(ipu, ic_task, in, out, rot_mode,
1604                                         complete, complete_context);
1605         if (IS_ERR(ctx))
1606                 return ERR_CAST(ctx);
1607
1608         run = kzalloc(sizeof(*run), GFP_KERNEL);
1609         if (!run) {
1610                 ipu_image_convert_unprepare(ctx);
1611                 return ERR_PTR(-ENOMEM);
1612         }
1613
1614         run->ctx = ctx;
1615         run->in_phys = in->phys0;
1616         run->out_phys = out->phys0;
1617
1618         ret = ipu_image_convert_queue(run);
1619         if (ret) {
1620                 ipu_image_convert_unprepare(ctx);
1621                 kfree(run);
1622                 return ERR_PTR(ret);
1623         }
1624
1625         return run;
1626 }
1627 EXPORT_SYMBOL_GPL(ipu_image_convert);
1628
1629 /* "Canned" synchronous single image conversion */
1630 static void image_convert_sync_complete(struct ipu_image_convert_run *run,
1631                                         void *data)
1632 {
1633         struct completion *comp = data;
1634
1635         complete(comp);
1636 }
1637
1638 int ipu_image_convert_sync(struct ipu_soc *ipu, enum ipu_ic_task ic_task,
1639                            struct ipu_image *in, struct ipu_image *out,
1640                            enum ipu_rotate_mode rot_mode)
1641 {
1642         struct ipu_image_convert_run *run;
1643         struct completion comp;
1644         int ret;
1645
1646         init_completion(&comp);
1647
1648         run = ipu_image_convert(ipu, ic_task, in, out, rot_mode,
1649                                 image_convert_sync_complete, &comp);
1650         if (IS_ERR(run))
1651                 return PTR_ERR(run);
1652
1653         ret = wait_for_completion_timeout(&comp, msecs_to_jiffies(10000));
1654         ret = (ret == 0) ? -ETIMEDOUT : 0;
1655
1656         ipu_image_convert_unprepare(run->ctx);
1657         kfree(run);
1658
1659         return ret;
1660 }
1661 EXPORT_SYMBOL_GPL(ipu_image_convert_sync);
1662
1663 int ipu_image_convert_init(struct ipu_soc *ipu, struct device *dev)
1664 {
1665         struct ipu_image_convert_priv *priv;
1666         int i;
1667
1668         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
1669         if (!priv)
1670                 return -ENOMEM;
1671
1672         ipu->image_convert_priv = priv;
1673         priv->ipu = ipu;
1674
1675         for (i = 0; i < IC_NUM_TASKS; i++) {
1676                 struct ipu_image_convert_chan *chan = &priv->chan[i];
1677
1678                 chan->ic_task = i;
1679                 chan->priv = priv;
1680                 chan->dma_ch = &image_convert_dma_chan[i];
1681                 chan->out_eof_irq = -1;
1682                 chan->rot_out_eof_irq = -1;
1683
1684                 spin_lock_init(&chan->irqlock);
1685                 INIT_LIST_HEAD(&chan->ctx_list);
1686                 INIT_LIST_HEAD(&chan->pending_q);
1687                 INIT_LIST_HEAD(&chan->done_q);
1688         }
1689
1690         return 0;
1691 }
1692
1693 void ipu_image_convert_exit(struct ipu_soc *ipu)
1694 {
1695 }