GNU Linux-libre 4.19.245-gnu1
[releases.git] / drivers / gpu / host1x / hw / debug_hw.c
1 /*
2  * Copyright (C) 2010 Google, Inc.
3  * Author: Erik Gilling <konkers@android.com>
4  *
5  * Copyright (C) 2011-2013 NVIDIA Corporation
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17
18 #include "../dev.h"
19 #include "../debug.h"
20 #include "../cdma.h"
21 #include "../channel.h"
22
23 #define HOST1X_DEBUG_MAX_PAGE_OFFSET 102400
24
25 enum {
26         HOST1X_OPCODE_SETCLASS  = 0x00,
27         HOST1X_OPCODE_INCR      = 0x01,
28         HOST1X_OPCODE_NONINCR   = 0x02,
29         HOST1X_OPCODE_MASK      = 0x03,
30         HOST1X_OPCODE_IMM       = 0x04,
31         HOST1X_OPCODE_RESTART   = 0x05,
32         HOST1X_OPCODE_GATHER    = 0x06,
33         HOST1X_OPCODE_SETSTRMID = 0x07,
34         HOST1X_OPCODE_SETAPPID  = 0x08,
35         HOST1X_OPCODE_SETPYLD   = 0x09,
36         HOST1X_OPCODE_INCR_W    = 0x0a,
37         HOST1X_OPCODE_NONINCR_W = 0x0b,
38         HOST1X_OPCODE_GATHER_W  = 0x0c,
39         HOST1X_OPCODE_RESTART_W = 0x0d,
40         HOST1X_OPCODE_EXTEND    = 0x0e,
41 };
42
43 enum {
44         HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK      = 0x00,
45         HOST1X_OPCODE_EXTEND_RELEASE_MLOCK      = 0x01,
46 };
47
48 #define INVALID_PAYLOAD                         0xffffffff
49
50 static unsigned int show_channel_command(struct output *o, u32 val,
51                                          u32 *payload)
52 {
53         unsigned int mask, subop, num, opcode;
54
55         opcode = val >> 28;
56
57         switch (opcode) {
58         case HOST1X_OPCODE_SETCLASS:
59                 mask = val & 0x3f;
60                 if (mask) {
61                         host1x_debug_cont(o, "SETCL(class=%03x, offset=%03x, mask=%02x, [",
62                                             val >> 6 & 0x3ff,
63                                             val >> 16 & 0xfff, mask);
64                         return hweight8(mask);
65                 }
66
67                 host1x_debug_cont(o, "SETCL(class=%03x)\n", val >> 6 & 0x3ff);
68                 return 0;
69
70         case HOST1X_OPCODE_INCR:
71                 num = val & 0xffff;
72                 host1x_debug_cont(o, "INCR(offset=%03x, [",
73                                     val >> 16 & 0xfff);
74                 if (!num)
75                         host1x_debug_cont(o, "])\n");
76
77                 return num;
78
79         case HOST1X_OPCODE_NONINCR:
80                 num = val & 0xffff;
81                 host1x_debug_cont(o, "NONINCR(offset=%03x, [",
82                                     val >> 16 & 0xfff);
83                 if (!num)
84                         host1x_debug_cont(o, "])\n");
85
86                 return num;
87
88         case HOST1X_OPCODE_MASK:
89                 mask = val & 0xffff;
90                 host1x_debug_cont(o, "MASK(offset=%03x, mask=%03x, [",
91                                     val >> 16 & 0xfff, mask);
92                 if (!mask)
93                         host1x_debug_cont(o, "])\n");
94
95                 return hweight16(mask);
96
97         case HOST1X_OPCODE_IMM:
98                 host1x_debug_cont(o, "IMM(offset=%03x, data=%03x)\n",
99                                     val >> 16 & 0xfff, val & 0xffff);
100                 return 0;
101
102         case HOST1X_OPCODE_RESTART:
103                 host1x_debug_cont(o, "RESTART(offset=%08x)\n", val << 4);
104                 return 0;
105
106         case HOST1X_OPCODE_GATHER:
107                 host1x_debug_cont(o, "GATHER(offset=%03x, insert=%d, type=%d, count=%04x, addr=[",
108                                     val >> 16 & 0xfff, val >> 15 & 0x1,
109                                     val >> 14 & 0x1, val & 0x3fff);
110                 return 1;
111
112 #if HOST1X_HW >= 6
113         case HOST1X_OPCODE_SETSTRMID:
114                 host1x_debug_cont(o, "SETSTRMID(offset=%06x)\n",
115                                   val & 0x3fffff);
116                 return 0;
117
118         case HOST1X_OPCODE_SETAPPID:
119                 host1x_debug_cont(o, "SETAPPID(appid=%02x)\n", val & 0xff);
120                 return 0;
121
122         case HOST1X_OPCODE_SETPYLD:
123                 *payload = val & 0xffff;
124                 host1x_debug_cont(o, "SETPYLD(data=%04x)\n", *payload);
125                 return 0;
126
127         case HOST1X_OPCODE_INCR_W:
128         case HOST1X_OPCODE_NONINCR_W:
129                 host1x_debug_cont(o, "%s(offset=%06x, ",
130                                   opcode == HOST1X_OPCODE_INCR_W ?
131                                         "INCR_W" : "NONINCR_W",
132                                   val & 0x3fffff);
133                 if (*payload == 0) {
134                         host1x_debug_cont(o, "[])\n");
135                         return 0;
136                 } else if (*payload == INVALID_PAYLOAD) {
137                         host1x_debug_cont(o, "unknown)\n");
138                         return 0;
139                 } else {
140                         host1x_debug_cont(o, "[");
141                         return *payload;
142                 }
143
144         case HOST1X_OPCODE_GATHER_W:
145                 host1x_debug_cont(o, "GATHER_W(count=%04x, addr=[",
146                                   val & 0x3fff);
147                 return 2;
148 #endif
149
150         case HOST1X_OPCODE_EXTEND:
151                 subop = val >> 24 & 0xf;
152                 if (subop == HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK)
153                         host1x_debug_cont(o, "ACQUIRE_MLOCK(index=%d)\n",
154                                             val & 0xff);
155                 else if (subop == HOST1X_OPCODE_EXTEND_RELEASE_MLOCK)
156                         host1x_debug_cont(o, "RELEASE_MLOCK(index=%d)\n",
157                                             val & 0xff);
158                 else
159                         host1x_debug_cont(o, "EXTEND_UNKNOWN(%08x)\n", val);
160                 return 0;
161
162         default:
163                 host1x_debug_cont(o, "UNKNOWN\n");
164                 return 0;
165         }
166 }
167
168 static void show_gather(struct output *o, phys_addr_t phys_addr,
169                         unsigned int words, struct host1x_cdma *cdma,
170                         phys_addr_t pin_addr, u32 *map_addr)
171 {
172         /* Map dmaget cursor to corresponding mem handle */
173         u32 offset = phys_addr - pin_addr;
174         unsigned int data_count = 0, i;
175         u32 payload = INVALID_PAYLOAD;
176
177         /*
178          * Sometimes we're given different hardware address to the same
179          * page - in these cases the offset will get an invalid number and
180          * we just have to bail out.
181          */
182         if (offset > HOST1X_DEBUG_MAX_PAGE_OFFSET) {
183                 host1x_debug_output(o, "[address mismatch]\n");
184                 return;
185         }
186
187         for (i = 0; i < words; i++) {
188                 u32 addr = phys_addr + i * 4;
189                 u32 val = *(map_addr + offset / 4 + i);
190
191                 if (!data_count) {
192                         host1x_debug_output(o, "%08x: %08x: ", addr, val);
193                         data_count = show_channel_command(o, val, &payload);
194                 } else {
195                         host1x_debug_cont(o, "%08x%s", val,
196                                             data_count > 1 ? ", " : "])\n");
197                         data_count--;
198                 }
199         }
200 }
201
202 static void show_channel_gathers(struct output *o, struct host1x_cdma *cdma)
203 {
204         struct host1x_job *job;
205
206         list_for_each_entry(job, &cdma->sync_queue, list) {
207                 unsigned int i;
208
209                 host1x_debug_output(o, "\n%p: JOB, syncpt_id=%d, syncpt_val=%d, first_get=%08x, timeout=%d num_slots=%d, num_handles=%d\n",
210                                     job, job->syncpt_id, job->syncpt_end,
211                                     job->first_get, job->timeout,
212                                     job->num_slots, job->num_unpins);
213
214                 for (i = 0; i < job->num_gathers; i++) {
215                         struct host1x_job_gather *g = &job->gathers[i];
216                         u32 *mapped;
217
218                         if (job->gather_copy_mapped)
219                                 mapped = (u32 *)job->gather_copy_mapped;
220                         else
221                                 mapped = host1x_bo_mmap(g->bo);
222
223                         if (!mapped) {
224                                 host1x_debug_output(o, "[could not mmap]\n");
225                                 continue;
226                         }
227
228                         host1x_debug_output(o, "    GATHER at %pad+%#x, %d words\n",
229                                             &g->base, g->offset, g->words);
230
231                         show_gather(o, g->base + g->offset, g->words, cdma,
232                                     g->base, mapped);
233
234                         if (!job->gather_copy_mapped)
235                                 host1x_bo_munmap(g->bo, mapped);
236                 }
237         }
238 }
239
240 #if HOST1X_HW >= 6
241 #include "debug_hw_1x06.c"
242 #else
243 #include "debug_hw_1x01.c"
244 #endif
245
246 static const struct host1x_debug_ops host1x_debug_ops = {
247         .show_channel_cdma = host1x_debug_show_channel_cdma,
248         .show_channel_fifo = host1x_debug_show_channel_fifo,
249         .show_mlocks = host1x_debug_show_mlocks,
250 };