1 // SPDX-License-Identifier: GPL-2.0-only
3 * Tegra host1x Command DMA
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
8 #include <linux/slab.h>
9 #include <linux/scatterlist.h>
10 #include <linux/dma-mapping.h>
13 #include "../channel.h"
18 * Put the restart at the end of pushbuffer memory
20 static void push_buffer_init(struct push_buffer *pb)
22 *(u32 *)(pb->mapped + pb->size) = host1x_opcode_restart(0);
26 * Increment timedout buffer's syncpt via CPU.
28 static void cdma_timeout_cpu_incr(struct host1x_cdma *cdma, u32 getptr,
29 u32 syncpt_incrs, u32 syncval, u32 nr_slots)
33 for (i = 0; i < syncpt_incrs; i++)
34 host1x_syncpt_incr(cdma->timeout.syncpt);
36 /* after CPU incr, ensure shadow is up to date */
37 host1x_syncpt_load(cdma->timeout.syncpt);
43 static void cdma_start(struct host1x_cdma *cdma)
45 struct host1x_channel *ch = cdma_to_channel(cdma);
51 cdma->last_pos = cdma->push_buffer.pos;
52 start = cdma->push_buffer.dma;
53 end = cdma->push_buffer.size + 4;
55 host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
56 HOST1X_CHANNEL_DMACTRL);
58 /* set base, put and end pointer */
59 host1x_ch_writel(ch, lower_32_bits(start), HOST1X_CHANNEL_DMASTART);
61 host1x_ch_writel(ch, upper_32_bits(start), HOST1X_CHANNEL_DMASTART_HI);
63 host1x_ch_writel(ch, cdma->push_buffer.pos, HOST1X_CHANNEL_DMAPUT);
65 host1x_ch_writel(ch, 0, HOST1X_CHANNEL_DMAPUT_HI);
67 host1x_ch_writel(ch, lower_32_bits(end), HOST1X_CHANNEL_DMAEND);
69 host1x_ch_writel(ch, upper_32_bits(end), HOST1X_CHANNEL_DMAEND_HI);
73 host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP |
74 HOST1X_CHANNEL_DMACTRL_DMAGETRST |
75 HOST1X_CHANNEL_DMACTRL_DMAINITGET,
76 HOST1X_CHANNEL_DMACTRL);
78 /* start the command DMA */
79 host1x_ch_writel(ch, 0, HOST1X_CHANNEL_DMACTRL);
85 * Similar to cdma_start(), but rather than starting from an idle
86 * state (where DMA GET is set to DMA PUT), on a timeout we restore
87 * DMA GET from an explicit value (so DMA may again be pending).
89 static void cdma_timeout_restart(struct host1x_cdma *cdma, u32 getptr)
91 struct host1x *host1x = cdma_to_host1x(cdma);
92 struct host1x_channel *ch = cdma_to_channel(cdma);
98 cdma->last_pos = cdma->push_buffer.pos;
100 host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
101 HOST1X_CHANNEL_DMACTRL);
103 start = cdma->push_buffer.dma;
104 end = cdma->push_buffer.size + 4;
106 /* set base, end pointer (all of memory) */
107 host1x_ch_writel(ch, lower_32_bits(start), HOST1X_CHANNEL_DMASTART);
109 host1x_ch_writel(ch, upper_32_bits(start), HOST1X_CHANNEL_DMASTART_HI);
111 host1x_ch_writel(ch, lower_32_bits(end), HOST1X_CHANNEL_DMAEND);
113 host1x_ch_writel(ch, upper_32_bits(end), HOST1X_CHANNEL_DMAEND_HI);
116 /* set GET, by loading the value in PUT (then reset GET) */
117 host1x_ch_writel(ch, getptr, HOST1X_CHANNEL_DMAPUT);
118 host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP |
119 HOST1X_CHANNEL_DMACTRL_DMAGETRST |
120 HOST1X_CHANNEL_DMACTRL_DMAINITGET,
121 HOST1X_CHANNEL_DMACTRL);
124 "%s: DMA GET 0x%x, PUT HW 0x%x / shadow 0x%x\n", __func__,
125 host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET),
126 host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT),
129 /* deassert GET reset and set PUT */
130 host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
131 HOST1X_CHANNEL_DMACTRL);
132 host1x_ch_writel(ch, cdma->push_buffer.pos, HOST1X_CHANNEL_DMAPUT);
134 /* start the command DMA */
135 host1x_ch_writel(ch, 0, HOST1X_CHANNEL_DMACTRL);
137 cdma->running = true;
141 * Kick channel DMA into action by writing its PUT offset (if it has changed)
143 static void cdma_flush(struct host1x_cdma *cdma)
145 struct host1x_channel *ch = cdma_to_channel(cdma);
147 if (cdma->push_buffer.pos != cdma->last_pos) {
148 host1x_ch_writel(ch, cdma->push_buffer.pos,
149 HOST1X_CHANNEL_DMAPUT);
150 cdma->last_pos = cdma->push_buffer.pos;
154 static void cdma_stop(struct host1x_cdma *cdma)
156 struct host1x_channel *ch = cdma_to_channel(cdma);
158 mutex_lock(&cdma->lock);
161 host1x_cdma_wait_locked(cdma, CDMA_EVENT_SYNC_QUEUE_EMPTY);
162 host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
163 HOST1X_CHANNEL_DMACTRL);
164 cdma->running = false;
167 mutex_unlock(&cdma->lock);
170 static void cdma_hw_cmdproc_stop(struct host1x *host, struct host1x_channel *ch,
174 host1x_ch_writel(ch, stop ? 0x1 : 0x0, HOST1X_CHANNEL_CMDPROC_STOP);
176 u32 cmdproc_stop = host1x_sync_readl(host, HOST1X_SYNC_CMDPROC_STOP);
178 cmdproc_stop |= BIT(ch->id);
180 cmdproc_stop &= ~BIT(ch->id);
181 host1x_sync_writel(host, cmdproc_stop, HOST1X_SYNC_CMDPROC_STOP);
185 static void cdma_hw_teardown(struct host1x *host, struct host1x_channel *ch)
188 host1x_ch_writel(ch, 0x1, HOST1X_CHANNEL_TEARDOWN);
190 host1x_sync_writel(host, BIT(ch->id), HOST1X_SYNC_CH_TEARDOWN);
195 * Stops both channel's command processor and CDMA immediately.
196 * Also, tears down the channel and resets corresponding module.
198 static void cdma_freeze(struct host1x_cdma *cdma)
200 struct host1x *host = cdma_to_host1x(cdma);
201 struct host1x_channel *ch = cdma_to_channel(cdma);
203 if (cdma->torndown && !cdma->running) {
204 dev_warn(host->dev, "Already torn down\n");
208 dev_dbg(host->dev, "freezing channel (id %d)\n", ch->id);
210 cdma_hw_cmdproc_stop(host, ch, true);
212 dev_dbg(host->dev, "%s: DMA GET 0x%x, PUT HW 0x%x / shadow 0x%x\n",
213 __func__, host1x_ch_readl(ch, HOST1X_CHANNEL_DMAGET),
214 host1x_ch_readl(ch, HOST1X_CHANNEL_DMAPUT),
217 host1x_ch_writel(ch, HOST1X_CHANNEL_DMACTRL_DMASTOP,
218 HOST1X_CHANNEL_DMACTRL);
220 cdma_hw_teardown(host, ch);
222 cdma->running = false;
223 cdma->torndown = true;
226 static void cdma_resume(struct host1x_cdma *cdma, u32 getptr)
228 struct host1x *host1x = cdma_to_host1x(cdma);
229 struct host1x_channel *ch = cdma_to_channel(cdma);
232 "resuming channel (id %u, DMAGET restart = 0x%x)\n",
235 cdma_hw_cmdproc_stop(host1x, ch, false);
237 cdma->torndown = false;
238 cdma_timeout_restart(cdma, getptr);
241 static void timeout_release_mlock(struct host1x_cdma *cdma)
244 /* Tegra186 and Tegra194 require a more complicated MLOCK release
245 * sequence. Furthermore, those chips by default don't enforce MLOCKs,
246 * so it turns out that if we don't /actually/ need MLOCKs, we can just
249 * As such, for now just implement this on Tegra234 where things are
250 * stricter but also easy to implement.
252 struct host1x_channel *ch = cdma_to_channel(cdma);
253 struct host1x *host1x = cdma_to_host1x(cdma);
256 switch (ch->client->class) {
257 case HOST1X_CLASS_VIC:
258 offset = HOST1X_COMMON_VIC_MLOCK;
260 case HOST1X_CLASS_NVDEC:
261 offset = HOST1X_COMMON_NVDEC_MLOCK;
264 WARN(1, "%s was not updated for class %u", __func__, ch->client->class);
268 host1x_common_writel(host1x, 0x0, offset);
273 * If this timeout fires, it indicates the current sync_queue entry has
274 * exceeded its TTL and the userctx should be timed out and remaining
275 * submits already issued cleaned up (future submits return an error).
277 static void cdma_timeout_handler(struct work_struct *work)
280 struct host1x_cdma *cdma;
281 struct host1x *host1x;
282 struct host1x_channel *ch;
284 cdma = container_of(to_delayed_work(work), struct host1x_cdma,
286 host1x = cdma_to_host1x(cdma);
287 ch = cdma_to_channel(cdma);
289 host1x_debug_dump(cdma_to_host1x(cdma));
291 mutex_lock(&cdma->lock);
293 if (!cdma->timeout.client) {
295 "cdma_timeout: expired, but has no clientid\n");
296 mutex_unlock(&cdma->lock);
300 /* stop processing to get a clean snapshot */
301 cdma_hw_cmdproc_stop(host1x, ch, true);
303 syncpt_val = host1x_syncpt_load(cdma->timeout.syncpt);
305 /* has buffer actually completed? */
306 if ((s32)(syncpt_val - cdma->timeout.syncpt_val) >= 0) {
308 "cdma_timeout: expired, but buffer had completed\n");
310 cdma_hw_cmdproc_stop(host1x, ch, false);
311 mutex_unlock(&cdma->lock);
315 dev_warn(host1x->dev, "%s: timeout: %u (%s), HW thresh %d, done %d\n",
316 __func__, cdma->timeout.syncpt->id, cdma->timeout.syncpt->name,
317 syncpt_val, cdma->timeout.syncpt_val);
319 /* stop HW, resetting channel/module */
320 host1x_hw_cdma_freeze(host1x, cdma);
322 /* release any held MLOCK */
323 timeout_release_mlock(cdma);
325 host1x_cdma_update_sync_queue(cdma, ch->dev);
326 mutex_unlock(&cdma->lock);
330 * Init timeout resources
332 static int cdma_timeout_init(struct host1x_cdma *cdma)
334 INIT_DELAYED_WORK(&cdma->timeout.wq, cdma_timeout_handler);
335 cdma->timeout.initialized = true;
341 * Clean up timeout resources
343 static void cdma_timeout_destroy(struct host1x_cdma *cdma)
345 if (cdma->timeout.initialized)
346 cancel_delayed_work(&cdma->timeout.wq);
348 cdma->timeout.initialized = false;
351 static const struct host1x_cdma_ops host1x_cdma_ops = {
356 .timeout_init = cdma_timeout_init,
357 .timeout_destroy = cdma_timeout_destroy,
358 .freeze = cdma_freeze,
359 .resume = cdma_resume,
360 .timeout_cpu_incr = cdma_timeout_cpu_incr,
363 static const struct host1x_pushbuffer_ops host1x_pushbuffer_ops = {
364 .init = push_buffer_init,