drivers/gpu/host1x/context.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2021, NVIDIA Corporation.
   4  */
   5
   6 #include <linux/device.h>
   7 #include <linux/kref.h>
   8 #include <linux/of.h>
   9 #include <linux/of_platform.h>
  10 #include <linux/pid.h>
  11 #include <linux/slab.h>
  12
  13 #include "context.h"
  14 #include "dev.h"
  15
  16 static void host1x_memory_context_release(struct device *dev)
  17 {
  18         /* context device is freed in host1x_memory_context_list_free() */
  19 }
  20
  21 int host1x_memory_context_list_init(struct host1x *host1x)
  22 {
  23         struct host1x_memory_context_list *cdl = &host1x->context_list;
  24         struct device_node *node = host1x->dev->of_node;
  25         struct host1x_memory_context *ctx;
  26         unsigned int i;
  27         int err;
  28
  29         cdl->devs = NULL;
  30         cdl->len = 0;
  31         mutex_init(&cdl->lock);
  32
  33         err = of_property_count_u32_elems(node, "iommu-map");
  34         if (err < 0)
  35                 return 0;
  36
  37         cdl->len = err / 4;
  38         cdl->devs = kcalloc(cdl->len, sizeof(*cdl->devs), GFP_KERNEL);
  39         if (!cdl->devs)
  40                 return -ENOMEM;
  41
  42         for (i = 0; i < cdl->len; i++) {
  43                 struct iommu_fwspec *fwspec;
  44
  45                 ctx = &cdl->devs[i];
  46
  47                 ctx->host = host1x;
  48
  49                 device_initialize(&ctx->dev);
  50
  51                 /*
  52                  * Due to an issue with T194 NVENC, only 38 bits can be used.
  53                  * Anyway, 256GiB of IOVA ought to be enough for anyone.
  54                  */
  55                 ctx->dma_mask = DMA_BIT_MASK(38);
  56                 ctx->dev.dma_mask = &ctx->dma_mask;
  57                 ctx->dev.coherent_dma_mask = ctx->dma_mask;
  58                 dev_set_name(&ctx->dev, "host1x-ctx.%d", i);
  59                 ctx->dev.bus = &host1x_context_device_bus_type;
  60                 ctx->dev.parent = host1x->dev;
  61                 ctx->dev.release = host1x_memory_context_release;
  62
  63                 dma_set_max_seg_size(&ctx->dev, UINT_MAX);
  64
  65                 err = device_add(&ctx->dev);
  66                 if (err) {
  67                         dev_err(host1x->dev, "could not add context device %d: %d\n", i, err);
  68                         put_device(&ctx->dev);
  69                         goto unreg_devices;
  70                 }
  71
  72                 err = of_dma_configure_id(&ctx->dev, node, true, &i);
  73                 if (err) {
  74                         dev_err(host1x->dev, "IOMMU configuration failed for context device %d: %d\n",
  75                                 i, err);
  76                         device_unregister(&ctx->dev);
  77                         goto unreg_devices;
  78                 }
  79
  80                 fwspec = dev_iommu_fwspec_get(&ctx->dev);
  81                 if (!fwspec || !device_iommu_mapped(&ctx->dev)) {
  82                         dev_err(host1x->dev, "Context device %d has no IOMMU!\n", i);
  83                         device_unregister(&ctx->dev);
  84                         goto unreg_devices;
  85                 }
  86
  87                 ctx->stream_id = fwspec->ids[0] & 0xffff;
  88         }
  89
  90         return 0;
  91
  92 unreg_devices:
  93         while (i--)
  94                 device_unregister(&cdl->devs[i].dev);
  95
  96         kfree(cdl->devs);
  97         cdl->devs = NULL;
  98         cdl->len = 0;
  99
 100         return err;
 101 }
 102
 103 void host1x_memory_context_list_free(struct host1x_memory_context_list *cdl)
 104 {
 105         unsigned int i;
 106
 107         for (i = 0; i < cdl->len; i++)
 108                 device_unregister(&cdl->devs[i].dev);
 109
 110         kfree(cdl->devs);
 111         cdl->len = 0;
 112 }
 113
 114 struct host1x_memory_context *host1x_memory_context_alloc(struct host1x *host1x,
 115                                                           struct pid *pid)
 116 {
 117         struct host1x_memory_context_list *cdl = &host1x->context_list;
 118         struct host1x_memory_context *free = NULL;
 119         int i;
 120
 121         if (!cdl->len)
 122                 return ERR_PTR(-EOPNOTSUPP);
 123
 124         mutex_lock(&cdl->lock);
 125
 126         for (i = 0; i < cdl->len; i++) {
 127                 struct host1x_memory_context *cd = &cdl->devs[i];
 128
 129                 if (cd->owner == pid) {
 130                         refcount_inc(&cd->ref);
 131                         mutex_unlock(&cdl->lock);
 132                         return cd;
 133                 } else if (!cd->owner && !free) {
 134                         free = cd;
 135                 }
 136         }
 137
 138         if (!free) {
 139                 mutex_unlock(&cdl->lock);
 140                 return ERR_PTR(-EBUSY);
 141         }
 142
 143         refcount_set(&free->ref, 1);
 144         free->owner = get_pid(pid);
 145
 146         mutex_unlock(&cdl->lock);
 147
 148         return free;
 149 }
 150 EXPORT_SYMBOL_GPL(host1x_memory_context_alloc);
 151
 152 void host1x_memory_context_get(struct host1x_memory_context *cd)
 153 {
 154         refcount_inc(&cd->ref);
 155 }
 156 EXPORT_SYMBOL_GPL(host1x_memory_context_get);
 157
 158 void host1x_memory_context_put(struct host1x_memory_context *cd)
 159 {
 160         struct host1x_memory_context_list *cdl = &cd->host->context_list;
 161
 162         if (refcount_dec_and_mutex_lock(&cd->ref, &cdl->lock)) {
 163                 put_pid(cd->owner);
 164                 cd->owner = NULL;
 165                 mutex_unlock(&cdl->lock);
 166         }
 167 }
 168 EXPORT_SYMBOL_GPL(host1x_memory_context_put);