2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 /* LCDC DRM driver, based on da8xx-fb */
20 #include <linux/component.h>
21 #include <linux/pinctrl/consumer.h>
22 #include <linux/suspend.h>
23 #include <drm/drm_atomic.h>
24 #include <drm/drm_atomic_helper.h>
25 #include <drm/drm_fb_helper.h>
27 #include "tilcdc_drv.h"
28 #include "tilcdc_regs.h"
29 #include "tilcdc_tfp410.h"
30 #include "tilcdc_panel.h"
31 #include "tilcdc_external.h"
33 static LIST_HEAD(module_list);
35 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
37 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
39 DRM_FORMAT_XBGR8888 };
41 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
43 DRM_FORMAT_XRGB8888 };
45 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
47 DRM_FORMAT_XRGB8888 };
49 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
50 const struct tilcdc_module_ops *funcs)
54 INIT_LIST_HEAD(&mod->list);
55 list_add(&mod->list, &module_list);
58 void tilcdc_module_cleanup(struct tilcdc_module *mod)
63 static struct of_device_id tilcdc_of_match[];
65 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
66 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
68 return drm_fb_cma_create(dev, file_priv, mode_cmd);
71 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
73 struct tilcdc_drm_private *priv = dev->dev_private;
74 drm_fbdev_cma_hotplug_event(priv->fbdev);
77 static int tilcdc_atomic_check(struct drm_device *dev,
78 struct drm_atomic_state *state)
82 ret = drm_atomic_helper_check_modeset(dev, state);
86 ret = drm_atomic_helper_check_planes(dev, state);
91 * tilcdc ->atomic_check can update ->mode_changed if pixel format
92 * changes, hence will we check modeset changes again.
94 ret = drm_atomic_helper_check_modeset(dev, state);
101 static int tilcdc_commit(struct drm_device *dev,
102 struct drm_atomic_state *state,
107 ret = drm_atomic_helper_prepare_planes(dev, state);
111 ret = drm_atomic_helper_swap_state(state, true);
113 drm_atomic_helper_cleanup_planes(dev, state);
118 * Everything below can be run asynchronously without the need to grab
119 * any modeset locks at all under one condition: It must be guaranteed
120 * that the asynchronous work has either been cancelled (if the driver
121 * supports it, which at least requires that the framebuffers get
122 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
123 * before the new state gets committed on the software side with
124 * drm_atomic_helper_swap_state().
126 * This scheme allows new atomic state updates to be prepared and
127 * checked in parallel to the asynchronous completion of the previous
128 * update. Which is important since compositors need to figure out the
129 * composition of the next frame right after having submitted the
133 drm_atomic_helper_commit_modeset_disables(dev, state);
135 drm_atomic_helper_commit_planes(dev, state, 0);
137 drm_atomic_helper_commit_modeset_enables(dev, state);
139 drm_atomic_helper_wait_for_vblanks(dev, state);
141 drm_atomic_helper_cleanup_planes(dev, state);
146 static const struct drm_mode_config_funcs mode_config_funcs = {
147 .fb_create = tilcdc_fb_create,
148 .output_poll_changed = tilcdc_fb_output_poll_changed,
149 .atomic_check = tilcdc_atomic_check,
150 .atomic_commit = tilcdc_commit,
153 static void modeset_init(struct drm_device *dev)
155 struct tilcdc_drm_private *priv = dev->dev_private;
156 struct tilcdc_module *mod;
158 list_for_each_entry(mod, &module_list, list) {
159 DBG("loading module: %s", mod->name);
160 mod->funcs->modeset_init(mod, dev);
163 dev->mode_config.min_width = 0;
164 dev->mode_config.min_height = 0;
165 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
166 dev->mode_config.max_height = 2048;
167 dev->mode_config.funcs = &mode_config_funcs;
170 #ifdef CONFIG_CPU_FREQ
171 static int cpufreq_transition(struct notifier_block *nb,
172 unsigned long val, void *data)
174 struct tilcdc_drm_private *priv = container_of(nb,
175 struct tilcdc_drm_private, freq_transition);
177 if (val == CPUFREQ_POSTCHANGE)
178 tilcdc_crtc_update_clk(priv->crtc);
188 static void tilcdc_fini(struct drm_device *dev)
190 struct tilcdc_drm_private *priv = dev->dev_private;
192 #ifdef CONFIG_CPU_FREQ
193 if (priv->freq_transition.notifier_call)
194 cpufreq_unregister_notifier(&priv->freq_transition,
195 CPUFREQ_TRANSITION_NOTIFIER);
199 tilcdc_crtc_shutdown(priv->crtc);
201 if (priv->is_registered)
202 drm_dev_unregister(dev);
204 drm_kms_helper_poll_fini(dev);
207 drm_fbdev_cma_fini(priv->fbdev);
209 drm_irq_uninstall(dev);
210 drm_mode_config_cleanup(dev);
219 flush_workqueue(priv->wq);
220 destroy_workqueue(priv->wq);
223 dev->dev_private = NULL;
225 pm_runtime_disable(dev->dev);
230 static int tilcdc_init(struct drm_driver *ddrv, struct device *dev)
232 struct drm_device *ddev;
233 struct platform_device *pdev = to_platform_device(dev);
234 struct device_node *node = dev->of_node;
235 struct tilcdc_drm_private *priv;
236 struct resource *res;
240 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
242 dev_err(dev, "failed to allocate private data\n");
246 ddev = drm_dev_alloc(ddrv, dev);
248 return PTR_ERR(ddev);
250 ddev->dev_private = priv;
251 platform_set_drvdata(pdev, ddev);
252 drm_mode_config_init(ddev);
254 priv->is_componentized =
255 tilcdc_get_external_components(dev, NULL) > 0;
257 priv->wq = alloc_ordered_workqueue("tilcdc", 0);
263 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
265 dev_err(dev, "failed to get memory resource\n");
270 priv->mmio = ioremap_nocache(res->start, resource_size(res));
272 dev_err(dev, "failed to ioremap\n");
277 priv->clk = clk_get(dev, "fck");
278 if (IS_ERR(priv->clk)) {
279 dev_err(dev, "failed to get functional clock\n");
284 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
285 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
287 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
289 if (of_property_read_u32(node, "max-width", &priv->max_width))
290 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
292 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
294 if (of_property_read_u32(node, "max-pixelclock",
295 &priv->max_pixelclock))
296 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
298 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
300 pm_runtime_enable(dev);
302 /* Determine LCD IP Version */
303 pm_runtime_get_sync(dev);
304 switch (tilcdc_read(ddev, LCDC_PID_REG)) {
313 dev_warn(dev, "Unknown PID Reg value 0x%08x, "
314 "defaulting to LCD revision 1\n",
315 tilcdc_read(ddev, LCDC_PID_REG));
320 pm_runtime_put_sync(dev);
322 if (priv->rev == 1) {
323 DBG("Revision 1 LCDC supports only RGB565 format");
324 priv->pixelformats = tilcdc_rev1_formats;
325 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
328 const char *str = "\0";
330 of_property_read_string(node, "blue-and-red-wiring", &str);
331 if (0 == strcmp(str, "crossed")) {
332 DBG("Configured for crossed blue and red wires");
333 priv->pixelformats = tilcdc_crossed_formats;
334 priv->num_pixelformats =
335 ARRAY_SIZE(tilcdc_crossed_formats);
336 bpp = 32; /* Choose bpp with RGB support for fbdef */
337 } else if (0 == strcmp(str, "straight")) {
338 DBG("Configured for straight blue and red wires");
339 priv->pixelformats = tilcdc_straight_formats;
340 priv->num_pixelformats =
341 ARRAY_SIZE(tilcdc_straight_formats);
342 bpp = 16; /* Choose bpp with RGB support for fbdef */
344 DBG("Blue and red wiring '%s' unknown, use legacy mode",
346 priv->pixelformats = tilcdc_legacy_formats;
347 priv->num_pixelformats =
348 ARRAY_SIZE(tilcdc_legacy_formats);
349 bpp = 16; /* This is just a guess */
353 ret = tilcdc_crtc_create(ddev);
355 dev_err(dev, "failed to create crtc\n");
360 #ifdef CONFIG_CPU_FREQ
361 priv->freq_transition.notifier_call = cpufreq_transition;
362 ret = cpufreq_register_notifier(&priv->freq_transition,
363 CPUFREQ_TRANSITION_NOTIFIER);
365 dev_err(dev, "failed to register cpufreq notifier\n");
366 priv->freq_transition.notifier_call = NULL;
371 if (priv->is_componentized) {
372 ret = component_bind_all(dev, ddev);
376 ret = tilcdc_add_component_encoder(ddev);
380 ret = tilcdc_attach_external_device(ddev);
385 if (!priv->external_connector &&
386 ((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
387 dev_err(dev, "no encoders/connectors found\n");
392 ret = drm_vblank_init(ddev, 1);
394 dev_err(dev, "failed to initialize vblank\n");
398 ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
400 dev_err(dev, "failed to install IRQ handler\n");
404 drm_mode_config_reset(ddev);
406 priv->fbdev = drm_fbdev_cma_init(ddev, bpp,
407 ddev->mode_config.num_connector);
408 if (IS_ERR(priv->fbdev)) {
409 ret = PTR_ERR(priv->fbdev);
413 drm_kms_helper_poll_init(ddev);
415 ret = drm_dev_register(ddev, 0);
419 priv->is_registered = true;
428 static void tilcdc_lastclose(struct drm_device *dev)
430 struct tilcdc_drm_private *priv = dev->dev_private;
431 drm_fbdev_cma_restore_mode(priv->fbdev);
434 static irqreturn_t tilcdc_irq(int irq, void *arg)
436 struct drm_device *dev = arg;
437 struct tilcdc_drm_private *priv = dev->dev_private;
438 return tilcdc_crtc_irq(priv->crtc);
441 #if defined(CONFIG_DEBUG_FS)
442 static const struct {
448 #define REG(rev, save, reg) { #reg, rev, save, reg }
449 /* exists in revision 1: */
450 REG(1, false, LCDC_PID_REG),
451 REG(1, true, LCDC_CTRL_REG),
452 REG(1, false, LCDC_STAT_REG),
453 REG(1, true, LCDC_RASTER_CTRL_REG),
454 REG(1, true, LCDC_RASTER_TIMING_0_REG),
455 REG(1, true, LCDC_RASTER_TIMING_1_REG),
456 REG(1, true, LCDC_RASTER_TIMING_2_REG),
457 REG(1, true, LCDC_DMA_CTRL_REG),
458 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG),
459 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG),
460 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG),
461 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG),
462 /* new in revision 2: */
463 REG(2, false, LCDC_RAW_STAT_REG),
464 REG(2, false, LCDC_MASKED_STAT_REG),
465 REG(2, true, LCDC_INT_ENABLE_SET_REG),
466 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
467 REG(2, false, LCDC_END_OF_INT_IND_REG),
468 REG(2, true, LCDC_CLK_ENABLE_REG),
474 #ifdef CONFIG_DEBUG_FS
475 static int tilcdc_regs_show(struct seq_file *m, void *arg)
477 struct drm_info_node *node = (struct drm_info_node *) m->private;
478 struct drm_device *dev = node->minor->dev;
479 struct tilcdc_drm_private *priv = dev->dev_private;
482 pm_runtime_get_sync(dev->dev);
484 seq_printf(m, "revision: %d\n", priv->rev);
486 for (i = 0; i < ARRAY_SIZE(registers); i++)
487 if (priv->rev >= registers[i].rev)
488 seq_printf(m, "%s:\t %08x\n", registers[i].name,
489 tilcdc_read(dev, registers[i].reg));
491 pm_runtime_put_sync(dev->dev);
496 static int tilcdc_mm_show(struct seq_file *m, void *arg)
498 struct drm_info_node *node = (struct drm_info_node *) m->private;
499 struct drm_device *dev = node->minor->dev;
500 struct drm_printer p = drm_seq_file_printer(m);
501 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
505 static struct drm_info_list tilcdc_debugfs_list[] = {
506 { "regs", tilcdc_regs_show, 0 },
507 { "mm", tilcdc_mm_show, 0 },
508 { "fb", drm_fb_cma_debugfs_show, 0 },
511 static int tilcdc_debugfs_init(struct drm_minor *minor)
513 struct drm_device *dev = minor->dev;
514 struct tilcdc_module *mod;
517 ret = drm_debugfs_create_files(tilcdc_debugfs_list,
518 ARRAY_SIZE(tilcdc_debugfs_list),
519 minor->debugfs_root, minor);
521 list_for_each_entry(mod, &module_list, list)
522 if (mod->funcs->debugfs_init)
523 mod->funcs->debugfs_init(mod, minor);
526 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
534 DEFINE_DRM_GEM_CMA_FOPS(fops);
536 static struct drm_driver tilcdc_driver = {
537 .driver_features = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET |
538 DRIVER_PRIME | DRIVER_ATOMIC),
539 .lastclose = tilcdc_lastclose,
540 .irq_handler = tilcdc_irq,
541 .gem_free_object_unlocked = drm_gem_cma_free_object,
542 .gem_vm_ops = &drm_gem_cma_vm_ops,
543 .dumb_create = drm_gem_cma_dumb_create,
545 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
546 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
547 .gem_prime_import = drm_gem_prime_import,
548 .gem_prime_export = drm_gem_prime_export,
549 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
550 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
551 .gem_prime_vmap = drm_gem_cma_prime_vmap,
552 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
553 .gem_prime_mmap = drm_gem_cma_prime_mmap,
554 #ifdef CONFIG_DEBUG_FS
555 .debugfs_init = tilcdc_debugfs_init,
559 .desc = "TI LCD Controller DRM",
569 #ifdef CONFIG_PM_SLEEP
570 static int tilcdc_pm_suspend(struct device *dev)
572 struct drm_device *ddev = dev_get_drvdata(dev);
573 struct tilcdc_drm_private *priv = ddev->dev_private;
575 priv->saved_state = drm_atomic_helper_suspend(ddev);
577 /* Select sleep pin state */
578 pinctrl_pm_select_sleep_state(dev);
583 static int tilcdc_pm_resume(struct device *dev)
585 struct drm_device *ddev = dev_get_drvdata(dev);
586 struct tilcdc_drm_private *priv = ddev->dev_private;
589 /* Select default pin state */
590 pinctrl_pm_select_default_state(dev);
592 if (priv->saved_state)
593 ret = drm_atomic_helper_resume(ddev, priv->saved_state);
599 static const struct dev_pm_ops tilcdc_pm_ops = {
600 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
606 static int tilcdc_bind(struct device *dev)
608 return tilcdc_init(&tilcdc_driver, dev);
611 static void tilcdc_unbind(struct device *dev)
613 struct drm_device *ddev = dev_get_drvdata(dev);
615 /* Check if a subcomponent has already triggered the unloading. */
616 if (!ddev->dev_private)
619 tilcdc_fini(dev_get_drvdata(dev));
622 static const struct component_master_ops tilcdc_comp_ops = {
624 .unbind = tilcdc_unbind,
627 static int tilcdc_pdev_probe(struct platform_device *pdev)
629 struct component_match *match = NULL;
632 /* bail out early if no DT data: */
633 if (!pdev->dev.of_node) {
634 dev_err(&pdev->dev, "device-tree data is missing\n");
638 ret = tilcdc_get_external_components(&pdev->dev, &match);
642 return tilcdc_init(&tilcdc_driver, &pdev->dev);
644 return component_master_add_with_match(&pdev->dev,
649 static int tilcdc_pdev_remove(struct platform_device *pdev)
653 ret = tilcdc_get_external_components(&pdev->dev, NULL);
657 tilcdc_fini(platform_get_drvdata(pdev));
659 component_master_del(&pdev->dev, &tilcdc_comp_ops);
664 static struct of_device_id tilcdc_of_match[] = {
665 { .compatible = "ti,am33xx-tilcdc", },
666 { .compatible = "ti,da850-tilcdc", },
669 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
671 static struct platform_driver tilcdc_platform_driver = {
672 .probe = tilcdc_pdev_probe,
673 .remove = tilcdc_pdev_remove,
676 .pm = &tilcdc_pm_ops,
677 .of_match_table = tilcdc_of_match,
681 static int __init tilcdc_drm_init(void)
684 tilcdc_tfp410_init();
686 return platform_driver_register(&tilcdc_platform_driver);
689 static void __exit tilcdc_drm_fini(void)
692 platform_driver_unregister(&tilcdc_platform_driver);
694 tilcdc_tfp410_fini();
697 module_init(tilcdc_drm_init);
698 module_exit(tilcdc_drm_fini);
700 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
701 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
702 MODULE_LICENSE("GPL");