1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
7 #include <drm/drm_atomic.h>
8 #include <drm/drm_atomic_helper.h>
9 #include <drm/drm_crtc.h>
10 #include <drm/drm_crtc_helper.h>
11 #include <drm/drm_fourcc.h>
12 #include <drm/drm_fb_cma_helper.h>
13 #include <drm/drm_gem_atomic_helper.h>
15 #include "tidss_crtc.h"
16 #include "tidss_dispc.h"
17 #include "tidss_drv.h"
18 #include "tidss_plane.h"
20 /* drm_plane_helper_funcs */
22 static int tidss_plane_atomic_check(struct drm_plane *plane,
23 struct drm_atomic_state *state)
25 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
27 struct drm_device *ddev = plane->dev;
28 struct tidss_device *tidss = to_tidss(ddev);
29 struct tidss_plane *tplane = to_tidss_plane(plane);
30 const struct drm_format_info *finfo;
31 struct drm_crtc_state *crtc_state;
32 u32 hw_plane = tplane->hw_plane_id;
36 dev_dbg(ddev->dev, "%s\n", __func__);
38 if (!new_plane_state->crtc) {
40 * The visible field is not reset by the DRM core but only
41 * updated by drm_plane_helper_check_state(), set it manually.
43 new_plane_state->visible = false;
47 crtc_state = drm_atomic_get_crtc_state(state,
48 new_plane_state->crtc);
49 if (IS_ERR(crtc_state))
50 return PTR_ERR(crtc_state);
52 ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state,
59 * The HW is only able to start drawing at subpixel boundary
60 * (the two first checks bellow). At the end of a row the HW
61 * can only jump integer number of subpixels forward to the
62 * beginning of the next row. So we can only show picture with
63 * integer subpixel width (the third check). However, after
64 * reaching the end of the drawn picture the drawing starts
65 * again at the absolute memory address where top left corner
66 * position of the drawn picture is (so there is no need to
67 * check for odd height).
70 finfo = drm_format_info(new_plane_state->fb->format->format);
72 if ((new_plane_state->src_x >> 16) % finfo->hsub != 0) {
74 "%s: x-position %u not divisible subpixel size %u\n",
75 __func__, (new_plane_state->src_x >> 16), finfo->hsub);
79 if ((new_plane_state->src_y >> 16) % finfo->vsub != 0) {
81 "%s: y-position %u not divisible subpixel size %u\n",
82 __func__, (new_plane_state->src_y >> 16), finfo->vsub);
86 if ((new_plane_state->src_w >> 16) % finfo->hsub != 0) {
88 "%s: src width %u not divisible by subpixel size %u\n",
89 __func__, (new_plane_state->src_w >> 16),
94 if (!new_plane_state->visible)
97 hw_videoport = to_tidss_crtc(new_plane_state->crtc)->hw_videoport;
99 ret = dispc_plane_check(tidss->dispc, hw_plane, new_plane_state,
107 static void tidss_plane_atomic_update(struct drm_plane *plane,
108 struct drm_atomic_state *state)
110 struct drm_device *ddev = plane->dev;
111 struct tidss_device *tidss = to_tidss(ddev);
112 struct tidss_plane *tplane = to_tidss_plane(plane);
113 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
118 dev_dbg(ddev->dev, "%s\n", __func__);
120 if (!new_state->visible) {
121 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
125 hw_videoport = to_tidss_crtc(new_state->crtc)->hw_videoport;
127 ret = dispc_plane_setup(tidss->dispc, tplane->hw_plane_id,
128 new_state, hw_videoport);
131 dev_err(plane->dev->dev, "%s: Failed to setup plane %d\n",
132 __func__, tplane->hw_plane_id);
133 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
137 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, true);
140 static void tidss_plane_atomic_disable(struct drm_plane *plane,
141 struct drm_atomic_state *state)
143 struct drm_device *ddev = plane->dev;
144 struct tidss_device *tidss = to_tidss(ddev);
145 struct tidss_plane *tplane = to_tidss_plane(plane);
147 dev_dbg(ddev->dev, "%s\n", __func__);
149 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
152 static void drm_plane_destroy(struct drm_plane *plane)
154 struct tidss_plane *tplane = to_tidss_plane(plane);
156 drm_plane_cleanup(plane);
160 static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
161 .atomic_check = tidss_plane_atomic_check,
162 .atomic_update = tidss_plane_atomic_update,
163 .atomic_disable = tidss_plane_atomic_disable,
166 static const struct drm_plane_funcs tidss_plane_funcs = {
167 .update_plane = drm_atomic_helper_update_plane,
168 .disable_plane = drm_atomic_helper_disable_plane,
169 .reset = drm_atomic_helper_plane_reset,
170 .destroy = drm_plane_destroy,
171 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
172 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
175 struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
176 u32 hw_plane_id, u32 plane_type,
177 u32 crtc_mask, const u32 *formats,
180 struct tidss_plane *tplane;
181 enum drm_plane_type type;
183 u32 num_planes = tidss->feat->num_planes;
184 u32 color_encodings = (BIT(DRM_COLOR_YCBCR_BT601) |
185 BIT(DRM_COLOR_YCBCR_BT709));
186 u32 color_ranges = (BIT(DRM_COLOR_YCBCR_FULL_RANGE) |
187 BIT(DRM_COLOR_YCBCR_LIMITED_RANGE));
188 u32 default_encoding = DRM_COLOR_YCBCR_BT601;
189 u32 default_range = DRM_COLOR_YCBCR_FULL_RANGE;
190 u32 blend_modes = (BIT(DRM_MODE_BLEND_PREMULTI) |
191 BIT(DRM_MODE_BLEND_COVERAGE));
194 tplane = kzalloc(sizeof(*tplane), GFP_KERNEL);
196 return ERR_PTR(-ENOMEM);
198 tplane->hw_plane_id = hw_plane_id;
200 possible_crtcs = crtc_mask;
203 ret = drm_universal_plane_init(&tidss->ddev, &tplane->plane,
206 formats, num_formats,
211 drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);
213 drm_plane_create_zpos_property(&tplane->plane, hw_plane_id, 0,
216 ret = drm_plane_create_color_properties(&tplane->plane,
224 ret = drm_plane_create_alpha_property(&tplane->plane);
228 ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);