2 * Copyright (C) STMicroelectronics SA 2014
3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
4 * License terms: GNU General Public License (GPL), version 2
8 #include <linux/component.h>
9 #include <linux/debugfs.h>
10 #include <linux/module.h>
11 #include <linux/of_gpio.h>
12 #include <linux/platform_device.h>
15 #include <drm/drm_atomic_helper.h>
16 #include <drm/drm_crtc_helper.h>
17 #include <drm/drm_panel.h>
19 #include "sti_awg_utils.h"
21 #include "sti_mixer.h"
24 #define DVO_AWG_DIGSYNC_CTRL 0x0000
25 #define DVO_DOF_CFG 0x0004
26 #define DVO_LUT_PROG_LOW 0x0008
27 #define DVO_LUT_PROG_MID 0x000C
28 #define DVO_LUT_PROG_HIGH 0x0010
29 #define DVO_DIGSYNC_INSTR_I 0x0100
31 #define DVO_AWG_CTRL_EN BIT(0)
32 #define DVO_AWG_FRAME_BASED_SYNC BIT(2)
34 #define DVO_DOF_EN_LOWBYTE BIT(0)
35 #define DVO_DOF_EN_MIDBYTE BIT(1)
36 #define DVO_DOF_EN_HIGHBYTE BIT(2)
37 #define DVO_DOF_EN BIT(6)
38 #define DVO_DOF_MOD_COUNT_SHIFT 8
40 #define DVO_LUT_ZERO 0
42 #define DVO_LUT_Y_G_DEL 2
43 #define DVO_LUT_CB_B 3
44 #define DVO_LUT_CB_B_DEL 4
45 #define DVO_LUT_CR_R 5
46 #define DVO_LUT_CR_R_DEL 6
47 #define DVO_LUT_HOLD 7
55 struct awg_code_generation_params *fw_gen_params,
56 struct awg_timing *timing);
59 static struct dvo_config rgb_24bit_de_cfg = {
60 .flags = (0L << DVO_DOF_MOD_COUNT_SHIFT),
61 .lowbyte = DVO_LUT_CR_R,
62 .midbyte = DVO_LUT_Y_G,
63 .highbyte = DVO_LUT_CB_B,
64 .awg_fwgen_fct = sti_awg_generate_code_data_enable_mode,
68 * STI digital video output structure
71 * @drm_dev: pointer to drm device
72 * @mode: current display mode selected
73 * @regs: dvo registers
74 * @clk_pix: pixel clock for dvo
76 * @clk_main_parent: dvo parent clock if main path used
77 * @clk_aux_parent: dvo parent clock if aux path used
78 * @panel_node: panel node reference from device tree
79 * @panel: reference to the panel connected to the dvo
80 * @enabled: true if dvo is enabled else false
81 * @encoder: drm_encoder it is bound
85 struct drm_device *drm_dev;
86 struct drm_display_mode mode;
90 struct clk *clk_main_parent;
91 struct clk *clk_aux_parent;
92 struct device_node *panel_node;
93 struct drm_panel *panel;
94 struct dvo_config *config;
96 struct drm_encoder *encoder;
97 struct drm_bridge *bridge;
100 struct sti_dvo_connector {
101 struct drm_connector drm_connector;
102 struct drm_encoder *encoder;
106 #define to_sti_dvo_connector(x) \
107 container_of(x, struct sti_dvo_connector, drm_connector)
109 #define BLANKING_LEVEL 16
110 static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code)
112 struct drm_display_mode *mode = &dvo->mode;
113 struct dvo_config *config = dvo->config;
114 struct awg_code_generation_params fw_gen_params;
115 struct awg_timing timing;
117 fw_gen_params.ram_code = ram_code;
118 fw_gen_params.instruction_offset = 0;
120 timing.total_lines = mode->vtotal;
121 timing.active_lines = mode->vdisplay;
122 timing.blanking_lines = mode->vsync_start - mode->vdisplay;
123 timing.trailing_lines = mode->vtotal - mode->vsync_start;
124 timing.total_pixels = mode->htotal;
125 timing.active_pixels = mode->hdisplay;
126 timing.blanking_pixels = mode->hsync_start - mode->hdisplay;
127 timing.trailing_pixels = mode->htotal - mode->hsync_start;
128 timing.blanking_level = BLANKING_LEVEL;
130 if (config->awg_fwgen_fct(&fw_gen_params, &timing)) {
131 DRM_ERROR("AWG firmware not properly generated\n");
135 *ram_size = fw_gen_params.instruction_offset;
140 /* Configure AWG, writing instructions
142 * @dvo: pointer to DVO structure
143 * @awg_ram_code: pointer to AWG instructions table
144 * @nb: nb of AWG instructions
146 static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb)
150 DRM_DEBUG_DRIVER("\n");
152 for (i = 0; i < nb; i++)
153 writel(awg_ram_code[i],
154 dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
155 for (i = nb; i < AWG_MAX_INST; i++)
156 writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4);
158 writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
161 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
162 readl(dvo->regs + reg))
164 static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg)
169 seq_puts(s, " DVO AWG microcode:");
170 for (i = 0; i < AWG_MAX_INST; i++) {
172 seq_printf(s, "\n %04X:", i);
173 seq_printf(s, " %04X", readl(reg + i * 4));
177 static int dvo_dbg_show(struct seq_file *s, void *data)
179 struct drm_info_node *node = s->private;
180 struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data;
182 seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs);
183 DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL);
184 DBGFS_DUMP(DVO_DOF_CFG);
185 DBGFS_DUMP(DVO_LUT_PROG_LOW);
186 DBGFS_DUMP(DVO_LUT_PROG_MID);
187 DBGFS_DUMP(DVO_LUT_PROG_HIGH);
188 dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I);
193 static struct drm_info_list dvo_debugfs_files[] = {
194 { "dvo", dvo_dbg_show, 0, NULL },
197 static int dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor)
201 for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++)
202 dvo_debugfs_files[i].data = dvo;
204 return drm_debugfs_create_files(dvo_debugfs_files,
205 ARRAY_SIZE(dvo_debugfs_files),
206 minor->debugfs_root, minor);
209 static void sti_dvo_disable(struct drm_bridge *bridge)
211 struct sti_dvo *dvo = bridge->driver_private;
216 DRM_DEBUG_DRIVER("\n");
218 if (dvo->config->awg_fwgen_fct)
219 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
221 writel(0x00000000, dvo->regs + DVO_DOF_CFG);
224 dvo->panel->funcs->disable(dvo->panel);
226 /* Disable/unprepare dvo clock */
227 clk_disable_unprepare(dvo->clk_pix);
228 clk_disable_unprepare(dvo->clk);
230 dvo->enabled = false;
233 static void sti_dvo_pre_enable(struct drm_bridge *bridge)
235 struct sti_dvo *dvo = bridge->driver_private;
236 struct dvo_config *config = dvo->config;
239 DRM_DEBUG_DRIVER("\n");
244 /* Make sure DVO is disabled */
245 writel(0x00000000, dvo->regs + DVO_DOF_CFG);
246 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL);
248 if (config->awg_fwgen_fct) {
250 u32 awg_ram_code[AWG_MAX_INST];
252 if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code))
253 dvo_awg_configure(dvo, awg_ram_code, nb_instr);
258 /* Prepare/enable clocks */
259 if (clk_prepare_enable(dvo->clk_pix))
260 DRM_ERROR("Failed to prepare/enable dvo_pix clk\n");
261 if (clk_prepare_enable(dvo->clk))
262 DRM_ERROR("Failed to prepare/enable dvo clk\n");
265 dvo->panel->funcs->enable(dvo->panel);
268 writel(config->lowbyte, dvo->regs + DVO_LUT_PROG_LOW);
269 writel(config->midbyte, dvo->regs + DVO_LUT_PROG_MID);
270 writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH);
272 /* Digital output formatter config */
273 val = (config->flags | DVO_DOF_EN);
274 writel(val, dvo->regs + DVO_DOF_CFG);
279 static void sti_dvo_set_mode(struct drm_bridge *bridge,
280 struct drm_display_mode *mode,
281 struct drm_display_mode *adjusted_mode)
283 struct sti_dvo *dvo = bridge->driver_private;
284 struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc);
285 int rate = mode->clock * 1000;
289 DRM_DEBUG_DRIVER("\n");
291 drm_mode_copy(&dvo->mode, mode);
293 /* According to the path used (main or aux), the dvo clocks should
294 * have a different parent clock. */
295 if (mixer->id == STI_MIXER_MAIN)
296 clkp = dvo->clk_main_parent;
298 clkp = dvo->clk_aux_parent;
301 clk_set_parent(dvo->clk_pix, clkp);
302 clk_set_parent(dvo->clk, clkp);
305 /* DVO clocks = compositor clock */
306 ret = clk_set_rate(dvo->clk_pix, rate);
308 DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate);
312 ret = clk_set_rate(dvo->clk, rate);
314 DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate);
318 /* For now, we only support 24bit data enable (DE) synchro format */
319 dvo->config = &rgb_24bit_de_cfg;
322 static void sti_dvo_bridge_nope(struct drm_bridge *bridge)
327 static const struct drm_bridge_funcs sti_dvo_bridge_funcs = {
328 .pre_enable = sti_dvo_pre_enable,
329 .enable = sti_dvo_bridge_nope,
330 .disable = sti_dvo_disable,
331 .post_disable = sti_dvo_bridge_nope,
332 .mode_set = sti_dvo_set_mode,
335 static int sti_dvo_connector_get_modes(struct drm_connector *connector)
337 struct sti_dvo_connector *dvo_connector
338 = to_sti_dvo_connector(connector);
339 struct sti_dvo *dvo = dvo_connector->dvo;
342 return dvo->panel->funcs->get_modes(dvo->panel);
347 #define CLK_TOLERANCE_HZ 50
349 static enum drm_mode_status
350 sti_dvo_connector_mode_valid(struct drm_connector *connector,
351 struct drm_display_mode *mode)
353 int target = mode->clock * 1000;
354 int target_min = target - CLK_TOLERANCE_HZ;
355 int target_max = target + CLK_TOLERANCE_HZ;
357 struct sti_dvo_connector *dvo_connector
358 = to_sti_dvo_connector(connector);
359 struct sti_dvo *dvo = dvo_connector->dvo;
361 result = clk_round_rate(dvo->clk_pix, target);
363 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n",
366 if ((result < target_min) || (result > target_max)) {
367 DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target);
375 struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = {
376 .get_modes = sti_dvo_connector_get_modes,
377 .mode_valid = sti_dvo_connector_mode_valid,
380 static enum drm_connector_status
381 sti_dvo_connector_detect(struct drm_connector *connector, bool force)
383 struct sti_dvo_connector *dvo_connector
384 = to_sti_dvo_connector(connector);
385 struct sti_dvo *dvo = dvo_connector->dvo;
387 DRM_DEBUG_DRIVER("\n");
390 dvo->panel = of_drm_find_panel(dvo->panel_node);
392 drm_panel_attach(dvo->panel, connector);
396 return connector_status_connected;
398 return connector_status_disconnected;
401 static int sti_dvo_late_register(struct drm_connector *connector)
403 struct sti_dvo_connector *dvo_connector
404 = to_sti_dvo_connector(connector);
405 struct sti_dvo *dvo = dvo_connector->dvo;
407 if (dvo_debugfs_init(dvo, dvo->drm_dev->primary)) {
408 DRM_ERROR("DVO debugfs setup failed\n");
415 static const struct drm_connector_funcs sti_dvo_connector_funcs = {
416 .fill_modes = drm_helper_probe_single_connector_modes,
417 .detect = sti_dvo_connector_detect,
418 .destroy = drm_connector_cleanup,
419 .reset = drm_atomic_helper_connector_reset,
420 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
421 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
422 .late_register = sti_dvo_late_register,
425 static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev)
427 struct drm_encoder *encoder;
429 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
430 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS)
437 static int sti_dvo_bind(struct device *dev, struct device *master, void *data)
439 struct sti_dvo *dvo = dev_get_drvdata(dev);
440 struct drm_device *drm_dev = data;
441 struct drm_encoder *encoder;
442 struct sti_dvo_connector *connector;
443 struct drm_connector *drm_connector;
444 struct drm_bridge *bridge;
447 /* Set the drm device handle */
448 dvo->drm_dev = drm_dev;
450 encoder = sti_dvo_find_encoder(drm_dev);
454 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL);
458 connector->dvo = dvo;
460 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL);
464 bridge->driver_private = dvo;
465 bridge->funcs = &sti_dvo_bridge_funcs;
466 bridge->of_node = dvo->dev.of_node;
467 err = drm_bridge_add(bridge);
469 DRM_ERROR("Failed to add bridge\n");
473 err = drm_bridge_attach(encoder, bridge, NULL);
475 DRM_ERROR("Failed to attach bridge\n");
479 dvo->bridge = bridge;
480 connector->encoder = encoder;
481 dvo->encoder = encoder;
483 drm_connector = (struct drm_connector *)connector;
485 drm_connector->polled = DRM_CONNECTOR_POLL_HPD;
487 drm_connector_init(drm_dev, drm_connector,
488 &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
489 drm_connector_helper_add(drm_connector,
490 &sti_dvo_connector_helper_funcs);
492 err = drm_mode_connector_attach_encoder(drm_connector, encoder);
494 DRM_ERROR("Failed to attach a connector to a encoder\n");
501 drm_bridge_remove(bridge);
505 static void sti_dvo_unbind(struct device *dev,
506 struct device *master, void *data)
508 struct sti_dvo *dvo = dev_get_drvdata(dev);
510 drm_bridge_remove(dvo->bridge);
513 static const struct component_ops sti_dvo_ops = {
514 .bind = sti_dvo_bind,
515 .unbind = sti_dvo_unbind,
518 static int sti_dvo_probe(struct platform_device *pdev)
520 struct device *dev = &pdev->dev;
522 struct resource *res;
523 struct device_node *np = dev->of_node;
525 DRM_INFO("%s\n", __func__);
527 dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL);
529 DRM_ERROR("Failed to allocate memory for DVO\n");
533 dvo->dev = pdev->dev;
535 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg");
537 DRM_ERROR("Invalid dvo resource\n");
540 dvo->regs = devm_ioremap_nocache(dev, res->start,
545 dvo->clk_pix = devm_clk_get(dev, "dvo_pix");
546 if (IS_ERR(dvo->clk_pix)) {
547 DRM_ERROR("Cannot get dvo_pix clock\n");
548 return PTR_ERR(dvo->clk_pix);
551 dvo->clk = devm_clk_get(dev, "dvo");
552 if (IS_ERR(dvo->clk)) {
553 DRM_ERROR("Cannot get dvo clock\n");
554 return PTR_ERR(dvo->clk);
557 dvo->clk_main_parent = devm_clk_get(dev, "main_parent");
558 if (IS_ERR(dvo->clk_main_parent)) {
559 DRM_DEBUG_DRIVER("Cannot get main_parent clock\n");
560 dvo->clk_main_parent = NULL;
563 dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent");
564 if (IS_ERR(dvo->clk_aux_parent)) {
565 DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n");
566 dvo->clk_aux_parent = NULL;
569 dvo->panel_node = of_parse_phandle(np, "sti,panel", 0);
570 if (!dvo->panel_node)
571 DRM_ERROR("No panel associated to the dvo output\n");
572 of_node_put(dvo->panel_node);
574 platform_set_drvdata(pdev, dvo);
576 return component_add(&pdev->dev, &sti_dvo_ops);
579 static int sti_dvo_remove(struct platform_device *pdev)
581 component_del(&pdev->dev, &sti_dvo_ops);
585 static const struct of_device_id dvo_of_match[] = {
586 { .compatible = "st,stih407-dvo", },
589 MODULE_DEVICE_TABLE(of, dvo_of_match);
591 struct platform_driver sti_dvo_driver = {
594 .owner = THIS_MODULE,
595 .of_match_table = dvo_of_match,
597 .probe = sti_dvo_probe,
598 .remove = sti_dvo_remove,
601 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>");
602 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver");
603 MODULE_LICENSE("GPL");