2 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3 * Author:Mark Yao <mark.yao@rock-chips.com>
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #ifndef _ROCKCHIP_DRM_VOP_H
16 #define _ROCKCHIP_DRM_VOP_H
19 * major: IP major version, used for IP structure
20 * minor: big feature change under same structure
22 #define VOP_VERSION(major, minor) ((major) << 8 | (minor))
23 #define VOP_MAJOR(version) ((version) >> 8)
24 #define VOP_MINOR(version) ((version) & 0xff)
26 enum vop_data_format {
44 struct vop_reg htotal_pw;
45 struct vop_reg hact_st_end;
46 struct vop_reg hpost_st_end;
47 struct vop_reg vtotal_pw;
48 struct vop_reg vact_st_end;
49 struct vop_reg vpost_st_end;
53 struct vop_reg pin_pol;
54 struct vop_reg dp_pin_pol;
55 struct vop_reg edp_pin_pol;
56 struct vop_reg hdmi_pin_pol;
57 struct vop_reg mipi_pin_pol;
58 struct vop_reg rgb_pin_pol;
60 struct vop_reg edp_en;
61 struct vop_reg hdmi_en;
62 struct vop_reg mipi_en;
63 struct vop_reg rgb_en;
67 struct vop_reg cfg_done;
68 struct vop_reg dsp_blank;
69 struct vop_reg data_blank;
70 struct vop_reg dither_down;
71 struct vop_reg dither_up;
72 struct vop_reg gate_en;
73 struct vop_reg mmu_en;
74 struct vop_reg out_mode;
75 struct vop_reg standby;
79 struct vop_reg global_regdone_en;
86 struct vop_reg line_flag_num[2];
87 struct vop_reg enable;
89 struct vop_reg status;
92 struct vop_scl_extension {
93 struct vop_reg cbcr_vsd_mode;
94 struct vop_reg cbcr_vsu_mode;
95 struct vop_reg cbcr_hsd_mode;
96 struct vop_reg cbcr_ver_scl_mode;
97 struct vop_reg cbcr_hor_scl_mode;
98 struct vop_reg yrgb_vsd_mode;
99 struct vop_reg yrgb_vsu_mode;
100 struct vop_reg yrgb_hsd_mode;
101 struct vop_reg yrgb_ver_scl_mode;
102 struct vop_reg yrgb_hor_scl_mode;
103 struct vop_reg line_load_mode;
104 struct vop_reg cbcr_axi_gather_num;
105 struct vop_reg yrgb_axi_gather_num;
106 struct vop_reg vsd_cbcr_gt2;
107 struct vop_reg vsd_cbcr_gt4;
108 struct vop_reg vsd_yrgb_gt2;
109 struct vop_reg vsd_yrgb_gt4;
110 struct vop_reg bic_coe_sel;
111 struct vop_reg cbcr_axi_gather_en;
112 struct vop_reg yrgb_axi_gather_en;
113 struct vop_reg lb_mode;
116 struct vop_scl_regs {
117 const struct vop_scl_extension *ext;
119 struct vop_reg scale_yrgb_x;
120 struct vop_reg scale_yrgb_y;
121 struct vop_reg scale_cbcr_x;
122 struct vop_reg scale_cbcr_y;
126 const struct vop_scl_regs *scl;
127 const uint32_t *data_formats;
130 struct vop_reg enable;
132 struct vop_reg format;
133 struct vop_reg rb_swap;
134 struct vop_reg act_info;
135 struct vop_reg dsp_info;
136 struct vop_reg dsp_st;
137 struct vop_reg yrgb_mst;
138 struct vop_reg uv_mst;
139 struct vop_reg yrgb_vir;
140 struct vop_reg uv_vir;
142 struct vop_reg dst_alpha_ctl;
143 struct vop_reg src_alpha_ctl;
144 struct vop_reg channel;
147 struct vop_win_data {
149 const struct vop_win_phy *phy;
150 enum drm_plane_type type;
155 const struct vop_intr *intr;
156 const struct vop_common *common;
157 const struct vop_misc *misc;
158 const struct vop_modeset *modeset;
159 const struct vop_output *output;
160 const struct vop_win_data *win;
161 unsigned int win_size;
163 #define VOP_FEATURE_OUTPUT_RGB10 BIT(0)
167 /* interrupt define */
168 #define DSP_HOLD_VALID_INTR (1 << 0)
169 #define FS_INTR (1 << 1)
170 #define LINE_FLAG_INTR (1 << 2)
171 #define BUS_ERROR_INTR (1 << 3)
173 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \
174 LINE_FLAG_INTR | BUS_ERROR_INTR)
176 #define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4)
177 #define FS_INTR_EN(x) ((x) << 5)
178 #define LINE_FLAG_INTR_EN(x) ((x) << 6)
179 #define BUS_ERROR_INTR_EN(x) ((x) << 7)
180 #define DSP_HOLD_VALID_INTR_MASK (1 << 4)
181 #define FS_INTR_MASK (1 << 5)
182 #define LINE_FLAG_INTR_MASK (1 << 6)
183 #define BUS_ERROR_INTR_MASK (1 << 7)
185 #define INTR_CLR_SHIFT 8
186 #define DSP_HOLD_VALID_INTR_CLR (1 << (INTR_CLR_SHIFT + 0))
187 #define FS_INTR_CLR (1 << (INTR_CLR_SHIFT + 1))
188 #define LINE_FLAG_INTR_CLR (1 << (INTR_CLR_SHIFT + 2))
189 #define BUS_ERROR_INTR_CLR (1 << (INTR_CLR_SHIFT + 3))
191 #define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12)
192 #define DSP_LINE_NUM_MASK (0x1fff << 12)
194 /* src alpha ctrl define */
195 #define SRC_FADING_VALUE(x) (((x) & 0xff) << 24)
196 #define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16)
197 #define SRC_FACTOR_M0(x) (((x) & 0x7) << 6)
198 #define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5)
199 #define SRC_BLEND_M0(x) (((x) & 0x3) << 3)
200 #define SRC_ALPHA_M0(x) (((x) & 0x1) << 2)
201 #define SRC_COLOR_M0(x) (((x) & 0x1) << 1)
202 #define SRC_ALPHA_EN(x) (((x) & 0x1) << 0)
203 /* dst alpha ctrl define */
204 #define DST_FACTOR_M0(x) (((x) & 0x7) << 6)
207 * display output interface supported by rockchip lcdc
209 #define ROCKCHIP_OUT_MODE_P888 0
210 #define ROCKCHIP_OUT_MODE_P666 1
211 #define ROCKCHIP_OUT_MODE_P565 2
212 /* for use special outface */
213 #define ROCKCHIP_OUT_MODE_AAAA 15
220 enum global_blend_mode {
223 ALPHA_PER_PIX_GLOBAL,
226 enum alpha_cal_mode {
233 ALPHA_SRC_NO_PRE_MUL,
264 enum scale_down_mode {
265 SCALE_DOWN_BIL = 0x0,
276 #define FRAC_16_16(mult, div) (((mult) << 16) / (div))
277 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT 12
278 #define SCL_MAX_VSKIPLINES 4
279 #define MIN_SCL_FT_AFTER_VSKIP 1
281 static inline uint16_t scl_cal_scale(int src, int dst, int shift)
283 return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
286 static inline uint16_t scl_cal_scale2(int src, int dst)
288 return ((src - 1) << 12) / (dst - 1);
291 #define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12)
292 #define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16)
293 #define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16)
295 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
300 act_height = (src_h + vskiplines - 1) / vskiplines;
302 if (act_height == dst_h)
303 return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines;
305 return GET_SCL_FT_BILI_DN(act_height, dst_h);
308 static inline enum scale_mode scl_get_scl_mode(int src, int dst)
318 static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
322 for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
323 if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
329 static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
334 lb_mode = LB_RGB_3840X2;
335 else if (width > 1920)
336 lb_mode = LB_RGB_2560X4;
338 lb_mode = LB_RGB_1920X5;
339 else if (width > 1280)
340 lb_mode = LB_YUV_3840X5;
342 lb_mode = LB_YUV_2560X8;
347 extern const struct component_ops vop_component_ops;
348 #endif /* _ROCKCHIP_DRM_VOP_H */