2 * Copyright 2013 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
25 * Authors: Christian König <christian.koenig@amd.com>
28 #include <linux/firmware.h>
29 #include <linux/module.h>
34 #include "radeon_asic.h"
37 /* 1 second timeout */
38 #define VCE_IDLE_TIMEOUT_MS 1000
41 #define FIRMWARE_TAHITI "/*(DEBLOBBED)*/"
42 #define FIRMWARE_BONAIRE "/*(DEBLOBBED)*/"
46 static void radeon_vce_idle_work_handler(struct work_struct *work);
49 * radeon_vce_init - allocate memory, load vce firmware
51 * @rdev: radeon_device pointer
53 * First step to get VCE online, allocate memory and load the firmware
55 int radeon_vce_init(struct radeon_device *rdev)
57 static const char *fw_version = "[ATI LIB=VCEFW,";
58 static const char *fb_version = "[ATI LIB=VCEFWSTATS,";
60 const char *fw_name, *c;
61 uint8_t start, mid, end;
64 INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler);
66 switch (rdev->family) {
71 fw_name = FIRMWARE_TAHITI;
79 fw_name = FIRMWARE_BONAIRE;
86 r = reject_firmware(&rdev->vce_fw, fw_name, rdev->dev);
88 dev_err(rdev->dev, "radeon_vce: Can't load firmware \"%s\"\n",
93 /* search for firmware version */
95 size = rdev->vce_fw->size - strlen(fw_version) - 9;
96 c = rdev->vce_fw->data;
97 for (;size > 0; --size, ++c)
98 if (strncmp(c, fw_version, strlen(fw_version)) == 0)
104 c += strlen(fw_version);
105 if (sscanf(c, "%2hhd.%2hhd.%2hhd]", &start, &mid, &end) != 3)
108 /* search for feedback version */
110 size = rdev->vce_fw->size - strlen(fb_version) - 3;
111 c = rdev->vce_fw->data;
112 for (;size > 0; --size, ++c)
113 if (strncmp(c, fb_version, strlen(fb_version)) == 0)
119 c += strlen(fb_version);
120 if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1)
123 DRM_INFO("Found VCE firmware/feedback version %d.%d.%d / %d!\n",
124 start, mid, end, rdev->vce.fb_version);
126 rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8);
128 /* we can only work with this fw version for now */
129 if ((rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8))) &&
130 (rdev->vce.fw_version != ((50 << 24) | (0 << 16) | (1 << 8))) &&
131 (rdev->vce.fw_version != ((50 << 24) | (1 << 16) | (2 << 8))))
134 /* allocate firmware, stack and heap BO */
136 if (rdev->family < CHIP_BONAIRE)
137 size = vce_v1_0_bo_size(rdev);
139 size = vce_v2_0_bo_size(rdev);
140 r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
141 RADEON_GEM_DOMAIN_VRAM, 0, NULL, NULL,
144 dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r);
148 r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
150 radeon_bo_unref(&rdev->vce.vcpu_bo);
151 dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
155 r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM,
156 &rdev->vce.gpu_addr);
157 radeon_bo_unreserve(rdev->vce.vcpu_bo);
159 radeon_bo_unref(&rdev->vce.vcpu_bo);
160 dev_err(rdev->dev, "(%d) VCE bo pin failed\n", r);
164 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
165 atomic_set(&rdev->vce.handles[i], 0);
166 rdev->vce.filp[i] = NULL;
173 * radeon_vce_fini - free memory
175 * @rdev: radeon_device pointer
177 * Last step on VCE teardown, free firmware memory
179 void radeon_vce_fini(struct radeon_device *rdev)
181 if (rdev->vce.vcpu_bo == NULL)
184 radeon_bo_unref(&rdev->vce.vcpu_bo);
186 release_firmware(rdev->vce_fw);
190 * radeon_vce_suspend - unpin VCE fw memory
192 * @rdev: radeon_device pointer
195 int radeon_vce_suspend(struct radeon_device *rdev)
199 if (rdev->vce.vcpu_bo == NULL)
202 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i)
203 if (atomic_read(&rdev->vce.handles[i]))
206 if (i == RADEON_MAX_VCE_HANDLES)
209 /* TODO: suspending running encoding sessions isn't supported */
214 * radeon_vce_resume - pin VCE fw memory
216 * @rdev: radeon_device pointer
219 int radeon_vce_resume(struct radeon_device *rdev)
224 if (rdev->vce.vcpu_bo == NULL)
227 r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
229 dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
233 r = radeon_bo_kmap(rdev->vce.vcpu_bo, &cpu_addr);
235 radeon_bo_unreserve(rdev->vce.vcpu_bo);
236 dev_err(rdev->dev, "(%d) VCE map failed\n", r);
240 memset(cpu_addr, 0, radeon_bo_size(rdev->vce.vcpu_bo));
241 if (rdev->family < CHIP_BONAIRE)
242 r = vce_v1_0_load_fw(rdev, cpu_addr);
244 memcpy(cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size);
246 radeon_bo_kunmap(rdev->vce.vcpu_bo);
248 radeon_bo_unreserve(rdev->vce.vcpu_bo);
254 * radeon_vce_idle_work_handler - power off VCE
256 * @work: pointer to work structure
258 * power of VCE when it's not used any more
260 static void radeon_vce_idle_work_handler(struct work_struct *work)
262 struct radeon_device *rdev =
263 container_of(work, struct radeon_device, vce.idle_work.work);
265 if ((radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE1_INDEX) == 0) &&
266 (radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE2_INDEX) == 0)) {
267 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
268 radeon_dpm_enable_vce(rdev, false);
270 radeon_set_vce_clocks(rdev, 0, 0);
273 schedule_delayed_work(&rdev->vce.idle_work,
274 msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
279 * radeon_vce_note_usage - power up VCE
281 * @rdev: radeon_device pointer
283 * Make sure VCE is powerd up when we want to use it
285 void radeon_vce_note_usage(struct radeon_device *rdev)
287 bool streams_changed = false;
288 bool set_clocks = !cancel_delayed_work_sync(&rdev->vce.idle_work);
289 set_clocks &= schedule_delayed_work(&rdev->vce.idle_work,
290 msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
292 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
293 /* XXX figure out if the streams changed */
294 streams_changed = false;
297 if (set_clocks || streams_changed) {
298 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
299 radeon_dpm_enable_vce(rdev, true);
301 radeon_set_vce_clocks(rdev, 53300, 40000);
307 * radeon_vce_free_handles - free still open VCE handles
309 * @rdev: radeon_device pointer
310 * @filp: drm file pointer
312 * Close all VCE handles still open by this file pointer
314 void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp)
317 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
318 uint32_t handle = atomic_read(&rdev->vce.handles[i]);
319 if (!handle || rdev->vce.filp[i] != filp)
322 radeon_vce_note_usage(rdev);
324 r = radeon_vce_get_destroy_msg(rdev, TN_RING_TYPE_VCE1_INDEX,
327 DRM_ERROR("Error destroying VCE handle (%d)!\n", r);
329 rdev->vce.filp[i] = NULL;
330 atomic_set(&rdev->vce.handles[i], 0);
335 * radeon_vce_get_create_msg - generate a VCE create msg
337 * @rdev: radeon_device pointer
338 * @ring: ring we should submit the msg to
339 * @handle: VCE session handle to use
340 * @fence: optional fence to return
342 * Open up a stream for HW test
344 int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring,
345 uint32_t handle, struct radeon_fence **fence)
347 const unsigned ib_size_dw = 1024;
352 r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
354 DRM_ERROR("radeon: failed to get ib (%d).\n", r);
358 dummy = ib.gpu_addr + 1024;
360 /* stitch together an VCE create msg */
362 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */
363 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */
364 ib.ptr[ib.length_dw++] = cpu_to_le32(handle);
366 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000030); /* len */
367 ib.ptr[ib.length_dw++] = cpu_to_le32(0x01000001); /* create cmd */
368 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000);
369 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000042);
370 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000a);
371 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
372 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000080);
373 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000060);
374 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000100);
375 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000100);
376 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c);
377 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000);
379 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000014); /* len */
380 ib.ptr[ib.length_dw++] = cpu_to_le32(0x05000005); /* feedback buffer */
381 ib.ptr[ib.length_dw++] = cpu_to_le32(upper_32_bits(dummy));
382 ib.ptr[ib.length_dw++] = cpu_to_le32(dummy);
383 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
385 for (i = ib.length_dw; i < ib_size_dw; ++i)
386 ib.ptr[i] = cpu_to_le32(0x0);
388 r = radeon_ib_schedule(rdev, &ib, NULL, false);
390 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
394 *fence = radeon_fence_ref(ib.fence);
396 radeon_ib_free(rdev, &ib);
402 * radeon_vce_get_destroy_msg - generate a VCE destroy msg
404 * @rdev: radeon_device pointer
405 * @ring: ring we should submit the msg to
406 * @handle: VCE session handle to use
407 * @fence: optional fence to return
409 * Close up a stream for HW test or if userspace failed to do so
411 int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring,
412 uint32_t handle, struct radeon_fence **fence)
414 const unsigned ib_size_dw = 1024;
419 r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
421 DRM_ERROR("radeon: failed to get ib (%d).\n", r);
425 dummy = ib.gpu_addr + 1024;
427 /* stitch together an VCE destroy msg */
429 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */
430 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */
431 ib.ptr[ib.length_dw++] = cpu_to_le32(handle);
433 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000014); /* len */
434 ib.ptr[ib.length_dw++] = cpu_to_le32(0x05000005); /* feedback buffer */
435 ib.ptr[ib.length_dw++] = cpu_to_le32(upper_32_bits(dummy));
436 ib.ptr[ib.length_dw++] = cpu_to_le32(dummy);
437 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
439 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000008); /* len */
440 ib.ptr[ib.length_dw++] = cpu_to_le32(0x02000001); /* destroy cmd */
442 for (i = ib.length_dw; i < ib_size_dw; ++i)
443 ib.ptr[i] = cpu_to_le32(0x0);
445 r = radeon_ib_schedule(rdev, &ib, NULL, false);
447 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
451 *fence = radeon_fence_ref(ib.fence);
453 radeon_ib_free(rdev, &ib);
459 * radeon_vce_cs_reloc - command submission relocation
462 * @lo: address of lower dword
463 * @hi: address of higher dword
464 * @size: size of checker for relocation buffer
466 * Patch relocation inside command stream with real buffer address
468 int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi,
471 struct radeon_cs_chunk *relocs_chunk;
472 struct radeon_bo_list *reloc;
473 uint64_t start, end, offset;
476 relocs_chunk = p->chunk_relocs;
477 offset = radeon_get_ib_value(p, lo);
478 idx = radeon_get_ib_value(p, hi);
480 if (idx >= relocs_chunk->length_dw) {
481 DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
482 idx, relocs_chunk->length_dw);
486 reloc = &p->relocs[(idx / 4)];
487 start = reloc->gpu_offset;
488 end = start + radeon_bo_size(reloc->robj);
491 p->ib.ptr[lo] = start & 0xFFFFFFFF;
492 p->ib.ptr[hi] = start >> 32;
495 DRM_ERROR("invalid reloc offset %llX!\n", offset);
498 if ((end - start) < size) {
499 DRM_ERROR("buffer to small (%d / %d)!\n",
500 (unsigned)(end - start), size);
508 * radeon_vce_validate_handle - validate stream handle
511 * @handle: handle to validate
512 * @allocated: allocated a new handle?
514 * Validates the handle and return the found session index or -EINVAL
515 * we don't have another free session index.
517 static int radeon_vce_validate_handle(struct radeon_cs_parser *p,
518 uint32_t handle, bool *allocated)
524 /* validate the handle */
525 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
526 if (atomic_read(&p->rdev->vce.handles[i]) == handle) {
527 if (p->rdev->vce.filp[i] != p->filp) {
528 DRM_ERROR("VCE handle collision detected!\n");
535 /* handle not found try to alloc a new one */
536 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
537 if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) {
538 p->rdev->vce.filp[i] = p->filp;
539 p->rdev->vce.img_size[i] = 0;
545 DRM_ERROR("No more free VCE handles!\n");
550 * radeon_vce_cs_parse - parse and validate the command stream
555 int radeon_vce_cs_parse(struct radeon_cs_parser *p)
557 int session_idx = -1;
558 bool destroyed = false, created = false, allocated = false;
559 uint32_t tmp, handle = 0;
560 uint32_t *size = &tmp;
563 while (p->idx < p->chunk_ib->length_dw) {
564 uint32_t len = radeon_get_ib_value(p, p->idx);
565 uint32_t cmd = radeon_get_ib_value(p, p->idx + 1);
567 if ((len < 8) || (len & 3)) {
568 DRM_ERROR("invalid VCE command length (%d)!\n", len);
574 DRM_ERROR("No other command allowed after destroy!\n");
580 case 0x00000001: // session
581 handle = radeon_get_ib_value(p, p->idx + 2);
582 session_idx = radeon_vce_validate_handle(p, handle,
586 size = &p->rdev->vce.img_size[session_idx];
589 case 0x00000002: // task info
592 case 0x01000001: // create
595 DRM_ERROR("Handle already in use!\n");
600 *size = radeon_get_ib_value(p, p->idx + 8) *
601 radeon_get_ib_value(p, p->idx + 10) *
605 case 0x04000001: // config extension
606 case 0x04000002: // pic control
607 case 0x04000005: // rate control
608 case 0x04000007: // motion estimation
609 case 0x04000008: // rdo
610 case 0x04000009: // vui
613 case 0x03000001: // encode
614 r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9,
619 r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11,
625 case 0x02000001: // destroy
629 case 0x05000001: // context buffer
630 r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
636 case 0x05000004: // video bitstream buffer
637 tmp = radeon_get_ib_value(p, p->idx + 4);
638 r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
644 case 0x05000005: // feedback buffer
645 r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
652 DRM_ERROR("invalid VCE command (0x%x)!\n", cmd);
657 if (session_idx == -1) {
658 DRM_ERROR("no session command at start of IB\n");
666 if (allocated && !created) {
667 DRM_ERROR("New session without create command!\n");
672 if ((!r && destroyed) || (r && allocated)) {
674 * IB contains a destroy msg or we have allocated an
675 * handle and got an error, anyway free the handle
677 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i)
678 atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0);
685 * radeon_vce_semaphore_emit - emit a semaphore command
687 * @rdev: radeon_device pointer
688 * @ring: engine to use
689 * @semaphore: address of semaphore
690 * @emit_wait: true=emit wait, false=emit signal
693 bool radeon_vce_semaphore_emit(struct radeon_device *rdev,
694 struct radeon_ring *ring,
695 struct radeon_semaphore *semaphore,
698 uint64_t addr = semaphore->gpu_addr;
700 radeon_ring_write(ring, cpu_to_le32(VCE_CMD_SEMAPHORE));
701 radeon_ring_write(ring, cpu_to_le32((addr >> 3) & 0x000FFFFF));
702 radeon_ring_write(ring, cpu_to_le32((addr >> 23) & 0x000FFFFF));
703 radeon_ring_write(ring, cpu_to_le32(0x01003000 | (emit_wait ? 1 : 0)));
705 radeon_ring_write(ring, cpu_to_le32(VCE_CMD_END));
711 * radeon_vce_ib_execute - execute indirect buffer
713 * @rdev: radeon_device pointer
714 * @ib: the IB to execute
717 void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
719 struct radeon_ring *ring = &rdev->ring[ib->ring];
720 radeon_ring_write(ring, cpu_to_le32(VCE_CMD_IB));
721 radeon_ring_write(ring, cpu_to_le32(ib->gpu_addr));
722 radeon_ring_write(ring, cpu_to_le32(upper_32_bits(ib->gpu_addr)));
723 radeon_ring_write(ring, cpu_to_le32(ib->length_dw));
727 * radeon_vce_fence_emit - add a fence command to the ring
729 * @rdev: radeon_device pointer
733 void radeon_vce_fence_emit(struct radeon_device *rdev,
734 struct radeon_fence *fence)
736 struct radeon_ring *ring = &rdev->ring[fence->ring];
737 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;
739 radeon_ring_write(ring, cpu_to_le32(VCE_CMD_FENCE));
740 radeon_ring_write(ring, cpu_to_le32(addr));
741 radeon_ring_write(ring, cpu_to_le32(upper_32_bits(addr)));
742 radeon_ring_write(ring, cpu_to_le32(fence->seq));
743 radeon_ring_write(ring, cpu_to_le32(VCE_CMD_TRAP));
744 radeon_ring_write(ring, cpu_to_le32(VCE_CMD_END));
748 * radeon_vce_ring_test - test if VCE ring is working
750 * @rdev: radeon_device pointer
751 * @ring: the engine to test on
754 int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring)
756 uint32_t rptr = vce_v1_0_get_rptr(rdev, ring);
760 r = radeon_ring_lock(rdev, ring, 16);
762 DRM_ERROR("radeon: vce failed to lock ring %d (%d).\n",
766 radeon_ring_write(ring, cpu_to_le32(VCE_CMD_END));
767 radeon_ring_unlock_commit(rdev, ring, false);
769 for (i = 0; i < rdev->usec_timeout; i++) {
770 if (vce_v1_0_get_rptr(rdev, ring) != rptr)
775 if (i < rdev->usec_timeout) {
776 DRM_INFO("ring test on %d succeeded in %d usecs\n",
779 DRM_ERROR("radeon: ring %d test failed\n",
788 * radeon_vce_ib_test - test if VCE IBs are working
790 * @rdev: radeon_device pointer
791 * @ring: the engine to test on
794 int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
796 struct radeon_fence *fence = NULL;
799 r = radeon_vce_get_create_msg(rdev, ring->idx, 1, NULL);
801 DRM_ERROR("radeon: failed to get create msg (%d).\n", r);
805 r = radeon_vce_get_destroy_msg(rdev, ring->idx, 1, &fence);
807 DRM_ERROR("radeon: failed to get destroy ib (%d).\n", r);
811 r = radeon_fence_wait_timeout(fence, false, usecs_to_jiffies(
812 RADEON_USEC_IB_TEST_TIMEOUT));
814 DRM_ERROR("radeon: fence wait failed (%d).\n", r);
816 DRM_ERROR("radeon: fence wait timed out.\n");
819 DRM_INFO("ib test on ring %d succeeded\n", ring->idx);
823 radeon_fence_unref(&fence);