drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32
  33 #include <linux/dma-mapping.h>
  34 #include <linux/pagemap.h>
  35 #include <linux/pci.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/slab.h>
  38 #include <linux/swap.h>
  39 #include <linux/swiotlb.h>
  40
  41 #include <drm/drm_agpsupport.h>
  42 #include <drm/drm_debugfs.h>
  43 #include <drm/drm_device.h>
  44 #include <drm/drm_file.h>
  45 #include <drm/drm_prime.h>
  46 #include <drm/radeon_drm.h>
  47 #include <drm/ttm/ttm_bo_api.h>
  48 #include <drm/ttm/ttm_bo_driver.h>
  49 #include <drm/ttm/ttm_module.h>
  50 #include <drm/ttm/ttm_page_alloc.h>
  51 #include <drm/ttm/ttm_placement.h>
  52
  53 #include "radeon_reg.h"
  54 #include "radeon.h"
  55
  56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
  58
  59 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
  60                               struct ttm_tt *ttm,
  61                               struct ttm_resource *bo_mem);
  62
  63 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  64 {
  65         struct radeon_mman *mman;
  66         struct radeon_device *rdev;
  67
  68         mman = container_of(bdev, struct radeon_mman, bdev);
  69         rdev = container_of(mman, struct radeon_device, mman);
  70         return rdev;
  71 }
  72
  73 static int radeon_ttm_init_vram(struct radeon_device *rdev)
  74 {
  75         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
  76                                   false, rdev->mc.real_vram_size >> PAGE_SHIFT);
  77 }
  78
  79 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
  80 {
  81         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
  82                                   true, rdev->mc.gtt_size >> PAGE_SHIFT);
  83 }
  84
  85 static void radeon_evict_flags(struct ttm_buffer_object *bo,
  86                                 struct ttm_placement *placement)
  87 {
  88         static const struct ttm_place placements = {
  89                 .fpfn = 0,
  90                 .lpfn = 0,
  91                 .mem_type = TTM_PL_SYSTEM,
  92                 .flags = TTM_PL_MASK_CACHING
  93         };
  94
  95         struct radeon_bo *rbo;
  96
  97         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
  98                 placement->placement = &placements;
  99                 placement->busy_placement = &placements;
 100                 placement->num_placement = 1;
 101                 placement->num_busy_placement = 1;
 102                 return;
 103         }
 104         rbo = container_of(bo, struct radeon_bo, tbo);
 105         switch (bo->mem.mem_type) {
 106         case TTM_PL_VRAM:
 107                 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
 108                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 109                 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
 110                          bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
 111                         unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
 112                         int i;
 113
 114                         /* Try evicting to the CPU inaccessible part of VRAM
 115                          * first, but only set GTT as busy placement, so this
 116                          * BO will be evicted to GTT rather than causing other
 117                          * BOs to be evicted from VRAM
 118                          */
 119                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
 120                                                          RADEON_GEM_DOMAIN_GTT);
 121                         rbo->placement.num_busy_placement = 0;
 122                         for (i = 0; i < rbo->placement.num_placement; i++) {
 123                                 if (rbo->placements[i].mem_type == TTM_PL_VRAM) {
 124                                         if (rbo->placements[i].fpfn < fpfn)
 125                                                 rbo->placements[i].fpfn = fpfn;
 126                                 } else {
 127                                         rbo->placement.busy_placement =
 128                                                 &rbo->placements[i];
 129                                         rbo->placement.num_busy_placement = 1;
 130                                 }
 131                         }
 132                 } else
 133                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 134                 break;
 135         case TTM_PL_TT:
 136         default:
 137                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 138         }
 139         *placement = rbo->placement;
 140 }
 141
 142 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 143 {
 144         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 145         struct radeon_device *rdev = radeon_get_rdev(bo->bdev);
 146
 147         if (radeon_ttm_tt_has_userptr(rdev, bo->ttm))
 148                 return -EPERM;
 149         return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
 150                                           filp->private_data);
 151 }
 152
 153 static int radeon_move_blit(struct ttm_buffer_object *bo,
 154                         bool evict, bool no_wait_gpu,
 155                         struct ttm_resource *new_mem,
 156                         struct ttm_resource *old_mem)
 157 {
 158         struct radeon_device *rdev;
 159         uint64_t old_start, new_start;
 160         struct radeon_fence *fence;
 161         unsigned num_pages;
 162         int r, ridx;
 163
 164         rdev = radeon_get_rdev(bo->bdev);
 165         ridx = radeon_copy_ring_index(rdev);
 166         old_start = (u64)old_mem->start << PAGE_SHIFT;
 167         new_start = (u64)new_mem->start << PAGE_SHIFT;
 168
 169         switch (old_mem->mem_type) {
 170         case TTM_PL_VRAM:
 171                 old_start += rdev->mc.vram_start;
 172                 break;
 173         case TTM_PL_TT:
 174                 old_start += rdev->mc.gtt_start;
 175                 break;
 176         default:
 177                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 178                 return -EINVAL;
 179         }
 180         switch (new_mem->mem_type) {
 181         case TTM_PL_VRAM:
 182                 new_start += rdev->mc.vram_start;
 183                 break;
 184         case TTM_PL_TT:
 185                 new_start += rdev->mc.gtt_start;
 186                 break;
 187         default:
 188                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 189                 return -EINVAL;
 190         }
 191         if (!rdev->ring[ridx].ready) {
 192                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 193                 return -EINVAL;
 194         }
 195
 196         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
 197
 198         num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 199         fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
 200         if (IS_ERR(fence))
 201                 return PTR_ERR(fence);
 202
 203         r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false, new_mem);
 204         radeon_fence_unref(&fence);
 205         return r;
 206 }
 207
 208 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 209                                 bool evict, bool interruptible,
 210                                 bool no_wait_gpu,
 211                                 struct ttm_resource *new_mem)
 212 {
 213         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 214         struct ttm_resource *old_mem = &bo->mem;
 215         struct ttm_resource tmp_mem;
 216         struct ttm_place placements;
 217         struct ttm_placement placement;
 218         int r;
 219
 220         tmp_mem = *new_mem;
 221         tmp_mem.mm_node = NULL;
 222         placement.num_placement = 1;
 223         placement.placement = &placements;
 224         placement.num_busy_placement = 1;
 225         placement.busy_placement = &placements;
 226         placements.fpfn = 0;
 227         placements.lpfn = 0;
 228         placements.mem_type = TTM_PL_TT;
 229         placements.flags = TTM_PL_MASK_CACHING;
 230         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
 231         if (unlikely(r)) {
 232                 return r;
 233         }
 234
 235         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 236         if (unlikely(r)) {
 237                 goto out_cleanup;
 238         }
 239
 240         r = ttm_tt_populate(bo->bdev, bo->ttm, &ctx);
 241         if (unlikely(r)) {
 242                 goto out_cleanup;
 243         }
 244
 245         r = radeon_ttm_tt_bind(bo->bdev, bo->ttm, &tmp_mem);
 246         if (unlikely(r)) {
 247                 goto out_cleanup;
 248         }
 249         r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
 250         if (unlikely(r)) {
 251                 goto out_cleanup;
 252         }
 253         r = ttm_bo_move_ttm(bo, &ctx, new_mem);
 254 out_cleanup:
 255         ttm_resource_free(bo, &tmp_mem);
 256         return r;
 257 }
 258
 259 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 260                                 bool evict, bool interruptible,
 261                                 bool no_wait_gpu,
 262                                 struct ttm_resource *new_mem)
 263 {
 264         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 265         struct ttm_resource *old_mem = &bo->mem;
 266         struct ttm_resource tmp_mem;
 267         struct ttm_placement placement;
 268         struct ttm_place placements;
 269         int r;
 270
 271         tmp_mem = *new_mem;
 272         tmp_mem.mm_node = NULL;
 273         placement.num_placement = 1;
 274         placement.placement = &placements;
 275         placement.num_busy_placement = 1;
 276         placement.busy_placement = &placements;
 277         placements.fpfn = 0;
 278         placements.lpfn = 0;
 279         placements.mem_type = TTM_PL_TT;
 280         placements.flags = TTM_PL_MASK_CACHING;
 281         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
 282         if (unlikely(r)) {
 283                 return r;
 284         }
 285         r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem);
 286         if (unlikely(r)) {
 287                 goto out_cleanup;
 288         }
 289         r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
 290         if (unlikely(r)) {
 291                 goto out_cleanup;
 292         }
 293 out_cleanup:
 294         ttm_resource_free(bo, &tmp_mem);
 295         return r;
 296 }
 297
 298 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
 299                           struct ttm_operation_ctx *ctx,
 300                           struct ttm_resource *new_mem)
 301 {
 302         struct radeon_device *rdev;
 303         struct radeon_bo *rbo;
 304         struct ttm_resource *old_mem = &bo->mem;
 305         int r;
 306
 307         r = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
 308         if (r)
 309                 return r;
 310
 311         /* Can't move a pinned BO */
 312         rbo = container_of(bo, struct radeon_bo, tbo);
 313         if (WARN_ON_ONCE(rbo->pin_count > 0))
 314                 return -EINVAL;
 315
 316         rdev = radeon_get_rdev(bo->bdev);
 317         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 318                 ttm_bo_move_null(bo, new_mem);
 319                 return 0;
 320         }
 321         if ((old_mem->mem_type == TTM_PL_TT &&
 322              new_mem->mem_type == TTM_PL_SYSTEM) ||
 323             (old_mem->mem_type == TTM_PL_SYSTEM &&
 324              new_mem->mem_type == TTM_PL_TT)) {
 325                 /* bind is enough */
 326                 ttm_bo_move_null(bo, new_mem);
 327                 return 0;
 328         }
 329         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
 330             rdev->asic->copy.copy == NULL) {
 331                 /* use memcpy */
 332                 goto memcpy;
 333         }
 334
 335         if (old_mem->mem_type == TTM_PL_VRAM &&
 336             new_mem->mem_type == TTM_PL_SYSTEM) {
 337                 r = radeon_move_vram_ram(bo, evict, ctx->interruptible,
 338                                         ctx->no_wait_gpu, new_mem);
 339         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 340                    new_mem->mem_type == TTM_PL_VRAM) {
 341                 r = radeon_move_ram_vram(bo, evict, ctx->interruptible,
 342                                             ctx->no_wait_gpu, new_mem);
 343         } else {
 344                 r = radeon_move_blit(bo, evict, ctx->no_wait_gpu,
 345                                      new_mem, old_mem);
 346         }
 347
 348         if (r) {
 349 memcpy:
 350                 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
 351                 if (r) {
 352                         return r;
 353                 }
 354         }
 355
 356         /* update statistics */
 357         atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
 358         return 0;
 359 }
 360
 361 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem)
 362 {
 363         struct radeon_device *rdev = radeon_get_rdev(bdev);
 364         size_t bus_size = (size_t)mem->num_pages << PAGE_SHIFT;
 365
 366         switch (mem->mem_type) {
 367         case TTM_PL_SYSTEM:
 368                 /* system memory */
 369                 return 0;
 370         case TTM_PL_TT:
 371 #if IS_ENABLED(CONFIG_AGP)
 372                 if (rdev->flags & RADEON_IS_AGP) {
 373                         /* RADEON_IS_AGP is set only if AGP is active */
 374                         mem->bus.offset = (mem->start << PAGE_SHIFT) +
 375                                 rdev->mc.agp_base;
 376                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 377                 }
 378 #endif
 379                 break;
 380         case TTM_PL_VRAM:
 381                 mem->bus.offset = mem->start << PAGE_SHIFT;
 382                 /* check if it's visible */
 383                 if ((mem->bus.offset + bus_size) > rdev->mc.visible_vram_size)
 384                         return -EINVAL;
 385                 mem->bus.offset += rdev->mc.aper_base;
 386                 mem->bus.is_iomem = true;
 387 #ifdef __alpha__
 388                 /*
 389                  * Alpha: use bus.addr to hold the ioremap() return,
 390                  * so we can modify bus.base below.
 391                  */
 392                 if (mem->placement & TTM_PL_FLAG_WC)
 393                         mem->bus.addr =
 394                                 ioremap_wc(mem->bus.offset, bus_size);
 395                 else
 396                         mem->bus.addr =
 397                                 ioremap(mem->bus.offset, bus_size);
 398                 if (!mem->bus.addr)
 399                         return -ENOMEM;
 400
 401                 /*
 402                  * Alpha: Use just the bus offset plus
 403                  * the hose/domain memory base for bus.base.
 404                  * It then can be used to build PTEs for VRAM
 405                  * access, as done in ttm_bo_vm_fault().
 406                  */
 407                 mem->bus.offset = (mem->bus.offset & 0x0ffffffffUL) +
 408                         rdev->ddev->hose->dense_mem_base;
 409 #endif
 410                 break;
 411         default:
 412                 return -EINVAL;
 413         }
 414         return 0;
 415 }
 416
 417 /*
 418  * TTM backend functions.
 419  */
 420 struct radeon_ttm_tt {
 421         struct ttm_dma_tt               ttm;
 422         u64                             offset;
 423
 424         uint64_t                        userptr;
 425         struct mm_struct                *usermm;
 426         uint32_t                        userflags;
 427         bool bound;
 428 };
 429
 430 /* prepare the sg table with the user pages */
 431 static int radeon_ttm_tt_pin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 432 {
 433         struct radeon_device *rdev = radeon_get_rdev(bdev);
 434         struct radeon_ttm_tt *gtt = (void *)ttm;
 435         unsigned pinned = 0;
 436         int r;
 437
 438         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 439         enum dma_data_direction direction = write ?
 440                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 441
 442         if (current->mm != gtt->usermm)
 443                 return -EPERM;
 444
 445         if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
 446                 /* check that we only pin down anonymous memory
 447                    to prevent problems with writeback */
 448                 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
 449                 struct vm_area_struct *vma;
 450                 vma = find_vma(gtt->usermm, gtt->userptr);
 451                 if (!vma || vma->vm_file || vma->vm_end < end)
 452                         return -EPERM;
 453         }
 454
 455         do {
 456                 unsigned num_pages = ttm->num_pages - pinned;
 457                 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
 458                 struct page **pages = ttm->pages + pinned;
 459
 460                 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
 461                                    pages, NULL);
 462                 if (r < 0)
 463                         goto release_pages;
 464
 465                 pinned += r;
 466
 467         } while (pinned < ttm->num_pages);
 468
 469         r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
 470                                       ttm->num_pages << PAGE_SHIFT,
 471                                       GFP_KERNEL);
 472         if (r)
 473                 goto release_sg;
 474
 475         r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
 476         if (r)
 477                 goto release_sg;
 478
 479         drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 480                                          gtt->ttm.dma_address, ttm->num_pages);
 481
 482         return 0;
 483
 484 release_sg:
 485         kfree(ttm->sg);
 486
 487 release_pages:
 488         release_pages(ttm->pages, pinned);
 489         return r;
 490 }
 491
 492 static void radeon_ttm_tt_unpin_userptr(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 493 {
 494         struct radeon_device *rdev = radeon_get_rdev(bdev);
 495         struct radeon_ttm_tt *gtt = (void *)ttm;
 496         struct sg_page_iter sg_iter;
 497
 498         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 499         enum dma_data_direction direction = write ?
 500                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 501
 502         /* double check that we don't free the table twice */
 503         if (!ttm->sg->sgl)
 504                 return;
 505
 506         /* free the sg table and pages again */
 507         dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
 508
 509         for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
 510                 struct page *page = sg_page_iter_page(&sg_iter);
 511                 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
 512                         set_page_dirty(page);
 513
 514                 mark_page_accessed(page);
 515                 put_page(page);
 516         }
 517
 518         sg_free_table(ttm->sg);
 519 }
 520
 521 static bool radeon_ttm_backend_is_bound(struct ttm_tt *ttm)
 522 {
 523         struct radeon_ttm_tt *gtt = (void*)ttm;
 524
 525         return (gtt->bound);
 526 }
 527
 528 static int radeon_ttm_backend_bind(struct ttm_bo_device *bdev,
 529                                    struct ttm_tt *ttm,
 530                                    struct ttm_resource *bo_mem)
 531 {
 532         struct radeon_ttm_tt *gtt = (void*)ttm;
 533         struct radeon_device *rdev = radeon_get_rdev(bdev);
 534         uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
 535                 RADEON_GART_PAGE_WRITE;
 536         int r;
 537
 538         if (gtt->bound)
 539                 return 0;
 540
 541         if (gtt->userptr) {
 542                 radeon_ttm_tt_pin_userptr(bdev, ttm);
 543                 flags &= ~RADEON_GART_PAGE_WRITE;
 544         }
 545
 546         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 547         if (!ttm->num_pages) {
 548                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
 549                      ttm->num_pages, bo_mem, ttm);
 550         }
 551         if (ttm->caching_state == tt_cached)
 552                 flags |= RADEON_GART_PAGE_SNOOP;
 553         r = radeon_gart_bind(rdev, gtt->offset, ttm->num_pages,
 554                              ttm->pages, gtt->ttm.dma_address, flags);
 555         if (r) {
 556                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 557                           ttm->num_pages, (unsigned)gtt->offset);
 558                 return r;
 559         }
 560         gtt->bound = true;
 561         return 0;
 562 }
 563
 564 static void radeon_ttm_backend_unbind(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 565 {
 566         struct radeon_ttm_tt *gtt = (void *)ttm;
 567         struct radeon_device *rdev = radeon_get_rdev(bdev);
 568
 569         if (gtt->userptr)
 570                 radeon_ttm_tt_unpin_userptr(bdev, ttm);
 571
 572         if (!gtt->bound)
 573                 return;
 574
 575         radeon_gart_unbind(rdev, gtt->offset, ttm->num_pages);
 576
 577         gtt->bound = false;
 578 }
 579
 580 static void radeon_ttm_backend_destroy(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 581 {
 582         struct radeon_ttm_tt *gtt = (void *)ttm;
 583
 584         radeon_ttm_backend_unbind(bdev, ttm);
 585         ttm_tt_destroy_common(bdev, ttm);
 586
 587         ttm_dma_tt_fini(&gtt->ttm);
 588         kfree(gtt);
 589 }
 590
 591 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
 592                                            uint32_t page_flags)
 593 {
 594         struct radeon_device *rdev;
 595         struct radeon_ttm_tt *gtt;
 596
 597         rdev = radeon_get_rdev(bo->bdev);
 598 #if IS_ENABLED(CONFIG_AGP)
 599         if (rdev->flags & RADEON_IS_AGP) {
 600                 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
 601                                          page_flags);
 602         }
 603 #endif
 604
 605         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
 606         if (gtt == NULL) {
 607                 return NULL;
 608         }
 609         if (ttm_dma_tt_init(&gtt->ttm, bo, page_flags)) {
 610                 kfree(gtt);
 611                 return NULL;
 612         }
 613         return &gtt->ttm.ttm;
 614 }
 615
 616 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct radeon_device *rdev,
 617                                                   struct ttm_tt *ttm)
 618 {
 619 #if IS_ENABLED(CONFIG_AGP)
 620         if (rdev->flags & RADEON_IS_AGP)
 621                 return NULL;
 622 #endif
 623
 624         if (!ttm)
 625                 return NULL;
 626         return container_of(ttm, struct radeon_ttm_tt, ttm.ttm);
 627 }
 628
 629 static int radeon_ttm_tt_populate(struct ttm_bo_device *bdev,
 630                                   struct ttm_tt *ttm,
 631                                   struct ttm_operation_ctx *ctx)
 632 {
 633         struct radeon_device *rdev = radeon_get_rdev(bdev);
 634         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 635         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 636
 637         if (gtt && gtt->userptr) {
 638                 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
 639                 if (!ttm->sg)
 640                         return -ENOMEM;
 641
 642                 ttm->page_flags |= TTM_PAGE_FLAG_SG;
 643                 ttm_tt_set_populated(ttm);
 644                 return 0;
 645         }
 646
 647         if (slave && ttm->sg) {
 648                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 649                                                  gtt->ttm.dma_address, ttm->num_pages);
 650                 ttm_tt_set_populated(ttm);
 651                 return 0;
 652         }
 653
 654 #if IS_ENABLED(CONFIG_AGP)
 655         if (rdev->flags & RADEON_IS_AGP) {
 656                 return ttm_pool_populate(ttm, ctx);
 657         }
 658 #endif
 659
 660 #ifdef CONFIG_SWIOTLB
 661         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 662                 return ttm_dma_populate(&gtt->ttm, rdev->dev, ctx);
 663         }
 664 #endif
 665
 666         return ttm_populate_and_map_pages(rdev->dev, &gtt->ttm, ctx);
 667 }
 668
 669 static void radeon_ttm_tt_unpopulate(struct ttm_bo_device *bdev, struct ttm_tt *ttm)
 670 {
 671         struct radeon_device *rdev = radeon_get_rdev(bdev);
 672         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 673         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 674
 675         if (gtt && gtt->userptr) {
 676                 kfree(ttm->sg);
 677                 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
 678                 return;
 679         }
 680
 681         if (slave)
 682                 return;
 683
 684 #if IS_ENABLED(CONFIG_AGP)
 685         if (rdev->flags & RADEON_IS_AGP) {
 686                 ttm_pool_unpopulate(ttm);
 687                 return;
 688         }
 689 #endif
 690
 691 #ifdef CONFIG_SWIOTLB
 692         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 693                 ttm_dma_unpopulate(&gtt->ttm, rdev->dev);
 694                 return;
 695         }
 696 #endif
 697
 698         ttm_unmap_and_unpopulate_pages(rdev->dev, &gtt->ttm);
 699 }
 700
 701 int radeon_ttm_tt_set_userptr(struct radeon_device *rdev,
 702                               struct ttm_tt *ttm, uint64_t addr,
 703                               uint32_t flags)
 704 {
 705         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 706
 707         if (gtt == NULL)
 708                 return -EINVAL;
 709
 710         gtt->userptr = addr;
 711         gtt->usermm = current->mm;
 712         gtt->userflags = flags;
 713         return 0;
 714 }
 715
 716 bool radeon_ttm_tt_is_bound(struct ttm_bo_device *bdev,
 717                             struct ttm_tt *ttm)
 718 {
 719 #if IS_ENABLED(CONFIG_AGP)
 720         struct radeon_device *rdev = radeon_get_rdev(bdev);
 721         if (rdev->flags & RADEON_IS_AGP)
 722                 return ttm_agp_is_bound(ttm);
 723 #endif
 724         return radeon_ttm_backend_is_bound(ttm);
 725 }
 726
 727 static int radeon_ttm_tt_bind(struct ttm_bo_device *bdev,
 728                               struct ttm_tt *ttm,
 729                               struct ttm_resource *bo_mem)
 730 {
 731 #if IS_ENABLED(CONFIG_AGP)
 732         struct radeon_device *rdev = radeon_get_rdev(bdev);
 733 #endif
 734
 735         if (!bo_mem)
 736                 return -EINVAL;
 737 #if IS_ENABLED(CONFIG_AGP)
 738         if (rdev->flags & RADEON_IS_AGP)
 739                 return ttm_agp_bind(ttm, bo_mem);
 740 #endif
 741
 742         return radeon_ttm_backend_bind(bdev, ttm, bo_mem);
 743 }
 744
 745 static void radeon_ttm_tt_unbind(struct ttm_bo_device *bdev,
 746                                  struct ttm_tt *ttm)
 747 {
 748 #if IS_ENABLED(CONFIG_AGP)
 749         struct radeon_device *rdev = radeon_get_rdev(bdev);
 750
 751         if (rdev->flags & RADEON_IS_AGP) {
 752                 ttm_agp_unbind(ttm);
 753                 return;
 754         }
 755 #endif
 756         radeon_ttm_backend_unbind(bdev, ttm);
 757 }
 758
 759 static void radeon_ttm_tt_destroy(struct ttm_bo_device *bdev,
 760                                   struct ttm_tt *ttm)
 761 {
 762 #if IS_ENABLED(CONFIG_AGP)
 763         struct radeon_device *rdev = radeon_get_rdev(bdev);
 764
 765         if (rdev->flags & RADEON_IS_AGP) {
 766                 ttm_agp_unbind(ttm);
 767                 ttm_tt_destroy_common(bdev, ttm);
 768                 ttm_agp_destroy(ttm);
 769                 return;
 770         }
 771 #endif
 772         radeon_ttm_backend_destroy(bdev, ttm);
 773 }
 774
 775 bool radeon_ttm_tt_has_userptr(struct radeon_device *rdev,
 776                                struct ttm_tt *ttm)
 777 {
 778         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 779
 780         if (gtt == NULL)
 781                 return false;
 782
 783         return !!gtt->userptr;
 784 }
 785
 786 bool radeon_ttm_tt_is_readonly(struct radeon_device *rdev,
 787                                struct ttm_tt *ttm)
 788 {
 789         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(rdev, ttm);
 790
 791         if (gtt == NULL)
 792                 return false;
 793
 794         return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 795 }
 796
 797 static struct ttm_bo_driver radeon_bo_driver = {
 798         .ttm_tt_create = &radeon_ttm_tt_create,
 799         .ttm_tt_populate = &radeon_ttm_tt_populate,
 800         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 801         .ttm_tt_bind = &radeon_ttm_tt_bind,
 802         .ttm_tt_unbind = &radeon_ttm_tt_unbind,
 803         .ttm_tt_destroy = &radeon_ttm_tt_destroy,
 804         .eviction_valuable = ttm_bo_eviction_valuable,
 805         .evict_flags = &radeon_evict_flags,
 806         .move = &radeon_bo_move,
 807         .verify_access = &radeon_verify_access,
 808         .move_notify = &radeon_bo_move_notify,
 809         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 810         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 811 };
 812
 813 int radeon_ttm_init(struct radeon_device *rdev)
 814 {
 815         int r;
 816
 817         /* No others user of address space so set it to 0 */
 818         r = ttm_bo_device_init(&rdev->mman.bdev,
 819                                &radeon_bo_driver,
 820                                rdev->ddev->anon_inode->i_mapping,
 821                                rdev->ddev->vma_offset_manager,
 822                                dma_addressing_limited(&rdev->pdev->dev));
 823         if (r) {
 824                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 825                 return r;
 826         }
 827         rdev->mman.initialized = true;
 828
 829         r = radeon_ttm_init_vram(rdev);
 830         if (r) {
 831                 DRM_ERROR("Failed initializing VRAM heap.\n");
 832                 return r;
 833         }
 834         /* Change the size here instead of the init above so only lpfn is affected */
 835         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
 836
 837         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 838                              RADEON_GEM_DOMAIN_VRAM, 0, NULL,
 839                              NULL, &rdev->stolen_vga_memory);
 840         if (r) {
 841                 return r;
 842         }
 843         r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 844         if (r)
 845                 return r;
 846         r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 847         radeon_bo_unreserve(rdev->stolen_vga_memory);
 848         if (r) {
 849                 radeon_bo_unref(&rdev->stolen_vga_memory);
 850                 return r;
 851         }
 852         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 853                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
 854
 855         r = radeon_ttm_init_gtt(rdev);
 856         if (r) {
 857                 DRM_ERROR("Failed initializing GTT heap.\n");
 858                 return r;
 859         }
 860         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 861                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 862
 863         r = radeon_ttm_debugfs_init(rdev);
 864         if (r) {
 865                 DRM_ERROR("Failed to init debugfs\n");
 866                 return r;
 867         }
 868         return 0;
 869 }
 870
 871 void radeon_ttm_fini(struct radeon_device *rdev)
 872 {
 873         int r;
 874
 875         if (!rdev->mman.initialized)
 876                 return;
 877         radeon_ttm_debugfs_fini(rdev);
 878         if (rdev->stolen_vga_memory) {
 879                 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 880                 if (r == 0) {
 881                         radeon_bo_unpin(rdev->stolen_vga_memory);
 882                         radeon_bo_unreserve(rdev->stolen_vga_memory);
 883                 }
 884                 radeon_bo_unref(&rdev->stolen_vga_memory);
 885         }
 886         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
 887         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
 888         ttm_bo_device_release(&rdev->mman.bdev);
 889         radeon_gart_fini(rdev);
 890         rdev->mman.initialized = false;
 891         DRM_INFO("radeon: ttm finalized\n");
 892 }
 893
 894 /* this should only be called at bootup or when userspace
 895  * isn't running */
 896 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 897 {
 898         struct ttm_resource_manager *man;
 899
 900         if (!rdev->mman.initialized)
 901                 return;
 902
 903         man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
 904         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 905         man->size = size >> PAGE_SHIFT;
 906 }
 907
 908 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
 909 {
 910         struct ttm_buffer_object *bo;
 911         struct radeon_device *rdev;
 912         vm_fault_t ret;
 913
 914         bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data;
 915         if (bo == NULL)
 916                 return VM_FAULT_NOPAGE;
 917
 918         rdev = radeon_get_rdev(bo->bdev);
 919         down_read(&rdev->pm.mclk_lock);
 920         ret = ttm_bo_vm_fault(vmf);
 921         up_read(&rdev->pm.mclk_lock);
 922         return ret;
 923 }
 924
 925 static struct vm_operations_struct radeon_ttm_vm_ops = {
 926         .fault = radeon_ttm_fault,
 927         .open = ttm_bo_vm_open,
 928         .close = ttm_bo_vm_close,
 929         .access = ttm_bo_vm_access
 930 };
 931
 932 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 933 {
 934         int r;
 935         struct drm_file *file_priv = filp->private_data;
 936         struct radeon_device *rdev = file_priv->minor->dev->dev_private;
 937
 938         if (rdev == NULL)
 939                 return -EINVAL;
 940
 941         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 942         if (unlikely(r != 0))
 943                 return r;
 944
 945         vma->vm_ops = &radeon_ttm_vm_ops;
 946         return 0;
 947 }
 948
 949 #if defined(CONFIG_DEBUG_FS)
 950
 951 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 952 {
 953         struct drm_info_node *node = (struct drm_info_node *)m->private;
 954         unsigned ttm_pl = *(int*)node->info_ent->data;
 955         struct drm_device *dev = node->minor->dev;
 956         struct radeon_device *rdev = dev->dev_private;
 957         struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl);
 958         struct drm_printer p = drm_seq_file_printer(m);
 959
 960         man->func->debug(man, &p);
 961         return 0;
 962 }
 963
 964
 965 static int ttm_pl_vram = TTM_PL_VRAM;
 966 static int ttm_pl_tt = TTM_PL_TT;
 967
 968 static struct drm_info_list radeon_ttm_debugfs_list[] = {
 969         {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
 970         {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
 971         {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
 972 #ifdef CONFIG_SWIOTLB
 973         {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
 974 #endif
 975 };
 976
 977 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
 978 {
 979         struct radeon_device *rdev = inode->i_private;
 980         i_size_write(inode, rdev->mc.mc_vram_size);
 981         filep->private_data = inode->i_private;
 982         return 0;
 983 }
 984
 985 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
 986                                     size_t size, loff_t *pos)
 987 {
 988         struct radeon_device *rdev = f->private_data;
 989         ssize_t result = 0;
 990         int r;
 991
 992         if (size & 0x3 || *pos & 0x3)
 993                 return -EINVAL;
 994
 995         while (size) {
 996                 unsigned long flags;
 997                 uint32_t value;
 998
 999                 if (*pos >= rdev->mc.mc_vram_size)
1000                         return result;
1001
1002                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
1003                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
1004                 if (rdev->family >= CHIP_CEDAR)
1005                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
1006                 value = RREG32(RADEON_MM_DATA);
1007                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
1008
1009                 r = put_user(value, (uint32_t *)buf);
1010                 if (r)
1011                         return r;
1012
1013                 result += 4;
1014                 buf += 4;
1015                 *pos += 4;
1016                 size -= 4;
1017         }
1018
1019         return result;
1020 }
1021
1022 static const struct file_operations radeon_ttm_vram_fops = {
1023         .owner = THIS_MODULE,
1024         .open = radeon_ttm_vram_open,
1025         .read = radeon_ttm_vram_read,
1026         .llseek = default_llseek
1027 };
1028
1029 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
1030 {
1031         struct radeon_device *rdev = inode->i_private;
1032         i_size_write(inode, rdev->mc.gtt_size);
1033         filep->private_data = inode->i_private;
1034         return 0;
1035 }
1036
1037 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
1038                                    size_t size, loff_t *pos)
1039 {
1040         struct radeon_device *rdev = f->private_data;
1041         ssize_t result = 0;
1042         int r;
1043
1044         while (size) {
1045                 loff_t p = *pos / PAGE_SIZE;
1046                 unsigned off = *pos & ~PAGE_MASK;
1047                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
1048                 struct page *page;
1049                 void *ptr;
1050
1051                 if (p >= rdev->gart.num_cpu_pages)
1052                         return result;
1053
1054                 page = rdev->gart.pages[p];
1055                 if (page) {
1056                         ptr = kmap(page);
1057                         ptr += off;
1058
1059                         r = copy_to_user(buf, ptr, cur_size);
1060                         kunmap(rdev->gart.pages[p]);
1061                 } else
1062                         r = clear_user(buf, cur_size);
1063
1064                 if (r)
1065                         return -EFAULT;
1066
1067                 result += cur_size;
1068                 buf += cur_size;
1069                 *pos += cur_size;
1070                 size -= cur_size;
1071         }
1072
1073         return result;
1074 }
1075
1076 static const struct file_operations radeon_ttm_gtt_fops = {
1077         .owner = THIS_MODULE,
1078         .open = radeon_ttm_gtt_open,
1079         .read = radeon_ttm_gtt_read,
1080         .llseek = default_llseek
1081 };
1082
1083 #endif
1084
1085 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1086 {
1087 #if defined(CONFIG_DEBUG_FS)
1088         unsigned count;
1089
1090         struct drm_minor *minor = rdev->ddev->primary;
1091         struct dentry *root = minor->debugfs_root;
1092
1093         rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1094                                               root, rdev,
1095                                               &radeon_ttm_vram_fops);
1096
1097         rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1098                                              root, rdev, &radeon_ttm_gtt_fops);
1099
1100         count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1101
1102 #ifdef CONFIG_SWIOTLB
1103         if (!(rdev->need_swiotlb && swiotlb_nr_tbl()))
1104                 --count;
1105 #endif
1106
1107         return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1108 #else
1109
1110         return 0;
1111 #endif
1112 }
1113
1114 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1115 {
1116 #if defined(CONFIG_DEBUG_FS)
1117
1118         debugfs_remove(rdev->mman.vram);
1119         rdev->mman.vram = NULL;
1120
1121         debugfs_remove(rdev->mman.gtt);
1122         rdev->mman.gtt = NULL;
1123 #endif
1124 }