2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include <drm/drm_encoder.h>
36 #include <drm/drm_dp_helper.h>
37 #include <drm/drm_dp_mst_helper.h>
38 #include <drm/drm_fixed.h>
39 #include <drm/drm_crtc_helper.h>
40 #include <linux/i2c.h>
41 #include <linux/i2c-algo-bit.h>
46 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
47 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
48 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
49 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
51 #define RADEON_MAX_HPD_PINS 7
52 #define RADEON_MAX_CRTCS 6
53 #define RADEON_MAX_AFMT_BLOCKS 7
55 enum radeon_rmx_type {
74 enum radeon_underscan_type {
87 RADEON_HPD_NONE = 0xff,
90 enum radeon_output_csc {
91 RADEON_OUTPUT_CSC_BYPASS = 0,
92 RADEON_OUTPUT_CSC_TVRGB = 1,
93 RADEON_OUTPUT_CSC_YCBCR601 = 2,
94 RADEON_OUTPUT_CSC_YCBCR709 = 3,
97 #define RADEON_MAX_I2C_BUS 16
99 /* radeon gpio-based i2c
100 * 1. "mask" reg and bits
101 * grabs the gpio pins for software use
103 * 2. "a" reg and bits
106 * 3. "en" reg and bits
107 * sets the pin direction
109 * 4. "y" reg and bits
113 struct radeon_i2c_bus_rec {
115 /* id used by atom */
117 /* id used by atom */
118 enum radeon_hpd_id hpd;
119 /* can be used with hw i2c engine */
121 /* uses multi-media i2c engine */
124 uint32_t mask_clk_reg;
125 uint32_t mask_data_reg;
129 uint32_t en_data_reg;
132 uint32_t mask_clk_mask;
133 uint32_t mask_data_mask;
135 uint32_t a_data_mask;
136 uint32_t en_clk_mask;
137 uint32_t en_data_mask;
139 uint32_t y_data_mask;
142 struct radeon_tmds_pll {
147 #define RADEON_MAX_BIOS_CONNECTOR 16
150 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
151 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
152 #define RADEON_PLL_USE_REF_DIV (1 << 2)
153 #define RADEON_PLL_LEGACY (1 << 3)
154 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
155 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
156 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
157 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
158 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
159 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
160 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
161 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
162 #define RADEON_PLL_USE_POST_DIV (1 << 12)
163 #define RADEON_PLL_IS_LCD (1 << 13)
164 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
167 /* reference frequency */
168 uint32_t reference_freq;
171 uint32_t reference_div;
174 /* pll in/out limits */
177 uint32_t pll_out_min;
178 uint32_t pll_out_max;
179 uint32_t lcd_pll_out_min;
180 uint32_t lcd_pll_out_max;
184 uint32_t min_ref_div;
185 uint32_t max_ref_div;
186 uint32_t min_post_div;
187 uint32_t max_post_div;
188 uint32_t min_feedback_div;
189 uint32_t max_feedback_div;
190 uint32_t min_frac_feedback_div;
191 uint32_t max_frac_feedback_div;
193 /* flags for the current clock */
200 struct radeon_i2c_chan {
201 struct i2c_adapter adapter;
202 struct drm_device *dev;
203 struct i2c_algo_bit_data bit;
204 struct radeon_i2c_bus_rec rec;
205 struct drm_dp_aux aux;
210 /* mostly for macs, but really any system without connector tables */
211 enum radeon_connector_table {
215 CT_POWERBOOK_EXTERNAL,
216 CT_POWERBOOK_INTERNAL,
229 enum radeon_dvo_chip {
239 bool last_buffer_filled_status;
243 struct radeon_mode_info {
244 struct atom_context *atom_context;
245 struct card_info *atom_card_info;
246 enum radeon_connector_table connector_table;
247 bool mode_config_initialized;
248 struct radeon_crtc *crtcs[RADEON_MAX_CRTCS];
249 struct radeon_afmt *afmt[RADEON_MAX_AFMT_BLOCKS];
250 /* DVI-I properties */
251 struct drm_property *coherent_mode_property;
252 /* DAC enable load detect */
253 struct drm_property *load_detect_property;
255 struct drm_property *tv_std_property;
256 /* legacy TMDS PLL detect */
257 struct drm_property *tmds_pll_property;
259 struct drm_property *underscan_property;
260 struct drm_property *underscan_hborder_property;
261 struct drm_property *underscan_vborder_property;
263 struct drm_property *audio_property;
265 struct drm_property *dither_property;
267 struct drm_property *output_csc_property;
268 /* hardcoded DFP edid from BIOS */
269 struct edid *bios_hardcoded_edid;
270 int bios_hardcoded_edid_size;
272 /* pointer to fbdev info structure */
273 struct radeon_fbdev *rfbdev;
276 /* pointer to backlight encoder */
277 struct radeon_encoder *bl_encoder;
279 /* bitmask for active encoder frontends */
280 uint32_t active_encoders;
283 #define RADEON_MAX_BL_LEVEL 0xFF
285 #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
287 struct radeon_backlight_privdata {
288 struct radeon_encoder *encoder;
294 #define MAX_H_CODE_TIMING_LEN 32
295 #define MAX_V_CODE_TIMING_LEN 32
297 /* need to store these as reading
298 back code tables is excessive */
299 struct radeon_tv_regs {
301 uint32_t timing_cntl;
305 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
306 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
309 struct radeon_atom_ss {
311 uint16_t percentage_divider;
322 enum radeon_flip_status {
325 RADEON_FLIP_SUBMITTED
329 struct drm_crtc base;
331 u16 lut_r[256], lut_g[256], lut_b[256];
334 bool cursor_out_of_bounds;
335 uint32_t crtc_offset;
336 struct drm_gem_object *cursor_bo;
337 uint64_t cursor_addr;
344 int max_cursor_width;
345 int max_cursor_height;
346 uint32_t legacy_display_base_addr;
347 enum radeon_rmx_type rmx_type;
352 struct drm_display_mode native_mode;
355 struct workqueue_struct *flip_queue;
356 struct radeon_flip_work *flip_work;
357 enum radeon_flip_status flip_status;
359 struct radeon_atom_ss ss;
363 u32 pll_reference_div;
366 struct drm_encoder *encoder;
367 struct drm_connector *connector;
372 u32 lb_vblank_lead_lines;
373 struct drm_display_mode hw_mode;
374 enum radeon_output_csc output_csc;
377 struct radeon_encoder_primary_dac {
378 /* legacy primary dac */
379 uint32_t ps2_pdac_adj;
382 struct radeon_encoder_lvds {
384 uint16_t panel_vcc_delay;
385 uint8_t panel_pwr_delay;
386 uint8_t panel_digon_delay;
387 uint8_t panel_blon_delay;
388 uint16_t panel_ref_divider;
389 uint8_t panel_post_divider;
390 uint16_t panel_fb_divider;
391 bool use_bios_dividers;
392 uint32_t lvds_gen_cntl;
394 struct drm_display_mode native_mode;
395 struct backlight_device *bl_dev;
397 uint8_t backlight_level;
400 struct radeon_encoder_tv_dac {
402 uint32_t ps2_tvdac_adj;
403 uint32_t ntsc_tvdac_adj;
404 uint32_t pal_tvdac_adj;
409 int supported_tv_stds;
411 enum radeon_tv_std tv_std;
412 struct radeon_tv_regs tv;
415 struct radeon_encoder_int_tmds {
416 /* legacy int tmds */
417 struct radeon_tmds_pll tmds_pll[4];
420 struct radeon_encoder_ext_tmds {
422 struct radeon_i2c_chan *i2c_bus;
424 enum radeon_dvo_chip dvo_chip;
427 /* spread spectrum */
428 struct radeon_encoder_atom_dig {
432 int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
435 uint16_t panel_pwr_delay;
438 struct drm_display_mode native_mode;
439 struct backlight_device *bl_dev;
441 uint8_t backlight_level;
443 struct radeon_afmt *afmt;
444 struct r600_audio_pin *pin;
445 int active_mst_links;
448 struct radeon_encoder_atom_dac {
449 enum radeon_tv_std tv_std;
452 struct radeon_encoder_mst {
454 struct radeon_encoder *primary;
455 struct radeon_connector *connector;
456 struct drm_dp_mst_port *port;
463 struct radeon_encoder {
464 struct drm_encoder base;
465 uint32_t encoder_enum;
468 uint32_t active_device;
470 uint32_t pixel_clock;
471 enum radeon_rmx_type rmx_type;
472 enum radeon_underscan_type underscan_type;
473 uint32_t underscan_hborder;
474 uint32_t underscan_vborder;
475 struct drm_display_mode native_mode;
477 int audio_polling_active;
480 struct radeon_audio_funcs *audio;
481 enum radeon_output_csc output_csc;
485 /* front end for this mst encoder */
488 struct radeon_connector_atom_dig {
489 uint32_t igp_lane_info;
491 u8 dpcd[DP_RECEIVER_CAP_SIZE];
499 struct radeon_gpio_rec {
508 enum radeon_hpd_id hpd;
510 struct radeon_gpio_rec gpio;
513 struct radeon_router {
515 struct radeon_i2c_bus_rec i2c_info;
520 u8 ddc_mux_control_pin;
525 u8 cd_mux_control_pin;
529 enum radeon_connector_audio {
530 RADEON_AUDIO_DISABLE = 0,
531 RADEON_AUDIO_ENABLE = 1,
532 RADEON_AUDIO_AUTO = 2
535 enum radeon_connector_dither {
536 RADEON_FMT_DITHER_DISABLE = 0,
537 RADEON_FMT_DITHER_ENABLE = 1,
540 struct stream_attribs {
545 struct radeon_connector {
546 struct drm_connector base;
547 uint32_t connector_id;
549 struct radeon_i2c_chan *ddc_bus;
550 /* some systems have an hdmi and vga port with a shared ddc line */
553 /* we need to mind the EDID between detect
554 and get modes due to analog/digital/tvencoder */
557 bool dac_load_detect;
558 bool detected_by_load; /* if the connection status was determined by load */
559 bool detected_hpd_without_ddc; /* if an HPD signal was detected on DVI, but ddc probing failed */
560 uint16_t connector_object_id;
561 struct radeon_hpd hpd;
562 struct radeon_router router;
563 struct radeon_i2c_chan *router_bus;
564 enum radeon_connector_audio audio;
565 enum radeon_connector_dither dither;
566 int pixelclock_for_modeset;
567 bool is_mst_connector;
568 struct radeon_connector *mst_port;
569 struct drm_dp_mst_port *port;
570 struct drm_dp_mst_topology_mgr mst_mgr;
572 struct radeon_encoder *mst_encoder;
573 struct stream_attribs cur_stream_attribs[6];
577 struct radeon_framebuffer {
578 struct drm_framebuffer base;
579 struct drm_gem_object *obj;
582 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
583 ((em) == ATOM_ENCODER_MODE_DP_MST))
585 struct atom_clock_dividers {
591 u32 whole_fb_div : 12;
592 u32 frac_fb_div : 14;
594 u32 frac_fb_div : 14;
595 u32 whole_fb_div : 12;
602 bool enable_post_div;
611 struct atom_mpll_param {
635 #define MEM_TYPE_GDDR5 0x50
636 #define MEM_TYPE_GDDR4 0x40
637 #define MEM_TYPE_GDDR3 0x30
638 #define MEM_TYPE_DDR2 0x20
639 #define MEM_TYPE_GDDR1 0x10
640 #define MEM_TYPE_DDR3 0xb0
641 #define MEM_TYPE_MASK 0xf0
643 struct atom_memory_info {
648 #define MAX_AC_TIMING_ENTRIES 16
650 struct atom_memory_clock_range_table
654 u32 mclk[MAX_AC_TIMING_ENTRIES];
657 #define VBIOS_MC_REGISTER_ARRAY_SIZE 32
658 #define VBIOS_MAX_AC_TIMING_ENTRIES 20
660 struct atom_mc_reg_entry {
662 u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE];
665 struct atom_mc_register_address {
670 struct atom_mc_reg_table {
673 struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
674 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];
677 #define MAX_VOLTAGE_ENTRIES 32
679 struct atom_voltage_table_entry
685 struct atom_voltage_table
690 struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES];
693 /* Driver internal use only flags of radeon_get_crtc_scanoutpos() */
694 #define DRM_SCANOUTPOS_VALID (1 << 0)
695 #define DRM_SCANOUTPOS_IN_VBLANK (1 << 1)
696 #define DRM_SCANOUTPOS_ACCURATE (1 << 2)
697 #define USE_REAL_VBLANKSTART (1 << 30)
698 #define GET_DISTANCE_TO_VBLANKSTART (1 << 31)
701 radeon_add_atom_connector(struct drm_device *dev,
702 uint32_t connector_id,
703 uint32_t supported_device,
705 struct radeon_i2c_bus_rec *i2c_bus,
706 uint32_t igp_lane_info,
707 uint16_t connector_object_id,
708 struct radeon_hpd *hpd,
709 struct radeon_router *router);
711 radeon_add_legacy_connector(struct drm_device *dev,
712 uint32_t connector_id,
713 uint32_t supported_device,
715 struct radeon_i2c_bus_rec *i2c_bus,
716 uint16_t connector_object_id,
717 struct radeon_hpd *hpd);
719 radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device,
721 extern void radeon_link_encoder_connector(struct drm_device *dev);
723 extern enum radeon_tv_std
724 radeon_combios_get_tv_info(struct radeon_device *rdev);
725 extern enum radeon_tv_std
726 radeon_atombios_get_tv_info(struct radeon_device *rdev);
727 extern void radeon_atombios_get_default_voltages(struct radeon_device *rdev,
728 u16 *vddc, u16 *vddci, u16 *mvdd);
731 radeon_combios_connected_scratch_regs(struct drm_connector *connector,
732 struct drm_encoder *encoder,
735 radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
736 struct drm_encoder *encoder,
739 extern struct drm_connector *
740 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
741 extern struct drm_connector *
742 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
743 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
746 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
747 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
748 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
749 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
751 extern struct edid *radeon_connector_edid(struct drm_connector *connector);
753 extern void radeon_connector_hotplug(struct drm_connector *connector);
754 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
755 struct drm_display_mode *mode);
756 extern void radeon_dp_set_link_config(struct drm_connector *connector,
757 const struct drm_display_mode *mode);
758 extern void radeon_dp_link_train(struct drm_encoder *encoder,
759 struct drm_connector *connector);
760 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
761 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
762 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
763 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
764 struct drm_connector *connector);
765 extern void radeon_dp_set_rx_power_state(struct drm_connector *connector,
767 extern void radeon_dp_aux_init(struct radeon_connector *radeon_connector);
769 radeon_dp_aux_transfer_native(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg);
771 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
772 extern void atombios_dig_encoder_setup2(struct drm_encoder *encoder, int action, int panel_mode, int enc_override);
773 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
774 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
775 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
776 int action, uint8_t lane_num,
778 extern void atombios_dig_transmitter_setup2(struct drm_encoder *encoder,
779 int action, uint8_t lane_num,
780 uint8_t lane_set, int fe);
781 extern void atombios_set_mst_encoder_crtc_source(struct drm_encoder *encoder,
783 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
784 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
785 void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
787 extern void radeon_i2c_init(struct radeon_device *rdev);
788 extern void radeon_i2c_fini(struct radeon_device *rdev);
789 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
790 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
791 extern void radeon_i2c_add(struct radeon_device *rdev,
792 struct radeon_i2c_bus_rec *rec,
794 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
795 struct radeon_i2c_bus_rec *i2c_bus);
796 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
797 struct radeon_i2c_bus_rec *rec,
799 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
800 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
804 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
808 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
809 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
810 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector, bool use_aux);
812 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
813 struct radeon_atom_ss *ss,
815 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
816 struct radeon_atom_ss *ss,
818 extern struct radeon_gpio_rec radeon_atombios_lookup_gpio(struct radeon_device *rdev,
821 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
823 uint32_t *dot_clock_p,
825 uint32_t *frac_fb_div_p,
827 uint32_t *post_div_p);
829 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
837 extern void radeon_setup_encoder_clones(struct drm_device *dev);
839 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
840 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
841 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
842 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
843 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
844 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
845 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
846 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
847 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
848 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
849 extern bool radeon_encoder_is_digital(struct drm_encoder *encoder);
851 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
852 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
853 struct drm_framebuffer *old_fb);
854 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
855 struct drm_framebuffer *fb,
857 enum mode_set_atomic state);
858 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
859 struct drm_display_mode *mode,
860 struct drm_display_mode *adjusted_mode,
862 struct drm_framebuffer *old_fb);
863 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
865 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
866 struct drm_framebuffer *old_fb);
867 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
868 struct drm_framebuffer *fb,
870 enum mode_set_atomic state);
871 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
872 struct drm_framebuffer *fb,
873 int x, int y, int atomic);
874 extern int radeon_crtc_cursor_set2(struct drm_crtc *crtc,
875 struct drm_file *file_priv,
881 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
883 extern void radeon_cursor_reset(struct drm_crtc *crtc);
885 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int pipe,
886 unsigned int flags, int *vpos, int *hpos,
887 ktime_t *stime, ktime_t *etime,
888 const struct drm_display_mode *mode);
890 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
892 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
893 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
894 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
895 extern struct radeon_encoder_atom_dig *
896 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
897 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
898 struct radeon_encoder_int_tmds *tmds);
899 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
900 struct radeon_encoder_int_tmds *tmds);
901 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
902 struct radeon_encoder_int_tmds *tmds);
903 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
904 struct radeon_encoder_ext_tmds *tmds);
905 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
906 struct radeon_encoder_ext_tmds *tmds);
907 extern struct radeon_encoder_primary_dac *
908 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
909 extern struct radeon_encoder_tv_dac *
910 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
911 extern struct radeon_encoder_lvds *
912 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
913 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
914 extern struct radeon_encoder_tv_dac *
915 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
916 extern struct radeon_encoder_primary_dac *
917 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
918 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
919 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
920 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
921 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
922 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
923 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
924 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
925 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
927 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
929 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
931 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
933 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
934 int radeon_framebuffer_init(struct drm_device *dev,
935 struct radeon_framebuffer *rfb,
936 const struct drm_mode_fb_cmd2 *mode_cmd,
937 struct drm_gem_object *obj);
939 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
940 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
941 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
942 void radeon_atombios_init_crtc(struct drm_device *dev,
943 struct radeon_crtc *radeon_crtc);
944 void radeon_legacy_init_crtc(struct drm_device *dev,
945 struct radeon_crtc *radeon_crtc);
947 void radeon_get_clock_info(struct drm_device *dev);
949 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
950 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
952 void radeon_enc_destroy(struct drm_encoder *encoder);
953 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
954 void radeon_combios_asic_init(struct drm_device *dev);
955 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
956 const struct drm_display_mode *mode,
957 struct drm_display_mode *adjusted_mode);
958 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
959 struct drm_display_mode *adjusted_mode);
960 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
963 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
964 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
965 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
966 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
967 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
968 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
969 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
970 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
971 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
972 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
973 struct drm_display_mode *mode,
974 struct drm_display_mode *adjusted_mode);
977 void avivo_program_fmt(struct drm_encoder *encoder);
978 void dce3_program_fmt(struct drm_encoder *encoder);
979 void dce4_program_fmt(struct drm_encoder *encoder);
980 void dce8_program_fmt(struct drm_encoder *encoder);
983 int radeon_fbdev_init(struct radeon_device *rdev);
984 void radeon_fbdev_fini(struct radeon_device *rdev);
985 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
986 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
987 void radeon_fbdev_restore_mode(struct radeon_device *rdev);
989 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
991 void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id);
993 void radeon_fb_add_connector(struct radeon_device *rdev, struct drm_connector *connector);
994 void radeon_fb_remove_connector(struct radeon_device *rdev, struct drm_connector *connector);
996 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
998 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
1001 int radeon_dp_mst_init(struct radeon_connector *radeon_connector);
1002 int radeon_dp_mst_probe(struct radeon_connector *radeon_connector);
1003 int radeon_dp_mst_check_status(struct radeon_connector *radeon_connector);
1004 int radeon_mst_debugfs_init(struct radeon_device *rdev);
1005 void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode);
1007 void radeon_setup_mst_connector(struct drm_device *dev);
1009 int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder, int fe_idx);
1010 void radeon_atom_release_dig_encoder(struct radeon_device *rdev, int enc_idx);