2 * Copyright 2008 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Author: Stanislaw Skowronek
25 #include <linux/module.h>
26 #include <linux/sched.h>
27 #include <linux/slab.h>
29 #include <asm/unaligned.h>
31 #include <drm/drm_device.h>
32 #include <drm/drm_util.h>
37 #include "atom-names.h"
38 #include "atom-bits.h"
41 #define ATOM_COND_ABOVE 0
42 #define ATOM_COND_ABOVEOREQUAL 1
43 #define ATOM_COND_ALWAYS 2
44 #define ATOM_COND_BELOW 3
45 #define ATOM_COND_BELOWOREQUAL 4
46 #define ATOM_COND_EQUAL 5
47 #define ATOM_COND_NOTEQUAL 6
49 #define ATOM_PORT_ATI 0
50 #define ATOM_PORT_PCI 1
51 #define ATOM_PORT_SYSIO 2
53 #define ATOM_UNIT_MICROSEC 0
54 #define ATOM_UNIT_MILLISEC 1
60 struct atom_context *ctx;
65 unsigned long last_jump_jiffies;
70 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
71 int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
73 static uint32_t atom_arg_mask[8] = {
74 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
75 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
77 static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
79 static int atom_dst_to_src[8][4] = {
80 /* translate destination alignment field to the source alignment encoding */
90 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
92 static int debug_depth = 0;
94 static void debug_print_spaces(int n)
100 #define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
101 #define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
103 #define DEBUG(...) do { } while (0)
104 #define SDEBUG(...) do { } while (0)
107 static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
108 uint32_t index, uint32_t data)
110 struct radeon_device *rdev = ctx->card->dev->dev_private;
111 uint32_t temp = 0xCDCDCDCD;
119 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
123 if (rdev->family == CHIP_RV515)
124 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
125 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
130 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
136 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
140 case ATOM_IIO_MOVE_INDEX:
142 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
145 ((index >> CU8(base + 2)) &
146 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
150 case ATOM_IIO_MOVE_DATA:
152 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
155 ((data >> CU8(base + 2)) &
156 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
160 case ATOM_IIO_MOVE_ATTR:
162 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
166 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
177 pr_info("Unknown IIO opcode\n");
182 static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
183 int *ptr, uint32_t *saved, int print)
185 uint32_t idx, val = 0xCDCDCDCD, align, arg;
186 struct atom_context *gctx = ctx->ctx;
188 align = (attr >> 3) & 7;
194 DEBUG("REG[0x%04X]", idx);
195 idx += gctx->reg_block;
196 switch (gctx->io_mode) {
198 val = gctx->card->reg_read(gctx->card, idx);
201 pr_info("PCI registers are not implemented\n");
204 pr_info("SYSIO registers are not implemented\n");
207 if (!(gctx->io_mode & 0x80)) {
208 pr_info("Bad IO mode\n");
211 if (!gctx->iio[gctx->io_mode & 0x7F]) {
212 pr_info("Undefined indirect IO read method %d\n",
213 gctx->io_mode & 0x7F);
217 atom_iio_execute(gctx,
218 gctx->iio[gctx->io_mode & 0x7F],
225 /* get_unaligned_le32 avoids unaligned accesses from atombios
226 * tables, noticed on a DEC Alpha. */
227 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
229 DEBUG("PS[0x%02X,0x%04X]", idx, val);
235 DEBUG("WS[0x%02X]", idx);
237 case ATOM_WS_QUOTIENT:
238 val = gctx->divmul[0];
240 case ATOM_WS_REMAINDER:
241 val = gctx->divmul[1];
243 case ATOM_WS_DATAPTR:
244 val = gctx->data_block;
249 case ATOM_WS_OR_MASK:
250 val = 1 << gctx->shift;
252 case ATOM_WS_AND_MASK:
253 val = ~(1 << gctx->shift);
255 case ATOM_WS_FB_WINDOW:
258 case ATOM_WS_ATTRIBUTES:
262 val = gctx->reg_block;
272 if (gctx->data_block)
273 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
275 DEBUG("ID[0x%04X]", idx);
277 val = U32(idx + gctx->data_block);
282 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
283 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
284 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
287 val = gctx->scratch[(gctx->fb_base / 4) + idx];
289 DEBUG("FB[0x%02X]", idx);
297 DEBUG("IMM 0x%08X\n", val);
301 case ATOM_SRC_WORD16:
305 DEBUG("IMM 0x%04X\n", val);
309 case ATOM_SRC_BYTE16:
310 case ATOM_SRC_BYTE24:
314 DEBUG("IMM 0x%02X\n", val);
322 DEBUG("PLL[0x%02X]", idx);
323 val = gctx->card->pll_read(gctx->card, idx);
329 DEBUG("MC[0x%02X]", idx);
330 val = gctx->card->mc_read(gctx->card, idx);
335 val &= atom_arg_mask[align];
336 val >>= atom_arg_shift[align];
340 DEBUG(".[31:0] -> 0x%08X\n", val);
343 DEBUG(".[15:0] -> 0x%04X\n", val);
346 DEBUG(".[23:8] -> 0x%04X\n", val);
348 case ATOM_SRC_WORD16:
349 DEBUG(".[31:16] -> 0x%04X\n", val);
352 DEBUG(".[7:0] -> 0x%02X\n", val);
355 DEBUG(".[15:8] -> 0x%02X\n", val);
357 case ATOM_SRC_BYTE16:
358 DEBUG(".[23:16] -> 0x%02X\n", val);
360 case ATOM_SRC_BYTE24:
361 DEBUG(".[31:24] -> 0x%02X\n", val);
367 static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
369 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
389 case ATOM_SRC_WORD16:
394 case ATOM_SRC_BYTE16:
395 case ATOM_SRC_BYTE24:
403 static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
405 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
408 static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
410 uint32_t val = 0xCDCDCDCD;
419 case ATOM_SRC_WORD16:
425 case ATOM_SRC_BYTE16:
426 case ATOM_SRC_BYTE24:
434 static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
435 int *ptr, uint32_t *saved, int print)
437 return atom_get_src_int(ctx,
438 arg | atom_dst_to_src[(attr >> 3) &
439 7][(attr >> 6) & 3] << 3,
443 static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
445 atom_skip_src_int(ctx,
446 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
450 static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
451 int *ptr, uint32_t val, uint32_t saved)
454 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
456 struct atom_context *gctx = ctx->ctx;
457 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
458 val <<= atom_arg_shift[align];
459 val &= atom_arg_mask[align];
460 saved &= ~atom_arg_mask[align];
466 DEBUG("REG[0x%04X]", idx);
467 idx += gctx->reg_block;
468 switch (gctx->io_mode) {
471 gctx->card->reg_write(gctx->card, idx,
474 gctx->card->reg_write(gctx->card, idx, val);
477 pr_info("PCI registers are not implemented\n");
480 pr_info("SYSIO registers are not implemented\n");
483 if (!(gctx->io_mode & 0x80)) {
484 pr_info("Bad IO mode\n");
487 if (!gctx->iio[gctx->io_mode & 0xFF]) {
488 pr_info("Undefined indirect IO write method %d\n",
489 gctx->io_mode & 0x7F);
492 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
499 DEBUG("PS[0x%02X]", idx);
500 ctx->ps[idx] = cpu_to_le32(val);
505 DEBUG("WS[0x%02X]", idx);
507 case ATOM_WS_QUOTIENT:
508 gctx->divmul[0] = val;
510 case ATOM_WS_REMAINDER:
511 gctx->divmul[1] = val;
513 case ATOM_WS_DATAPTR:
514 gctx->data_block = val;
519 case ATOM_WS_OR_MASK:
520 case ATOM_WS_AND_MASK:
522 case ATOM_WS_FB_WINDOW:
525 case ATOM_WS_ATTRIBUTES:
529 gctx->reg_block = val;
538 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
539 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
540 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
542 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
543 DEBUG("FB[0x%02X]", idx);
548 DEBUG("PLL[0x%02X]", idx);
549 gctx->card->pll_write(gctx->card, idx, val);
554 DEBUG("MC[0x%02X]", idx);
555 gctx->card->mc_write(gctx->card, idx, val);
560 DEBUG(".[31:0] <- 0x%08X\n", old_val);
563 DEBUG(".[15:0] <- 0x%04X\n", old_val);
566 DEBUG(".[23:8] <- 0x%04X\n", old_val);
568 case ATOM_SRC_WORD16:
569 DEBUG(".[31:16] <- 0x%04X\n", old_val);
572 DEBUG(".[7:0] <- 0x%02X\n", old_val);
575 DEBUG(".[15:8] <- 0x%02X\n", old_val);
577 case ATOM_SRC_BYTE16:
578 DEBUG(".[23:16] <- 0x%02X\n", old_val);
580 case ATOM_SRC_BYTE24:
581 DEBUG(".[31:24] <- 0x%02X\n", old_val);
586 static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
588 uint8_t attr = U8((*ptr)++);
589 uint32_t dst, src, saved;
592 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
594 src = atom_get_src(ctx, attr, ptr);
597 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
600 static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
602 uint8_t attr = U8((*ptr)++);
603 uint32_t dst, src, saved;
606 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
608 src = atom_get_src(ctx, attr, ptr);
611 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
614 static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
616 printk("ATOM BIOS beeped!\n");
619 static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
621 int idx = U8((*ptr)++);
624 if (idx < ATOM_TABLE_NAMES_CNT)
625 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
627 SDEBUG(" table: %d\n", idx);
628 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
629 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
635 static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
637 uint8_t attr = U8((*ptr)++);
641 attr |= atom_def_dst[attr >> 3] << 6;
642 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
644 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
647 static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
649 uint8_t attr = U8((*ptr)++);
652 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
654 src = atom_get_src(ctx, attr, ptr);
655 ctx->ctx->cs_equal = (dst == src);
656 ctx->ctx->cs_above = (dst > src);
657 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
658 ctx->ctx->cs_above ? "GT" : "LE");
661 static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
663 unsigned count = U8((*ptr)++);
664 SDEBUG(" count: %d\n", count);
665 if (arg == ATOM_UNIT_MICROSEC)
667 else if (!drm_can_sleep())
673 static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
675 uint8_t attr = U8((*ptr)++);
678 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
680 src = atom_get_src(ctx, attr, ptr);
682 ctx->ctx->divmul[0] = dst / src;
683 ctx->ctx->divmul[1] = dst % src;
685 ctx->ctx->divmul[0] = 0;
686 ctx->ctx->divmul[1] = 0;
690 static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
692 /* functionally, a nop */
695 static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
697 int execute = 0, target = U16(*ptr);
698 unsigned long cjiffies;
702 case ATOM_COND_ABOVE:
703 execute = ctx->ctx->cs_above;
705 case ATOM_COND_ABOVEOREQUAL:
706 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
708 case ATOM_COND_ALWAYS:
711 case ATOM_COND_BELOW:
712 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
714 case ATOM_COND_BELOWOREQUAL:
715 execute = !ctx->ctx->cs_above;
717 case ATOM_COND_EQUAL:
718 execute = ctx->ctx->cs_equal;
720 case ATOM_COND_NOTEQUAL:
721 execute = !ctx->ctx->cs_equal;
724 if (arg != ATOM_COND_ALWAYS)
725 SDEBUG(" taken: %s\n", execute ? "yes" : "no");
726 SDEBUG(" target: 0x%04X\n", target);
728 if (ctx->last_jump == (ctx->start + target)) {
730 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
731 cjiffies -= ctx->last_jump_jiffies;
732 if ((jiffies_to_msecs(cjiffies) > 5000)) {
733 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
737 /* jiffies wrap around we will just wait a little longer */
738 ctx->last_jump_jiffies = jiffies;
741 ctx->last_jump = ctx->start + target;
742 ctx->last_jump_jiffies = jiffies;
744 *ptr = ctx->start + target;
748 static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
750 uint8_t attr = U8((*ptr)++);
751 uint32_t dst, mask, src, saved;
754 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
755 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
756 SDEBUG(" mask: 0x%08x", mask);
758 src = atom_get_src(ctx, attr, ptr);
762 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
765 static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
767 uint8_t attr = U8((*ptr)++);
770 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
771 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
773 atom_skip_dst(ctx, arg, attr, ptr);
777 src = atom_get_src(ctx, attr, ptr);
779 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
782 static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
784 uint8_t attr = U8((*ptr)++);
787 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
789 src = atom_get_src(ctx, attr, ptr);
790 ctx->ctx->divmul[0] = dst * src;
793 static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
798 static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
800 uint8_t attr = U8((*ptr)++);
801 uint32_t dst, src, saved;
804 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
806 src = atom_get_src(ctx, attr, ptr);
809 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
812 static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
814 uint8_t val = U8((*ptr)++);
815 SDEBUG("POST card output: 0x%02X\n", val);
818 static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
820 pr_info("unimplemented!\n");
823 static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
825 pr_info("unimplemented!\n");
828 static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
830 pr_info("unimplemented!\n");
833 static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
837 SDEBUG(" block: %d\n", idx);
839 ctx->ctx->data_block = 0;
841 ctx->ctx->data_block = ctx->start;
843 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
844 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
847 static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
849 uint8_t attr = U8((*ptr)++);
850 SDEBUG(" fb_base: ");
851 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
854 static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
860 if (port < ATOM_IO_NAMES_CNT)
861 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
863 SDEBUG(" port: %d\n", port);
865 ctx->ctx->io_mode = ATOM_IO_MM;
867 ctx->ctx->io_mode = ATOM_IO_IIO | port;
871 ctx->ctx->io_mode = ATOM_IO_PCI;
874 case ATOM_PORT_SYSIO:
875 ctx->ctx->io_mode = ATOM_IO_SYSIO;
881 static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
883 ctx->ctx->reg_block = U16(*ptr);
885 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
888 static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
890 uint8_t attr = U8((*ptr)++), shift;
894 attr |= atom_def_dst[attr >> 3] << 6;
896 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
897 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
898 SDEBUG(" shift: %d\n", shift);
901 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
904 static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
906 uint8_t attr = U8((*ptr)++), shift;
910 attr |= atom_def_dst[attr >> 3] << 6;
912 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
913 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
914 SDEBUG(" shift: %d\n", shift);
917 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
920 static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
922 uint8_t attr = U8((*ptr)++), shift;
925 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
927 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
928 /* op needs to full dst value */
930 shift = atom_get_src(ctx, attr, ptr);
931 SDEBUG(" shift: %d\n", shift);
933 dst &= atom_arg_mask[dst_align];
934 dst >>= atom_arg_shift[dst_align];
936 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
939 static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
941 uint8_t attr = U8((*ptr)++), shift;
944 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
946 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
947 /* op needs to full dst value */
949 shift = atom_get_src(ctx, attr, ptr);
950 SDEBUG(" shift: %d\n", shift);
952 dst &= atom_arg_mask[dst_align];
953 dst >>= atom_arg_shift[dst_align];
955 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
958 static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
960 uint8_t attr = U8((*ptr)++);
961 uint32_t dst, src, saved;
964 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
966 src = atom_get_src(ctx, attr, ptr);
969 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
972 static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
974 uint8_t attr = U8((*ptr)++);
975 uint32_t src, val, target;
977 src = atom_get_src(ctx, attr, ptr);
978 while (U16(*ptr) != ATOM_CASE_END)
979 if (U8(*ptr) == ATOM_CASE_MAGIC) {
983 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
987 SDEBUG(" target: %04X\n", target);
988 *ptr = ctx->start + target;
993 pr_info("Bad case\n");
999 static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
1001 uint8_t attr = U8((*ptr)++);
1004 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1006 src = atom_get_src(ctx, attr, ptr);
1007 ctx->ctx->cs_equal = ((dst & src) == 0);
1008 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1011 static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1013 uint8_t attr = U8((*ptr)++);
1014 uint32_t dst, src, saved;
1017 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1019 src = atom_get_src(ctx, attr, ptr);
1022 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1025 static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1027 pr_info("unimplemented!\n");
1031 void (*func) (atom_exec_context *, int *, int);
1033 } opcode_table[ATOM_OP_CNT] = {
1036 atom_op_move, ATOM_ARG_REG}, {
1037 atom_op_move, ATOM_ARG_PS}, {
1038 atom_op_move, ATOM_ARG_WS}, {
1039 atom_op_move, ATOM_ARG_FB}, {
1040 atom_op_move, ATOM_ARG_PLL}, {
1041 atom_op_move, ATOM_ARG_MC}, {
1042 atom_op_and, ATOM_ARG_REG}, {
1043 atom_op_and, ATOM_ARG_PS}, {
1044 atom_op_and, ATOM_ARG_WS}, {
1045 atom_op_and, ATOM_ARG_FB}, {
1046 atom_op_and, ATOM_ARG_PLL}, {
1047 atom_op_and, ATOM_ARG_MC}, {
1048 atom_op_or, ATOM_ARG_REG}, {
1049 atom_op_or, ATOM_ARG_PS}, {
1050 atom_op_or, ATOM_ARG_WS}, {
1051 atom_op_or, ATOM_ARG_FB}, {
1052 atom_op_or, ATOM_ARG_PLL}, {
1053 atom_op_or, ATOM_ARG_MC}, {
1054 atom_op_shift_left, ATOM_ARG_REG}, {
1055 atom_op_shift_left, ATOM_ARG_PS}, {
1056 atom_op_shift_left, ATOM_ARG_WS}, {
1057 atom_op_shift_left, ATOM_ARG_FB}, {
1058 atom_op_shift_left, ATOM_ARG_PLL}, {
1059 atom_op_shift_left, ATOM_ARG_MC}, {
1060 atom_op_shift_right, ATOM_ARG_REG}, {
1061 atom_op_shift_right, ATOM_ARG_PS}, {
1062 atom_op_shift_right, ATOM_ARG_WS}, {
1063 atom_op_shift_right, ATOM_ARG_FB}, {
1064 atom_op_shift_right, ATOM_ARG_PLL}, {
1065 atom_op_shift_right, ATOM_ARG_MC}, {
1066 atom_op_mul, ATOM_ARG_REG}, {
1067 atom_op_mul, ATOM_ARG_PS}, {
1068 atom_op_mul, ATOM_ARG_WS}, {
1069 atom_op_mul, ATOM_ARG_FB}, {
1070 atom_op_mul, ATOM_ARG_PLL}, {
1071 atom_op_mul, ATOM_ARG_MC}, {
1072 atom_op_div, ATOM_ARG_REG}, {
1073 atom_op_div, ATOM_ARG_PS}, {
1074 atom_op_div, ATOM_ARG_WS}, {
1075 atom_op_div, ATOM_ARG_FB}, {
1076 atom_op_div, ATOM_ARG_PLL}, {
1077 atom_op_div, ATOM_ARG_MC}, {
1078 atom_op_add, ATOM_ARG_REG}, {
1079 atom_op_add, ATOM_ARG_PS}, {
1080 atom_op_add, ATOM_ARG_WS}, {
1081 atom_op_add, ATOM_ARG_FB}, {
1082 atom_op_add, ATOM_ARG_PLL}, {
1083 atom_op_add, ATOM_ARG_MC}, {
1084 atom_op_sub, ATOM_ARG_REG}, {
1085 atom_op_sub, ATOM_ARG_PS}, {
1086 atom_op_sub, ATOM_ARG_WS}, {
1087 atom_op_sub, ATOM_ARG_FB}, {
1088 atom_op_sub, ATOM_ARG_PLL}, {
1089 atom_op_sub, ATOM_ARG_MC}, {
1090 atom_op_setport, ATOM_PORT_ATI}, {
1091 atom_op_setport, ATOM_PORT_PCI}, {
1092 atom_op_setport, ATOM_PORT_SYSIO}, {
1093 atom_op_setregblock, 0}, {
1094 atom_op_setfbbase, 0}, {
1095 atom_op_compare, ATOM_ARG_REG}, {
1096 atom_op_compare, ATOM_ARG_PS}, {
1097 atom_op_compare, ATOM_ARG_WS}, {
1098 atom_op_compare, ATOM_ARG_FB}, {
1099 atom_op_compare, ATOM_ARG_PLL}, {
1100 atom_op_compare, ATOM_ARG_MC}, {
1101 atom_op_switch, 0}, {
1102 atom_op_jump, ATOM_COND_ALWAYS}, {
1103 atom_op_jump, ATOM_COND_EQUAL}, {
1104 atom_op_jump, ATOM_COND_BELOW}, {
1105 atom_op_jump, ATOM_COND_ABOVE}, {
1106 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1107 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1108 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1109 atom_op_test, ATOM_ARG_REG}, {
1110 atom_op_test, ATOM_ARG_PS}, {
1111 atom_op_test, ATOM_ARG_WS}, {
1112 atom_op_test, ATOM_ARG_FB}, {
1113 atom_op_test, ATOM_ARG_PLL}, {
1114 atom_op_test, ATOM_ARG_MC}, {
1115 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1116 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1117 atom_op_calltable, 0}, {
1118 atom_op_repeat, 0}, {
1119 atom_op_clear, ATOM_ARG_REG}, {
1120 atom_op_clear, ATOM_ARG_PS}, {
1121 atom_op_clear, ATOM_ARG_WS}, {
1122 atom_op_clear, ATOM_ARG_FB}, {
1123 atom_op_clear, ATOM_ARG_PLL}, {
1124 atom_op_clear, ATOM_ARG_MC}, {
1127 atom_op_mask, ATOM_ARG_REG}, {
1128 atom_op_mask, ATOM_ARG_PS}, {
1129 atom_op_mask, ATOM_ARG_WS}, {
1130 atom_op_mask, ATOM_ARG_FB}, {
1131 atom_op_mask, ATOM_ARG_PLL}, {
1132 atom_op_mask, ATOM_ARG_MC}, {
1133 atom_op_postcard, 0}, {
1135 atom_op_savereg, 0}, {
1136 atom_op_restorereg, 0}, {
1137 atom_op_setdatablock, 0}, {
1138 atom_op_xor, ATOM_ARG_REG}, {
1139 atom_op_xor, ATOM_ARG_PS}, {
1140 atom_op_xor, ATOM_ARG_WS}, {
1141 atom_op_xor, ATOM_ARG_FB}, {
1142 atom_op_xor, ATOM_ARG_PLL}, {
1143 atom_op_xor, ATOM_ARG_MC}, {
1144 atom_op_shl, ATOM_ARG_REG}, {
1145 atom_op_shl, ATOM_ARG_PS}, {
1146 atom_op_shl, ATOM_ARG_WS}, {
1147 atom_op_shl, ATOM_ARG_FB}, {
1148 atom_op_shl, ATOM_ARG_PLL}, {
1149 atom_op_shl, ATOM_ARG_MC}, {
1150 atom_op_shr, ATOM_ARG_REG}, {
1151 atom_op_shr, ATOM_ARG_PS}, {
1152 atom_op_shr, ATOM_ARG_WS}, {
1153 atom_op_shr, ATOM_ARG_FB}, {
1154 atom_op_shr, ATOM_ARG_PLL}, {
1155 atom_op_shr, ATOM_ARG_MC}, {
1156 atom_op_debug, 0},};
1158 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1160 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1161 int len, ws, ps, ptr;
1163 atom_exec_context ectx;
1169 len = CU16(base + ATOM_CT_SIZE_PTR);
1170 ws = CU8(base + ATOM_CT_WS_PTR);
1171 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1172 ptr = base + ATOM_CT_CODE_PTR;
1174 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1177 ectx.ps_shift = ps / 4;
1183 ectx.ws = kcalloc(4, ws, GFP_KERNEL);
1190 if (op < ATOM_OP_NAMES_CNT)
1191 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1193 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1195 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1196 base, len, ws, ps, ptr - 1);
1201 if (op < ATOM_OP_CNT && op > 0)
1202 opcode_table[op].func(&ectx, &ptr,
1203 opcode_table[op].arg);
1207 if (op == ATOM_OP_EOT)
1218 int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params)
1222 mutex_lock(&ctx->mutex);
1223 /* reset data block */
1224 ctx->data_block = 0;
1225 /* reset reg block */
1227 /* reset fb window */
1230 ctx->io_mode = ATOM_IO_MM;
1234 r = atom_execute_table_locked(ctx, index, params);
1235 mutex_unlock(&ctx->mutex);
1239 int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1242 mutex_lock(&ctx->scratch_mutex);
1243 r = atom_execute_table_scratch_unlocked(ctx, index, params);
1244 mutex_unlock(&ctx->scratch_mutex);
1248 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1250 static void atom_index_iio(struct atom_context *ctx, int base)
1252 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1255 while (CU8(base) == ATOM_IIO_START) {
1256 ctx->iio[CU8(base + 1)] = base + 2;
1258 while (CU8(base) != ATOM_IIO_END)
1259 base += atom_iio_len[CU8(base)];
1264 struct atom_context *atom_parse(struct card_info *card, void *bios)
1267 struct atom_context *ctx =
1268 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1279 if (CU16(0) != ATOM_BIOS_MAGIC) {
1280 pr_info("Invalid BIOS magic\n");
1285 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1286 strlen(ATOM_ATI_MAGIC))) {
1287 pr_info("Invalid ATI magic\n");
1292 base = CU16(ATOM_ROM_TABLE_PTR);
1294 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1295 strlen(ATOM_ROM_MAGIC))) {
1296 pr_info("Invalid ATOM magic\n");
1301 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1302 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1303 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1309 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1310 while (*str && ((*str == '\n') || (*str == '\r')))
1312 /* name string isn't always 0 terminated */
1313 for (i = 0; i < 511; i++) {
1315 if (name[i] < '.' || name[i] > 'z') {
1320 pr_info("ATOM BIOS: %s\n", name);
1325 int atom_asic_init(struct atom_context *ctx)
1327 struct radeon_device *rdev = ctx->card->dev->dev_private;
1328 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1334 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1335 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1336 if (!ps[0] || !ps[1])
1339 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1341 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1347 if (rdev->family < CHIP_R600) {
1348 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1349 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1354 void atom_destroy(struct atom_context *ctx)
1360 bool atom_parse_data_header(struct atom_context *ctx, int index,
1361 uint16_t * size, uint8_t * frev, uint8_t * crev,
1362 uint16_t * data_start)
1364 int offset = index * 2 + 4;
1365 int idx = CU16(ctx->data_table + offset);
1366 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4);
1374 *frev = CU8(idx + 2);
1376 *crev = CU8(idx + 3);
1381 bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1384 int offset = index * 2 + 4;
1385 int idx = CU16(ctx->cmd_table + offset);
1386 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4);
1392 *frev = CU8(idx + 2);
1394 *crev = CU8(idx + 3);
1398 int atom_allocate_fb_scratch(struct atom_context *ctx)
1400 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1401 uint16_t data_offset;
1402 int usage_bytes = 0;
1403 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1405 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1406 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1408 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1409 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1410 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1412 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1414 ctx->scratch_size_bytes = 0;
1415 if (usage_bytes == 0)
1416 usage_bytes = 20 * 1024;
1417 /* allocate some scratch memory */
1418 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1421 ctx->scratch_size_bytes = usage_bytes;