2 * linux/drivers/video/omap2/dss/sdi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #define DSS_SUBSYS_NAME "SDI"
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/err.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/export.h>
27 #include <linux/platform_device.h>
28 #include <linux/string.h>
30 #include <linux/component.h>
36 struct platform_device *pdev;
39 struct regulator *vdds_sdi_reg;
41 struct dss_lcd_mgr_config mgr_config;
42 struct omap_video_timings timings;
45 struct omap_dss_device output;
47 bool port_initialized;
50 struct sdi_clk_calc_ctx {
51 unsigned long pck_min, pck_max;
54 struct dispc_clock_info dispc_cinfo;
57 static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
58 unsigned long pck, void *data)
60 struct sdi_clk_calc_ctx *ctx = data;
62 ctx->dispc_cinfo.lck_div = lckd;
63 ctx->dispc_cinfo.pck_div = pckd;
64 ctx->dispc_cinfo.lck = lck;
65 ctx->dispc_cinfo.pck = pck;
70 static bool dpi_calc_dss_cb(unsigned long fck, void *data)
72 struct sdi_clk_calc_ctx *ctx = data;
76 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
77 dpi_calc_dispc_cb, ctx);
80 static int sdi_calc_clock_div(unsigned long pclk,
82 struct dispc_clock_info *dispc_cinfo)
85 struct sdi_clk_calc_ctx ctx;
88 * DSS fclk gives us very few possibilities, so finding a good pixel
89 * clock may not be possible. We try multiple times to find the clock,
90 * each time widening the pixel clock range we look for, up to
94 for (i = 0; i < 10; ++i) {
97 memset(&ctx, 0, sizeof(ctx));
98 if (pclk > 1000 * i * i * i)
99 ctx.pck_min = max(pclk - 1000 * i * i * i, 0lu);
102 ctx.pck_max = pclk + 1000 * i * i * i;
104 ok = dss_div_calc(pclk, ctx.pck_min, dpi_calc_dss_cb, &ctx);
107 *dispc_cinfo = ctx.dispc_cinfo;
115 static void sdi_config_lcd_manager(struct omap_dss_device *dssdev)
117 enum omap_channel channel = dssdev->dispc_channel;
119 sdi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
121 sdi.mgr_config.stallmode = false;
122 sdi.mgr_config.fifohandcheck = false;
124 sdi.mgr_config.video_port_width = 24;
125 sdi.mgr_config.lcden_sig_polarity = 1;
127 dss_mgr_set_lcd_config(channel, &sdi.mgr_config);
130 static int sdi_display_enable(struct omap_dss_device *dssdev)
132 struct omap_dss_device *out = &sdi.output;
133 enum omap_channel channel = dssdev->dispc_channel;
134 struct omap_video_timings *t = &sdi.timings;
136 struct dispc_clock_info dispc_cinfo;
140 if (!out->dispc_channel_connected) {
141 DSSERR("failed to enable display: no output/manager\n");
145 r = regulator_enable(sdi.vdds_sdi_reg);
149 r = dispc_runtime_get();
154 t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
155 t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
157 r = sdi_calc_clock_div(t->pixelclock, &fck, &dispc_cinfo);
159 goto err_calc_clock_div;
161 sdi.mgr_config.clock_info = dispc_cinfo;
163 pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div;
165 if (pck != t->pixelclock) {
166 DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n",
173 dss_mgr_set_timings(channel, t);
175 r = dss_set_fck_rate(fck);
177 goto err_set_dss_clock_div;
179 sdi_config_lcd_manager(dssdev);
182 * LCLK and PCLK divisors are located in shadow registers, and we
183 * normally write them to DISPC registers when enabling the output.
184 * However, SDI uses pck-free as source clock for its PLL, and pck-free
185 * is affected by the divisors. And as we need the PLL before enabling
186 * the output, we need to write the divisors early.
188 * It seems just writing to the DISPC register is enough, and we don't
189 * need to care about the shadow register mechanism for pck-free. The
190 * exact reason for this is unknown.
192 dispc_mgr_set_clock_div(channel, &sdi.mgr_config.clock_info);
194 dss_sdi_init(sdi.datapairs);
195 r = dss_sdi_enable();
200 r = dss_mgr_enable(channel);
209 err_set_dss_clock_div:
213 regulator_disable(sdi.vdds_sdi_reg);
218 static void sdi_display_disable(struct omap_dss_device *dssdev)
220 enum omap_channel channel = dssdev->dispc_channel;
222 dss_mgr_disable(channel);
228 regulator_disable(sdi.vdds_sdi_reg);
231 static void sdi_set_timings(struct omap_dss_device *dssdev,
232 struct omap_video_timings *timings)
234 sdi.timings = *timings;
237 static void sdi_get_timings(struct omap_dss_device *dssdev,
238 struct omap_video_timings *timings)
240 *timings = sdi.timings;
243 static int sdi_check_timings(struct omap_dss_device *dssdev,
244 struct omap_video_timings *timings)
246 enum omap_channel channel = dssdev->dispc_channel;
248 if (!dispc_mgr_timings_ok(channel, timings))
251 if (timings->pixelclock == 0)
257 static void sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs)
259 sdi.datapairs = datapairs;
262 static int sdi_init_regulator(void)
264 struct regulator *vdds_sdi;
266 if (sdi.vdds_sdi_reg)
269 vdds_sdi = devm_regulator_get(&sdi.pdev->dev, "vdds_sdi");
270 if (IS_ERR(vdds_sdi)) {
271 if (PTR_ERR(vdds_sdi) != -EPROBE_DEFER)
272 DSSERR("can't get VDDS_SDI regulator\n");
273 return PTR_ERR(vdds_sdi);
276 sdi.vdds_sdi_reg = vdds_sdi;
281 static int sdi_connect(struct omap_dss_device *dssdev,
282 struct omap_dss_device *dst)
284 enum omap_channel channel = dssdev->dispc_channel;
287 r = sdi_init_regulator();
291 r = dss_mgr_connect(channel, dssdev);
295 r = omapdss_output_set_device(dssdev, dst);
297 DSSERR("failed to connect output to new device: %s\n",
299 dss_mgr_disconnect(channel, dssdev);
306 static void sdi_disconnect(struct omap_dss_device *dssdev,
307 struct omap_dss_device *dst)
309 enum omap_channel channel = dssdev->dispc_channel;
311 WARN_ON(dst != dssdev->dst);
313 if (dst != dssdev->dst)
316 omapdss_output_unset_device(dssdev);
318 dss_mgr_disconnect(channel, dssdev);
321 static const struct omapdss_sdi_ops sdi_ops = {
322 .connect = sdi_connect,
323 .disconnect = sdi_disconnect,
325 .enable = sdi_display_enable,
326 .disable = sdi_display_disable,
328 .check_timings = sdi_check_timings,
329 .set_timings = sdi_set_timings,
330 .get_timings = sdi_get_timings,
332 .set_datapairs = sdi_set_datapairs,
335 static void sdi_init_output(struct platform_device *pdev)
337 struct omap_dss_device *out = &sdi.output;
339 out->dev = &pdev->dev;
340 out->id = OMAP_DSS_OUTPUT_SDI;
341 out->output_type = OMAP_DISPLAY_TYPE_SDI;
343 out->dispc_channel = OMAP_DSS_CHANNEL_LCD;
344 /* We have SDI only on OMAP3, where it's on port 1 */
346 out->ops.sdi = &sdi_ops;
347 out->owner = THIS_MODULE;
349 omapdss_register_output(out);
352 static void sdi_uninit_output(struct platform_device *pdev)
354 struct omap_dss_device *out = &sdi.output;
356 omapdss_unregister_output(out);
359 static int sdi_bind(struct device *dev, struct device *master, void *data)
361 struct platform_device *pdev = to_platform_device(dev);
365 sdi_init_output(pdev);
370 static void sdi_unbind(struct device *dev, struct device *master, void *data)
372 struct platform_device *pdev = to_platform_device(dev);
374 sdi_uninit_output(pdev);
377 static const struct component_ops sdi_component_ops = {
379 .unbind = sdi_unbind,
382 static int sdi_probe(struct platform_device *pdev)
384 return component_add(&pdev->dev, &sdi_component_ops);
387 static int sdi_remove(struct platform_device *pdev)
389 component_del(&pdev->dev, &sdi_component_ops);
393 static struct platform_driver omap_sdi_driver = {
395 .remove = sdi_remove,
397 .name = "omapdss_sdi",
398 .suppress_bind_attrs = true,
402 int __init sdi_init_platform_driver(void)
404 return platform_driver_register(&omap_sdi_driver);
407 void sdi_uninit_platform_driver(void)
409 platform_driver_unregister(&omap_sdi_driver);
412 int sdi_init_port(struct platform_device *pdev, struct device_node *port)
414 struct device_node *ep;
418 ep = omapdss_of_get_next_endpoint(port, NULL);
422 r = of_property_read_u32(ep, "datapairs", &datapairs);
424 DSSERR("failed to parse datapairs\n");
428 sdi.datapairs = datapairs;
434 sdi_init_output(pdev);
436 sdi.port_initialized = true;
446 void sdi_uninit_port(struct device_node *port)
448 if (!sdi.port_initialized)
451 sdi_uninit_output(sdi.pdev);