drivers/gpu/drm/omapdrm/dss/omapdss.h

   1 /*
   2  * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
   3  * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #ifndef __OMAP_DRM_DSS_H
  19 #define __OMAP_DRM_DSS_H
  20
  21 #include <linux/list.h>
  22 #include <linux/kobject.h>
  23 #include <linux/device.h>
  24 #include <linux/interrupt.h>
  25 #include <video/videomode.h>
  26 #include <linux/platform_data/omapdss.h>
  27 #include <uapi/drm/drm_mode.h>
  28 #include <drm/drm_crtc.h>
  29
  30 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
  31 #define DISPC_IRQ_VSYNC                 (1 << 1)
  32 #define DISPC_IRQ_EVSYNC_EVEN           (1 << 2)
  33 #define DISPC_IRQ_EVSYNC_ODD            (1 << 3)
  34 #define DISPC_IRQ_ACBIAS_COUNT_STAT     (1 << 4)
  35 #define DISPC_IRQ_PROG_LINE_NUM         (1 << 5)
  36 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW    (1 << 6)
  37 #define DISPC_IRQ_GFX_END_WIN           (1 << 7)
  38 #define DISPC_IRQ_PAL_GAMMA_MASK        (1 << 8)
  39 #define DISPC_IRQ_OCP_ERR               (1 << 9)
  40 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW   (1 << 10)
  41 #define DISPC_IRQ_VID1_END_WIN          (1 << 11)
  42 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW   (1 << 12)
  43 #define DISPC_IRQ_VID2_END_WIN          (1 << 13)
  44 #define DISPC_IRQ_SYNC_LOST             (1 << 14)
  45 #define DISPC_IRQ_SYNC_LOST_DIGIT       (1 << 15)
  46 #define DISPC_IRQ_WAKEUP                (1 << 16)
  47 #define DISPC_IRQ_SYNC_LOST2            (1 << 17)
  48 #define DISPC_IRQ_VSYNC2                (1 << 18)
  49 #define DISPC_IRQ_VID3_END_WIN          (1 << 19)
  50 #define DISPC_IRQ_VID3_FIFO_UNDERFLOW   (1 << 20)
  51 #define DISPC_IRQ_ACBIAS_COUNT_STAT2    (1 << 21)
  52 #define DISPC_IRQ_FRAMEDONE2            (1 << 22)
  53 #define DISPC_IRQ_FRAMEDONEWB           (1 << 23)
  54 #define DISPC_IRQ_FRAMEDONETV           (1 << 24)
  55 #define DISPC_IRQ_WBBUFFEROVERFLOW      (1 << 25)
  56 #define DISPC_IRQ_WBUNCOMPLETEERROR     (1 << 26)
  57 #define DISPC_IRQ_SYNC_LOST3            (1 << 27)
  58 #define DISPC_IRQ_VSYNC3                (1 << 28)
  59 #define DISPC_IRQ_ACBIAS_COUNT_STAT3    (1 << 29)
  60 #define DISPC_IRQ_FRAMEDONE3            (1 << 30)
  61
  62 struct dss_device;
  63 struct omap_drm_private;
  64 struct omap_dss_device;
  65 struct dispc_device;
  66 struct dss_device;
  67 struct dss_lcd_mgr_config;
  68 struct snd_aes_iec958;
  69 struct snd_cea_861_aud_if;
  70 struct hdmi_avi_infoframe;
  71
  72 enum omap_display_type {
  73         OMAP_DISPLAY_TYPE_NONE          = 0,
  74         OMAP_DISPLAY_TYPE_DPI           = 1 << 0,
  75         OMAP_DISPLAY_TYPE_DBI           = 1 << 1,
  76         OMAP_DISPLAY_TYPE_SDI           = 1 << 2,
  77         OMAP_DISPLAY_TYPE_DSI           = 1 << 3,
  78         OMAP_DISPLAY_TYPE_VENC          = 1 << 4,
  79         OMAP_DISPLAY_TYPE_HDMI          = 1 << 5,
  80         OMAP_DISPLAY_TYPE_DVI           = 1 << 6,
  81 };
  82
  83 enum omap_plane_id {
  84         OMAP_DSS_GFX    = 0,
  85         OMAP_DSS_VIDEO1 = 1,
  86         OMAP_DSS_VIDEO2 = 2,
  87         OMAP_DSS_VIDEO3 = 3,
  88         OMAP_DSS_WB     = 4,
  89 };
  90
  91 enum omap_channel {
  92         OMAP_DSS_CHANNEL_LCD    = 0,
  93         OMAP_DSS_CHANNEL_DIGIT  = 1,
  94         OMAP_DSS_CHANNEL_LCD2   = 2,
  95         OMAP_DSS_CHANNEL_LCD3   = 3,
  96         OMAP_DSS_CHANNEL_WB     = 4,
  97 };
  98
  99 enum omap_color_mode {
 100         _UNUSED_,
 101 };
 102
 103 enum omap_dss_load_mode {
 104         OMAP_DSS_LOAD_CLUT_AND_FRAME    = 0,
 105         OMAP_DSS_LOAD_CLUT_ONLY         = 1,
 106         OMAP_DSS_LOAD_FRAME_ONLY        = 2,
 107         OMAP_DSS_LOAD_CLUT_ONCE_FRAME   = 3,
 108 };
 109
 110 enum omap_dss_trans_key_type {
 111         OMAP_DSS_COLOR_KEY_GFX_DST = 0,
 112         OMAP_DSS_COLOR_KEY_VID_SRC = 1,
 113 };
 114
 115 enum omap_dss_signal_level {
 116         OMAPDSS_SIG_ACTIVE_LOW,
 117         OMAPDSS_SIG_ACTIVE_HIGH,
 118 };
 119
 120 enum omap_dss_signal_edge {
 121         OMAPDSS_DRIVE_SIG_FALLING_EDGE,
 122         OMAPDSS_DRIVE_SIG_RISING_EDGE,
 123 };
 124
 125 enum omap_dss_venc_type {
 126         OMAP_DSS_VENC_TYPE_COMPOSITE,
 127         OMAP_DSS_VENC_TYPE_SVIDEO,
 128 };
 129
 130 enum omap_dss_dsi_pixel_format {
 131         OMAP_DSS_DSI_FMT_RGB888,
 132         OMAP_DSS_DSI_FMT_RGB666,
 133         OMAP_DSS_DSI_FMT_RGB666_PACKED,
 134         OMAP_DSS_DSI_FMT_RGB565,
 135 };
 136
 137 enum omap_dss_dsi_mode {
 138         OMAP_DSS_DSI_CMD_MODE = 0,
 139         OMAP_DSS_DSI_VIDEO_MODE,
 140 };
 141
 142 enum omap_display_caps {
 143         OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE      = 1 << 0,
 144         OMAP_DSS_DISPLAY_CAP_TEAR_ELIM          = 1 << 1,
 145 };
 146
 147 enum omap_dss_display_state {
 148         OMAP_DSS_DISPLAY_DISABLED = 0,
 149         OMAP_DSS_DISPLAY_ACTIVE,
 150 };
 151
 152 enum omap_dss_rotation_type {
 153         OMAP_DSS_ROT_NONE       = 0,
 154         OMAP_DSS_ROT_TILER      = 1 << 0,
 155 };
 156
 157 enum omap_overlay_caps {
 158         OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
 159         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
 160         OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
 161         OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
 162         OMAP_DSS_OVL_CAP_POS = 1 << 4,
 163         OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
 164 };
 165
 166 enum omap_dss_output_id {
 167         OMAP_DSS_OUTPUT_DPI     = 1 << 0,
 168         OMAP_DSS_OUTPUT_DBI     = 1 << 1,
 169         OMAP_DSS_OUTPUT_SDI     = 1 << 2,
 170         OMAP_DSS_OUTPUT_DSI1    = 1 << 3,
 171         OMAP_DSS_OUTPUT_DSI2    = 1 << 4,
 172         OMAP_DSS_OUTPUT_VENC    = 1 << 5,
 173         OMAP_DSS_OUTPUT_HDMI    = 1 << 6,
 174 };
 175
 176 /* DSI */
 177
 178 enum omap_dss_dsi_trans_mode {
 179         /* Sync Pulses: both sync start and end packets sent */
 180         OMAP_DSS_DSI_PULSE_MODE,
 181         /* Sync Events: only sync start packets sent */
 182         OMAP_DSS_DSI_EVENT_MODE,
 183         /* Burst: only sync start packets sent, pixels are time compressed */
 184         OMAP_DSS_DSI_BURST_MODE,
 185 };
 186
 187 struct omap_dss_dsi_videomode_timings {
 188         unsigned long hsclk;
 189
 190         unsigned int ndl;
 191         unsigned int bitspp;
 192
 193         /* pixels */
 194         u16 hact;
 195         /* lines */
 196         u16 vact;
 197
 198         /* DSI video mode blanking data */
 199         /* Unit: byte clock cycles */
 200         u16 hss;
 201         u16 hsa;
 202         u16 hse;
 203         u16 hfp;
 204         u16 hbp;
 205         /* Unit: line clocks */
 206         u16 vsa;
 207         u16 vfp;
 208         u16 vbp;
 209
 210         /* DSI blanking modes */
 211         int blanking_mode;
 212         int hsa_blanking_mode;
 213         int hbp_blanking_mode;
 214         int hfp_blanking_mode;
 215
 216         enum omap_dss_dsi_trans_mode trans_mode;
 217
 218         bool ddr_clk_always_on;
 219         int window_sync;
 220 };
 221
 222 struct omap_dss_dsi_config {
 223         enum omap_dss_dsi_mode mode;
 224         enum omap_dss_dsi_pixel_format pixel_format;
 225         const struct videomode *vm;
 226
 227         unsigned long hs_clk_min, hs_clk_max;
 228         unsigned long lp_clk_min, lp_clk_max;
 229
 230         bool ddr_clk_always_on;
 231         enum omap_dss_dsi_trans_mode trans_mode;
 232 };
 233
 234 struct omap_dss_cpr_coefs {
 235         s16 rr, rg, rb;
 236         s16 gr, gg, gb;
 237         s16 br, bg, bb;
 238 };
 239
 240 struct omap_overlay_info {
 241         dma_addr_t paddr;
 242         dma_addr_t p_uv_addr;  /* for NV12 format */
 243         u16 screen_width;
 244         u16 width;
 245         u16 height;
 246         u32 fourcc;
 247         u8 rotation;
 248         enum omap_dss_rotation_type rotation_type;
 249
 250         u16 pos_x;
 251         u16 pos_y;
 252         u16 out_width;  /* if 0, out_width == width */
 253         u16 out_height; /* if 0, out_height == height */
 254         u8 global_alpha;
 255         u8 pre_mult_alpha;
 256         u8 zorder;
 257 };
 258
 259 struct omap_overlay_manager_info {
 260         u32 default_color;
 261
 262         enum omap_dss_trans_key_type trans_key_type;
 263         u32 trans_key;
 264         bool trans_enabled;
 265
 266         bool partial_alpha_enabled;
 267
 268         bool cpr_enable;
 269         struct omap_dss_cpr_coefs cpr_coefs;
 270 };
 271
 272 /* 22 pins means 1 clk lane and 10 data lanes */
 273 #define OMAP_DSS_MAX_DSI_PINS 22
 274
 275 struct omap_dsi_pin_config {
 276         int num_pins;
 277         /*
 278          * pin numbers in the following order:
 279          * clk+, clk-
 280          * data1+, data1-
 281          * data2+, data2-
 282          * ...
 283          */
 284         int pins[OMAP_DSS_MAX_DSI_PINS];
 285 };
 286
 287 struct omap_dss_writeback_info {
 288         u32 paddr;
 289         u32 p_uv_addr;
 290         u16 buf_width;
 291         u16 width;
 292         u16 height;
 293         u32 fourcc;
 294         u8 rotation;
 295         enum omap_dss_rotation_type rotation_type;
 296         u8 pre_mult_alpha;
 297 };
 298
 299 struct omapdss_dpi_ops {
 300         int (*connect)(struct omap_dss_device *dssdev,
 301                         struct omap_dss_device *dst);
 302         void (*disconnect)(struct omap_dss_device *dssdev,
 303                         struct omap_dss_device *dst);
 304
 305         int (*enable)(struct omap_dss_device *dssdev);
 306         void (*disable)(struct omap_dss_device *dssdev);
 307
 308         int (*check_timings)(struct omap_dss_device *dssdev,
 309                              struct videomode *vm);
 310         void (*set_timings)(struct omap_dss_device *dssdev,
 311                             struct videomode *vm);
 312         void (*get_timings)(struct omap_dss_device *dssdev,
 313                             struct videomode *vm);
 314 };
 315
 316 struct omapdss_sdi_ops {
 317         int (*connect)(struct omap_dss_device *dssdev,
 318                         struct omap_dss_device *dst);
 319         void (*disconnect)(struct omap_dss_device *dssdev,
 320                         struct omap_dss_device *dst);
 321
 322         int (*enable)(struct omap_dss_device *dssdev);
 323         void (*disable)(struct omap_dss_device *dssdev);
 324
 325         int (*check_timings)(struct omap_dss_device *dssdev,
 326                              struct videomode *vm);
 327         void (*set_timings)(struct omap_dss_device *dssdev,
 328                             struct videomode *vm);
 329         void (*get_timings)(struct omap_dss_device *dssdev,
 330                             struct videomode *vm);
 331 };
 332
 333 struct omapdss_dvi_ops {
 334         int (*connect)(struct omap_dss_device *dssdev,
 335                         struct omap_dss_device *dst);
 336         void (*disconnect)(struct omap_dss_device *dssdev,
 337                         struct omap_dss_device *dst);
 338
 339         int (*enable)(struct omap_dss_device *dssdev);
 340         void (*disable)(struct omap_dss_device *dssdev);
 341
 342         int (*check_timings)(struct omap_dss_device *dssdev,
 343                              struct videomode *vm);
 344         void (*set_timings)(struct omap_dss_device *dssdev,
 345                             struct videomode *vm);
 346         void (*get_timings)(struct omap_dss_device *dssdev,
 347                             struct videomode *vm);
 348 };
 349
 350 struct omapdss_atv_ops {
 351         int (*connect)(struct omap_dss_device *dssdev,
 352                         struct omap_dss_device *dst);
 353         void (*disconnect)(struct omap_dss_device *dssdev,
 354                         struct omap_dss_device *dst);
 355
 356         int (*enable)(struct omap_dss_device *dssdev);
 357         void (*disable)(struct omap_dss_device *dssdev);
 358
 359         int (*check_timings)(struct omap_dss_device *dssdev,
 360                              struct videomode *vm);
 361         void (*set_timings)(struct omap_dss_device *dssdev,
 362                             struct videomode *vm);
 363         void (*get_timings)(struct omap_dss_device *dssdev,
 364                             struct videomode *vm);
 365
 366         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 367         u32 (*get_wss)(struct omap_dss_device *dssdev);
 368 };
 369
 370 struct omapdss_hdmi_ops {
 371         int (*connect)(struct omap_dss_device *dssdev,
 372                         struct omap_dss_device *dst);
 373         void (*disconnect)(struct omap_dss_device *dssdev,
 374                         struct omap_dss_device *dst);
 375
 376         int (*enable)(struct omap_dss_device *dssdev);
 377         void (*disable)(struct omap_dss_device *dssdev);
 378
 379         int (*check_timings)(struct omap_dss_device *dssdev,
 380                              struct videomode *vm);
 381         void (*set_timings)(struct omap_dss_device *dssdev,
 382                             struct videomode *vm);
 383         void (*get_timings)(struct omap_dss_device *dssdev,
 384                             struct videomode *vm);
 385
 386         int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
 387         void (*lost_hotplug)(struct omap_dss_device *dssdev);
 388         bool (*detect)(struct omap_dss_device *dssdev);
 389
 390         int (*register_hpd_cb)(struct omap_dss_device *dssdev,
 391                                void (*cb)(void *cb_data,
 392                                           enum drm_connector_status status),
 393                                void *cb_data);
 394         void (*unregister_hpd_cb)(struct omap_dss_device *dssdev);
 395         void (*enable_hpd)(struct omap_dss_device *dssdev);
 396         void (*disable_hpd)(struct omap_dss_device *dssdev);
 397
 398         int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
 399         int (*set_infoframe)(struct omap_dss_device *dssdev,
 400                 const struct hdmi_avi_infoframe *avi);
 401 };
 402
 403 struct omapdss_dsi_ops {
 404         int (*connect)(struct omap_dss_device *dssdev,
 405                         struct omap_dss_device *dst);
 406         void (*disconnect)(struct omap_dss_device *dssdev,
 407                         struct omap_dss_device *dst);
 408
 409         int (*enable)(struct omap_dss_device *dssdev);
 410         void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
 411                         bool enter_ulps);
 412
 413         /* bus configuration */
 414         int (*set_config)(struct omap_dss_device *dssdev,
 415                         const struct omap_dss_dsi_config *cfg);
 416         int (*configure_pins)(struct omap_dss_device *dssdev,
 417                         const struct omap_dsi_pin_config *pin_cfg);
 418
 419         void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
 420                         bool enable);
 421         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 422
 423         int (*update)(struct omap_dss_device *dssdev, int channel,
 424                         void (*callback)(int, void *), void *data);
 425
 426         void (*bus_lock)(struct omap_dss_device *dssdev);
 427         void (*bus_unlock)(struct omap_dss_device *dssdev);
 428
 429         int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
 430         void (*disable_video_output)(struct omap_dss_device *dssdev,
 431                         int channel);
 432
 433         int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
 434         int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
 435                         int vc_id);
 436         void (*release_vc)(struct omap_dss_device *dssdev, int channel);
 437
 438         /* data transfer */
 439         int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
 440                         u8 *data, int len);
 441         int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
 442                         u8 *data, int len);
 443         int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
 444                         u8 *data, int len);
 445
 446         int (*gen_write)(struct omap_dss_device *dssdev, int channel,
 447                         u8 *data, int len);
 448         int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
 449                         u8 *data, int len);
 450         int (*gen_read)(struct omap_dss_device *dssdev, int channel,
 451                         u8 *reqdata, int reqlen,
 452                         u8 *data, int len);
 453
 454         int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
 455
 456         int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
 457                         int channel, u16 plen);
 458 };
 459
 460 struct omap_dss_device {
 461         struct kobject kobj;
 462         struct device *dev;
 463
 464         struct module *owner;
 465
 466         struct list_head panel_list;
 467
 468         /* alias in the form of "display%d" */
 469         char alias[16];
 470
 471         enum omap_display_type type;
 472         enum omap_display_type output_type;
 473
 474         struct {
 475                 struct videomode vm;
 476
 477                 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
 478                 enum omap_dss_dsi_mode dsi_mode;
 479         } panel;
 480
 481         const char *name;
 482
 483         struct omap_dss_driver *driver;
 484
 485         union {
 486                 const struct omapdss_dpi_ops *dpi;
 487                 const struct omapdss_sdi_ops *sdi;
 488                 const struct omapdss_dvi_ops *dvi;
 489                 const struct omapdss_hdmi_ops *hdmi;
 490                 const struct omapdss_atv_ops *atv;
 491                 const struct omapdss_dsi_ops *dsi;
 492         } ops;
 493
 494         /* helper variable for driver suspend/resume */
 495         bool activate_after_resume;
 496
 497         enum omap_display_caps caps;
 498
 499         struct omap_dss_device *src;
 500
 501         enum omap_dss_display_state state;
 502
 503         /* OMAP DSS output specific fields */
 504
 505         struct list_head list;
 506
 507         /* DISPC channel for this output */
 508         enum omap_channel dispc_channel;
 509         bool dispc_channel_connected;
 510
 511         /* output instance */
 512         enum omap_dss_output_id id;
 513
 514         /* the port number in the DT node */
 515         int port_num;
 516
 517         /* dynamic fields */
 518         struct omap_dss_device *dst;
 519 };
 520
 521 struct omap_dss_driver {
 522         int (*probe)(struct omap_dss_device *);
 523         void (*remove)(struct omap_dss_device *);
 524
 525         int (*connect)(struct omap_dss_device *dssdev);
 526         void (*disconnect)(struct omap_dss_device *dssdev);
 527
 528         int (*enable)(struct omap_dss_device *display);
 529         void (*disable)(struct omap_dss_device *display);
 530         int (*run_test)(struct omap_dss_device *display, int test);
 531
 532         int (*update)(struct omap_dss_device *dssdev,
 533                                u16 x, u16 y, u16 w, u16 h);
 534         int (*sync)(struct omap_dss_device *dssdev);
 535
 536         int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
 537         int (*get_te)(struct omap_dss_device *dssdev);
 538
 539         u8 (*get_rotate)(struct omap_dss_device *dssdev);
 540         int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
 541
 542         bool (*get_mirror)(struct omap_dss_device *dssdev);
 543         int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
 544
 545         int (*memory_read)(struct omap_dss_device *dssdev,
 546                         void *buf, size_t size,
 547                         u16 x, u16 y, u16 w, u16 h);
 548
 549         int (*check_timings)(struct omap_dss_device *dssdev,
 550                              struct videomode *vm);
 551         void (*set_timings)(struct omap_dss_device *dssdev,
 552                             struct videomode *vm);
 553         void (*get_timings)(struct omap_dss_device *dssdev,
 554                             struct videomode *vm);
 555         void (*get_size)(struct omap_dss_device *dssdev,
 556                          unsigned int *width, unsigned int *height);
 557
 558         int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
 559         u32 (*get_wss)(struct omap_dss_device *dssdev);
 560
 561         int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
 562         bool (*detect)(struct omap_dss_device *dssdev);
 563
 564         int (*register_hpd_cb)(struct omap_dss_device *dssdev,
 565                                void (*cb)(void *cb_data,
 566                                           enum drm_connector_status status),
 567                                void *cb_data);
 568         void (*unregister_hpd_cb)(struct omap_dss_device *dssdev);
 569         void (*enable_hpd)(struct omap_dss_device *dssdev);
 570         void (*disable_hpd)(struct omap_dss_device *dssdev);
 571
 572         int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
 573         int (*set_hdmi_infoframe)(struct omap_dss_device *dssdev,
 574                 const struct hdmi_avi_infoframe *avi);
 575 };
 576
 577 struct dss_device *omapdss_get_dss(void);
 578 void omapdss_set_dss(struct dss_device *dss);
 579 static inline bool omapdss_is_initialized(void)
 580 {
 581         return !!omapdss_get_dss();
 582 }
 583
 584 int omapdss_register_display(struct omap_dss_device *dssdev);
 585 void omapdss_unregister_display(struct omap_dss_device *dssdev);
 586
 587 struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
 588 void omap_dss_put_device(struct omap_dss_device *dssdev);
 589 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
 590 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
 591
 592 int omap_dss_get_num_overlay_managers(void);
 593
 594 int omap_dss_get_num_overlays(void);
 595
 596 int omapdss_register_output(struct omap_dss_device *output);
 597 void omapdss_unregister_output(struct omap_dss_device *output);
 598 struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
 599 struct omap_dss_device *omap_dss_find_output_by_port_node(struct device_node *port);
 600 int omapdss_output_set_device(struct omap_dss_device *out,
 601                 struct omap_dss_device *dssdev);
 602 int omapdss_output_unset_device(struct omap_dss_device *out);
 603
 604 struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
 605
 606 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
 607 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 608 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
 609
 610 int omapdss_compat_init(void);
 611 void omapdss_compat_uninit(void);
 612
 613 static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
 614 {
 615         return dssdev->src;
 616 }
 617
 618 static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
 619 {
 620         return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
 621 }
 622
 623 struct omap_dss_device *
 624 omapdss_of_find_source_for_first_ep(struct device_node *node);
 625
 626 struct device_node *dss_of_port_get_parent_device(struct device_node *port);
 627 u32 dss_of_port_get_port_number(struct device_node *port);
 628
 629 enum dss_writeback_channel {
 630         DSS_WB_LCD1_MGR =       0,
 631         DSS_WB_LCD2_MGR =       1,
 632         DSS_WB_TV_MGR =         2,
 633         DSS_WB_OVL0 =           3,
 634         DSS_WB_OVL1 =           4,
 635         DSS_WB_OVL2 =           5,
 636         DSS_WB_OVL3 =           6,
 637         DSS_WB_LCD3_MGR =       7,
 638 };
 639
 640 struct dss_mgr_ops {
 641         int (*connect)(struct omap_drm_private *priv,
 642                        enum omap_channel channel,
 643                        struct omap_dss_device *dst);
 644         void (*disconnect)(struct omap_drm_private *priv,
 645                            enum omap_channel channel,
 646                            struct omap_dss_device *dst);
 647
 648         void (*start_update)(struct omap_drm_private *priv,
 649                              enum omap_channel channel);
 650         int (*enable)(struct omap_drm_private *priv,
 651                       enum omap_channel channel);
 652         void (*disable)(struct omap_drm_private *priv,
 653                         enum omap_channel channel);
 654         void (*set_timings)(struct omap_drm_private *priv,
 655                             enum omap_channel channel,
 656                             const struct videomode *vm);
 657         void (*set_lcd_config)(struct omap_drm_private *priv,
 658                                enum omap_channel channel,
 659                                const struct dss_lcd_mgr_config *config);
 660         int (*register_framedone_handler)(struct omap_drm_private *priv,
 661                         enum omap_channel channel,
 662                         void (*handler)(void *), void *data);
 663         void (*unregister_framedone_handler)(struct omap_drm_private *priv,
 664                         enum omap_channel channel,
 665                         void (*handler)(void *), void *data);
 666 };
 667
 668 int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops,
 669                         struct omap_drm_private *priv);
 670 void dss_uninstall_mgr_ops(void);
 671
 672 int dss_mgr_connect(struct omap_dss_device *dssdev,
 673                     struct omap_dss_device *dst);
 674 void dss_mgr_disconnect(struct omap_dss_device *dssdev,
 675                         struct omap_dss_device *dst);
 676 void dss_mgr_set_timings(struct omap_dss_device *dssdev,
 677                 const struct videomode *vm);
 678 void dss_mgr_set_lcd_config(struct omap_dss_device *dssdev,
 679                 const struct dss_lcd_mgr_config *config);
 680 int dss_mgr_enable(struct omap_dss_device *dssdev);
 681 void dss_mgr_disable(struct omap_dss_device *dssdev);
 682 void dss_mgr_start_update(struct omap_dss_device *dssdev);
 683 int dss_mgr_register_framedone_handler(struct omap_dss_device *dssdev,
 684                 void (*handler)(void *), void *data);
 685 void dss_mgr_unregister_framedone_handler(struct omap_dss_device *dssdev,
 686                 void (*handler)(void *), void *data);
 687
 688 /* dispc ops */
 689
 690 struct dispc_ops {
 691         u32 (*read_irqstatus)(struct dispc_device *dispc);
 692         void (*clear_irqstatus)(struct dispc_device *dispc, u32 mask);
 693         void (*write_irqenable)(struct dispc_device *dispc, u32 mask);
 694
 695         int (*request_irq)(struct dispc_device *dispc, irq_handler_t handler,
 696                            void *dev_id);
 697         void (*free_irq)(struct dispc_device *dispc, void *dev_id);
 698
 699         int (*runtime_get)(struct dispc_device *dispc);
 700         void (*runtime_put)(struct dispc_device *dispc);
 701
 702         int (*get_num_ovls)(struct dispc_device *dispc);
 703         int (*get_num_mgrs)(struct dispc_device *dispc);
 704
 705         u32 (*get_memory_bandwidth_limit)(struct dispc_device *dispc);
 706
 707         void (*mgr_enable)(struct dispc_device *dispc,
 708                            enum omap_channel channel, bool enable);
 709         bool (*mgr_is_enabled)(struct dispc_device *dispc,
 710                                enum omap_channel channel);
 711         u32 (*mgr_get_vsync_irq)(struct dispc_device *dispc,
 712                                  enum omap_channel channel);
 713         u32 (*mgr_get_framedone_irq)(struct dispc_device *dispc,
 714                                      enum omap_channel channel);
 715         u32 (*mgr_get_sync_lost_irq)(struct dispc_device *dispc,
 716                                      enum omap_channel channel);
 717         bool (*mgr_go_busy)(struct dispc_device *dispc,
 718                             enum omap_channel channel);
 719         void (*mgr_go)(struct dispc_device *dispc, enum omap_channel channel);
 720         void (*mgr_set_lcd_config)(struct dispc_device *dispc,
 721                                    enum omap_channel channel,
 722                                    const struct dss_lcd_mgr_config *config);
 723         void (*mgr_set_timings)(struct dispc_device *dispc,
 724                                 enum omap_channel channel,
 725                                 const struct videomode *vm);
 726         void (*mgr_setup)(struct dispc_device *dispc, enum omap_channel channel,
 727                           const struct omap_overlay_manager_info *info);
 728         enum omap_dss_output_id (*mgr_get_supported_outputs)(
 729                         struct dispc_device *dispc, enum omap_channel channel);
 730         u32 (*mgr_gamma_size)(struct dispc_device *dispc,
 731                               enum omap_channel channel);
 732         void (*mgr_set_gamma)(struct dispc_device *dispc,
 733                               enum omap_channel channel,
 734                               const struct drm_color_lut *lut,
 735                               unsigned int length);
 736
 737         int (*ovl_enable)(struct dispc_device *dispc, enum omap_plane_id plane,
 738                           bool enable);
 739         int (*ovl_setup)(struct dispc_device *dispc, enum omap_plane_id plane,
 740                          const struct omap_overlay_info *oi,
 741                          const struct videomode *vm, bool mem_to_mem,
 742                          enum omap_channel channel);
 743
 744         const u32 *(*ovl_get_color_modes)(struct dispc_device *dispc,
 745                                           enum omap_plane_id plane);
 746
 747         u32 (*wb_get_framedone_irq)(struct dispc_device *dispc);
 748         int (*wb_setup)(struct dispc_device *dispc,
 749                 const struct omap_dss_writeback_info *wi,
 750                 bool mem_to_mem, const struct videomode *vm,
 751                 enum dss_writeback_channel channel_in);
 752         bool (*has_writeback)(struct dispc_device *dispc);
 753         bool (*wb_go_busy)(struct dispc_device *dispc);
 754         void (*wb_go)(struct dispc_device *dispc);
 755 };
 756
 757 struct dispc_device *dispc_get_dispc(struct dss_device *dss);
 758 const struct dispc_ops *dispc_get_ops(struct dss_device *dss);
 759
 760 bool omapdss_component_is_display(struct device_node *node);
 761 bool omapdss_component_is_output(struct device_node *node);
 762
 763 bool omapdss_stack_is_ready(void);
 764 void omapdss_gather_components(struct device *dev);
 765
 766 #endif /* __OMAP_DRM_DSS_H */