2 * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
26 #define TEGRA186_MC_BASE 0x02c10000
29 gp10b_secboot_oneinit(struct nvkm_secboot *sb)
31 struct gm200_secboot *gsb = gm200_secboot(sb);
34 ret = gm20b_secboot_tegra_read_wpr(gsb, TEGRA186_MC_BASE);
38 return gm200_secboot_oneinit(sb);
41 static const struct nvkm_secboot_func
43 .dtor = gm200_secboot_dtor,
44 .oneinit = gp10b_secboot_oneinit,
45 .fini = gm200_secboot_fini,
46 .run_blob = gm200_secboot_run_blob,
50 gp10b_secboot_new(struct nvkm_device *device, int index,
51 struct nvkm_secboot **psb)
54 struct gm200_secboot *gsb;
57 acr = acr_r352_new(BIT(NVKM_SECBOOT_FALCON_FECS) |
58 BIT(NVKM_SECBOOT_FALCON_GPCCS) |
59 BIT(NVKM_SECBOOT_FALCON_PMU));
63 gsb = kzalloc(sizeof(*gsb), GFP_KERNEL);
70 ret = nvkm_secboot_ctor(&gp10b_secboot, acr, device, index, &gsb->base);
77 #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC)