drivers/gpu/drm/nouveau/nvkm/subdev/clk/base.c

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "priv.h"
  25
  26 #include <subdev/bios.h>
  27 #include <subdev/bios/boost.h>
  28 #include <subdev/bios/cstep.h>
  29 #include <subdev/bios/perf.h>
  30 #include <subdev/bios/vpstate.h>
  31 #include <subdev/fb.h>
  32 #include <subdev/therm.h>
  33 #include <subdev/volt.h>
  34
  35 #include <core/option.h>
  36
  37 /******************************************************************************
  38  * misc
  39  *****************************************************************************/
  40 static u32
  41 nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust,
  42                 u8 pstate, u8 domain, u32 input)
  43 {
  44         struct nvkm_bios *bios = clk->subdev.device->bios;
  45         struct nvbios_boostE boostE;
  46         u8  ver, hdr, cnt, len;
  47         u32 data;
  48
  49         data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE);
  50         if (data) {
  51                 struct nvbios_boostS boostS;
  52                 u8  idx = 0, sver, shdr;
  53                 u32 subd;
  54
  55                 input = max(boostE.min, input);
  56                 input = min(boostE.max, input);
  57                 do {
  58                         sver = ver;
  59                         shdr = hdr;
  60                         subd = nvbios_boostSp(bios, idx++, data, &sver, &shdr,
  61                                               cnt, len, &boostS);
  62                         if (subd && boostS.domain == domain) {
  63                                 if (adjust)
  64                                         input = input * boostS.percent / 100;
  65                                 input = max(boostS.min, input);
  66                                 input = min(boostS.max, input);
  67                                 break;
  68                         }
  69                 } while (subd);
  70         }
  71
  72         return input;
  73 }
  74
  75 /******************************************************************************
  76  * C-States
  77  *****************************************************************************/
  78 static bool
  79 nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate,
  80                   u32 max_volt, int temp)
  81 {
  82         const struct nvkm_domain *domain = clk->domains;
  83         struct nvkm_volt *volt = clk->subdev.device->volt;
  84         int voltage;
  85
  86         while (domain && domain->name != nv_clk_src_max) {
  87                 if (domain->flags & NVKM_CLK_DOM_FLAG_VPSTATE) {
  88                         u32 freq = cstate->domain[domain->name];
  89                         switch (clk->boost_mode) {
  90                         case NVKM_CLK_BOOST_NONE:
  91                                 if (clk->base_khz && freq > clk->base_khz)
  92                                         return false;
  93                         case NVKM_CLK_BOOST_BIOS:
  94                                 if (clk->boost_khz && freq > clk->boost_khz)
  95                                         return false;
  96                         }
  97                 }
  98                 domain++;
  99         }
 100
 101         if (!volt)
 102                 return true;
 103
 104         voltage = nvkm_volt_map(volt, cstate->voltage, temp);
 105         if (voltage < 0)
 106                 return false;
 107         return voltage <= min(max_volt, volt->max_uv);
 108 }
 109
 110 static struct nvkm_cstate *
 111 nvkm_cstate_find_best(struct nvkm_clk *clk, struct nvkm_pstate *pstate,
 112                       struct nvkm_cstate *start)
 113 {
 114         struct nvkm_device *device = clk->subdev.device;
 115         struct nvkm_volt *volt = device->volt;
 116         struct nvkm_cstate *cstate;
 117         int max_volt;
 118
 119         if (!pstate || !start)
 120                 return NULL;
 121
 122         if (!volt)
 123                 return start;
 124
 125         max_volt = volt->max_uv;
 126         if (volt->max0_id != 0xff)
 127                 max_volt = min(max_volt,
 128                                nvkm_volt_map(volt, volt->max0_id, clk->temp));
 129         if (volt->max1_id != 0xff)
 130                 max_volt = min(max_volt,
 131                                nvkm_volt_map(volt, volt->max1_id, clk->temp));
 132         if (volt->max2_id != 0xff)
 133                 max_volt = min(max_volt,
 134                                nvkm_volt_map(volt, volt->max2_id, clk->temp));
 135
 136         for (cstate = start; &cstate->head != &pstate->list;
 137              cstate = list_entry(cstate->head.prev, typeof(*cstate), head)) {
 138                 if (nvkm_cstate_valid(clk, cstate, max_volt, clk->temp))
 139                         return cstate;
 140         }
 141
 142         return NULL;
 143 }
 144
 145 static struct nvkm_cstate *
 146 nvkm_cstate_get(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
 147 {
 148         struct nvkm_cstate *cstate;
 149         if (cstatei == NVKM_CLK_CSTATE_HIGHEST)
 150                 return list_last_entry(&pstate->list, typeof(*cstate), head);
 151         else {
 152                 list_for_each_entry(cstate, &pstate->list, head) {
 153                         if (cstate->id == cstatei)
 154                                 return cstate;
 155                 }
 156         }
 157         return NULL;
 158 }
 159
 160 static int
 161 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei)
 162 {
 163         struct nvkm_subdev *subdev = &clk->subdev;
 164         struct nvkm_device *device = subdev->device;
 165         struct nvkm_therm *therm = device->therm;
 166         struct nvkm_volt *volt = device->volt;
 167         struct nvkm_cstate *cstate;
 168         int ret;
 169
 170         if (!list_empty(&pstate->list)) {
 171                 cstate = nvkm_cstate_get(clk, pstate, cstatei);
 172                 cstate = nvkm_cstate_find_best(clk, pstate, cstate);
 173                 if (!cstate)
 174                         return -EINVAL;
 175         } else {
 176                 cstate = &pstate->base;
 177         }
 178
 179         if (therm) {
 180                 ret = nvkm_therm_cstate(therm, pstate->fanspeed, +1);
 181                 if (ret && ret != -ENODEV) {
 182                         nvkm_error(subdev, "failed to raise fan speed: %d\n", ret);
 183                         return ret;
 184                 }
 185         }
 186
 187         if (volt) {
 188                 ret = nvkm_volt_set_id(volt, cstate->voltage,
 189                                        pstate->base.voltage, clk->temp, +1);
 190                 if (ret && ret != -ENODEV) {
 191                         nvkm_error(subdev, "failed to raise voltage: %d\n", ret);
 192                         return ret;
 193                 }
 194         }
 195
 196         ret = clk->func->calc(clk, cstate);
 197         if (ret == 0) {
 198                 ret = clk->func->prog(clk);
 199                 clk->func->tidy(clk);
 200         }
 201
 202         if (volt) {
 203                 ret = nvkm_volt_set_id(volt, cstate->voltage,
 204                                        pstate->base.voltage, clk->temp, -1);
 205                 if (ret && ret != -ENODEV)
 206                         nvkm_error(subdev, "failed to lower voltage: %d\n", ret);
 207         }
 208
 209         if (therm) {
 210                 ret = nvkm_therm_cstate(therm, pstate->fanspeed, -1);
 211                 if (ret && ret != -ENODEV)
 212                         nvkm_error(subdev, "failed to lower fan speed: %d\n", ret);
 213         }
 214
 215         return ret;
 216 }
 217
 218 static void
 219 nvkm_cstate_del(struct nvkm_cstate *cstate)
 220 {
 221         list_del(&cstate->head);
 222         kfree(cstate);
 223 }
 224
 225 static int
 226 nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate)
 227 {
 228         struct nvkm_bios *bios = clk->subdev.device->bios;
 229         struct nvkm_volt *volt = clk->subdev.device->volt;
 230         const struct nvkm_domain *domain = clk->domains;
 231         struct nvkm_cstate *cstate = NULL;
 232         struct nvbios_cstepX cstepX;
 233         u8  ver, hdr;
 234         u32 data;
 235
 236         data = nvbios_cstepXp(bios, idx, &ver, &hdr, &cstepX);
 237         if (!data)
 238                 return -ENOENT;
 239
 240         if (volt && nvkm_volt_map_min(volt, cstepX.voltage) > volt->max_uv)
 241                 return -EINVAL;
 242
 243         cstate = kzalloc(sizeof(*cstate), GFP_KERNEL);
 244         if (!cstate)
 245                 return -ENOMEM;
 246
 247         *cstate = pstate->base;
 248         cstate->voltage = cstepX.voltage;
 249         cstate->id = idx;
 250
 251         while (domain && domain->name != nv_clk_src_max) {
 252                 if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
 253                         u32 freq = nvkm_clk_adjust(clk, true, pstate->pstate,
 254                                                    domain->bios, cstepX.freq);
 255                         cstate->domain[domain->name] = freq;
 256                 }
 257                 domain++;
 258         }
 259
 260         list_add(&cstate->head, &pstate->list);
 261         return 0;
 262 }
 263
 264 /******************************************************************************
 265  * P-States
 266  *****************************************************************************/
 267 static int
 268 nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
 269 {
 270         struct nvkm_subdev *subdev = &clk->subdev;
 271         struct nvkm_fb *fb = subdev->device->fb;
 272         struct nvkm_pci *pci = subdev->device->pci;
 273         struct nvkm_pstate *pstate;
 274         int ret, idx = 0;
 275
 276         list_for_each_entry(pstate, &clk->states, head) {
 277                 if (idx++ == pstatei)
 278                         break;
 279         }
 280
 281         nvkm_debug(subdev, "setting performance state %d\n", pstatei);
 282         clk->pstate = pstatei;
 283
 284         nvkm_pcie_set_link(pci, pstate->pcie_speed, pstate->pcie_width);
 285
 286         if (fb && fb->ram && fb->ram->func->calc) {
 287                 struct nvkm_ram *ram = fb->ram;
 288                 int khz = pstate->base.domain[nv_clk_src_mem];
 289                 do {
 290                         ret = ram->func->calc(ram, khz);
 291                         if (ret == 0)
 292                                 ret = ram->func->prog(ram);
 293                 } while (ret > 0);
 294                 ram->func->tidy(ram);
 295         }
 296
 297         return nvkm_cstate_prog(clk, pstate, NVKM_CLK_CSTATE_HIGHEST);
 298 }
 299
 300 static void
 301 nvkm_pstate_work(struct work_struct *work)
 302 {
 303         struct nvkm_clk *clk = container_of(work, typeof(*clk), work);
 304         struct nvkm_subdev *subdev = &clk->subdev;
 305         int pstate;
 306
 307         if (!atomic_xchg(&clk->waiting, 0))
 308                 return;
 309         clk->pwrsrc = power_supply_is_system_supplied();
 310
 311         nvkm_trace(subdev, "P %d PWR %d U(AC) %d U(DC) %d A %d T %d°C D %d\n",
 312                    clk->pstate, clk->pwrsrc, clk->ustate_ac, clk->ustate_dc,
 313                    clk->astate, clk->temp, clk->dstate);
 314
 315         pstate = clk->pwrsrc ? clk->ustate_ac : clk->ustate_dc;
 316         if (clk->state_nr && pstate != -1) {
 317                 pstate = (pstate < 0) ? clk->astate : pstate;
 318                 pstate = min(pstate, clk->state_nr - 1);
 319                 pstate = max(pstate, clk->dstate);
 320         } else {
 321                 pstate = clk->pstate = -1;
 322         }
 323
 324         nvkm_trace(subdev, "-> %d\n", pstate);
 325         if (pstate != clk->pstate) {
 326                 int ret = nvkm_pstate_prog(clk, pstate);
 327                 if (ret) {
 328                         nvkm_error(subdev, "error setting pstate %d: %d\n",
 329                                    pstate, ret);
 330                 }
 331         }
 332
 333         wake_up_all(&clk->wait);
 334         nvkm_notify_get(&clk->pwrsrc_ntfy);
 335 }
 336
 337 static int
 338 nvkm_pstate_calc(struct nvkm_clk *clk, bool wait)
 339 {
 340         atomic_set(&clk->waiting, 1);
 341         schedule_work(&clk->work);
 342         if (wait)
 343                 wait_event(clk->wait, !atomic_read(&clk->waiting));
 344         return 0;
 345 }
 346
 347 static void
 348 nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate)
 349 {
 350         const struct nvkm_domain *clock = clk->domains - 1;
 351         struct nvkm_cstate *cstate;
 352         struct nvkm_subdev *subdev = &clk->subdev;
 353         char info[3][32] = { "", "", "" };
 354         char name[4] = "--";
 355         int i = -1;
 356
 357         if (pstate->pstate != 0xff)
 358                 snprintf(name, sizeof(name), "%02x", pstate->pstate);
 359
 360         while ((++clock)->name != nv_clk_src_max) {
 361                 u32 lo = pstate->base.domain[clock->name];
 362                 u32 hi = lo;
 363                 if (hi == 0)
 364                         continue;
 365
 366                 nvkm_debug(subdev, "%02x: %10d KHz\n", clock->name, lo);
 367                 list_for_each_entry(cstate, &pstate->list, head) {
 368                         u32 freq = cstate->domain[clock->name];
 369                         lo = min(lo, freq);
 370                         hi = max(hi, freq);
 371                         nvkm_debug(subdev, "%10d KHz\n", freq);
 372                 }
 373
 374                 if (clock->mname && ++i < ARRAY_SIZE(info)) {
 375                         lo /= clock->mdiv;
 376                         hi /= clock->mdiv;
 377                         if (lo == hi) {
 378                                 snprintf(info[i], sizeof(info[i]), "%s %d MHz",
 379                                          clock->mname, lo);
 380                         } else {
 381                                 snprintf(info[i], sizeof(info[i]),
 382                                          "%s %d-%d MHz", clock->mname, lo, hi);
 383                         }
 384                 }
 385         }
 386
 387         nvkm_debug(subdev, "%s: %s %s %s\n", name, info[0], info[1], info[2]);
 388 }
 389
 390 static void
 391 nvkm_pstate_del(struct nvkm_pstate *pstate)
 392 {
 393         struct nvkm_cstate *cstate, *temp;
 394
 395         list_for_each_entry_safe(cstate, temp, &pstate->list, head) {
 396                 nvkm_cstate_del(cstate);
 397         }
 398
 399         list_del(&pstate->head);
 400         kfree(pstate);
 401 }
 402
 403 static int
 404 nvkm_pstate_new(struct nvkm_clk *clk, int idx)
 405 {
 406         struct nvkm_bios *bios = clk->subdev.device->bios;
 407         const struct nvkm_domain *domain = clk->domains - 1;
 408         struct nvkm_pstate *pstate;
 409         struct nvkm_cstate *cstate;
 410         struct nvbios_cstepE cstepE;
 411         struct nvbios_perfE perfE;
 412         u8  ver, hdr, cnt, len;
 413         u32 data;
 414
 415         data = nvbios_perfEp(bios, idx, &ver, &hdr, &cnt, &len, &perfE);
 416         if (!data)
 417                 return -EINVAL;
 418         if (perfE.pstate == 0xff)
 419                 return 0;
 420
 421         pstate = kzalloc(sizeof(*pstate), GFP_KERNEL);
 422         cstate = &pstate->base;
 423         if (!pstate)
 424                 return -ENOMEM;
 425
 426         INIT_LIST_HEAD(&pstate->list);
 427
 428         pstate->pstate = perfE.pstate;
 429         pstate->fanspeed = perfE.fanspeed;
 430         pstate->pcie_speed = perfE.pcie_speed;
 431         pstate->pcie_width = perfE.pcie_width;
 432         cstate->voltage = perfE.voltage;
 433         cstate->domain[nv_clk_src_core] = perfE.core;
 434         cstate->domain[nv_clk_src_shader] = perfE.shader;
 435         cstate->domain[nv_clk_src_mem] = perfE.memory;
 436         cstate->domain[nv_clk_src_vdec] = perfE.vdec;
 437         cstate->domain[nv_clk_src_dom6] = perfE.disp;
 438
 439         while (ver >= 0x40 && (++domain)->name != nv_clk_src_max) {
 440                 struct nvbios_perfS perfS;
 441                 u8  sver = ver, shdr = hdr;
 442                 u32 perfSe = nvbios_perfSp(bios, data, domain->bios,
 443                                           &sver, &shdr, cnt, len, &perfS);
 444                 if (perfSe == 0 || sver != 0x40)
 445                         continue;
 446
 447                 if (domain->flags & NVKM_CLK_DOM_FLAG_CORE) {
 448                         perfS.v40.freq = nvkm_clk_adjust(clk, false,
 449                                                          pstate->pstate,
 450                                                          domain->bios,
 451                                                          perfS.v40.freq);
 452                 }
 453
 454                 cstate->domain[domain->name] = perfS.v40.freq;
 455         }
 456
 457         data = nvbios_cstepEm(bios, pstate->pstate, &ver, &hdr, &cstepE);
 458         if (data) {
 459                 int idx = cstepE.index;
 460                 do {
 461                         nvkm_cstate_new(clk, idx, pstate);
 462                 } while(idx--);
 463         }
 464
 465         nvkm_pstate_info(clk, pstate);
 466         list_add_tail(&pstate->head, &clk->states);
 467         clk->state_nr++;
 468         return 0;
 469 }
 470
 471 /******************************************************************************
 472  * Adjustment triggers
 473  *****************************************************************************/
 474 static int
 475 nvkm_clk_ustate_update(struct nvkm_clk *clk, int req)
 476 {
 477         struct nvkm_pstate *pstate;
 478         int i = 0;
 479
 480         if (!clk->allow_reclock)
 481                 return -ENOSYS;
 482
 483         if (req != -1 && req != -2) {
 484                 list_for_each_entry(pstate, &clk->states, head) {
 485                         if (pstate->pstate == req)
 486                                 break;
 487                         i++;
 488                 }
 489
 490                 if (pstate->pstate != req)
 491                         return -EINVAL;
 492                 req = i;
 493         }
 494
 495         return req + 2;
 496 }
 497
 498 static int
 499 nvkm_clk_nstate(struct nvkm_clk *clk, const char *mode, int arglen)
 500 {
 501         int ret = 1;
 502
 503         if (clk->allow_reclock && !strncasecmpz(mode, "auto", arglen))
 504                 return -2;
 505
 506         if (strncasecmpz(mode, "disabled", arglen)) {
 507                 char save = mode[arglen];
 508                 long v;
 509
 510                 ((char *)mode)[arglen] = '\0';
 511                 if (!kstrtol(mode, 0, &v)) {
 512                         ret = nvkm_clk_ustate_update(clk, v);
 513                         if (ret < 0)
 514                                 ret = 1;
 515                 }
 516                 ((char *)mode)[arglen] = save;
 517         }
 518
 519         return ret - 2;
 520 }
 521
 522 int
 523 nvkm_clk_ustate(struct nvkm_clk *clk, int req, int pwr)
 524 {
 525         int ret = nvkm_clk_ustate_update(clk, req);
 526         if (ret >= 0) {
 527                 if (ret -= 2, pwr) clk->ustate_ac = ret;
 528                 else               clk->ustate_dc = ret;
 529                 return nvkm_pstate_calc(clk, true);
 530         }
 531         return ret;
 532 }
 533
 534 int
 535 nvkm_clk_astate(struct nvkm_clk *clk, int req, int rel, bool wait)
 536 {
 537         if (!rel) clk->astate  = req;
 538         if ( rel) clk->astate += rel;
 539         clk->astate = min(clk->astate, clk->state_nr - 1);
 540         clk->astate = max(clk->astate, 0);
 541         return nvkm_pstate_calc(clk, wait);
 542 }
 543
 544 int
 545 nvkm_clk_tstate(struct nvkm_clk *clk, u8 temp)
 546 {
 547         if (clk->temp == temp)
 548                 return 0;
 549         clk->temp = temp;
 550         return nvkm_pstate_calc(clk, false);
 551 }
 552
 553 int
 554 nvkm_clk_dstate(struct nvkm_clk *clk, int req, int rel)
 555 {
 556         if (!rel) clk->dstate  = req;
 557         if ( rel) clk->dstate += rel;
 558         clk->dstate = min(clk->dstate, clk->state_nr - 1);
 559         clk->dstate = max(clk->dstate, 0);
 560         return nvkm_pstate_calc(clk, true);
 561 }
 562
 563 static int
 564 nvkm_clk_pwrsrc(struct nvkm_notify *notify)
 565 {
 566         struct nvkm_clk *clk =
 567                 container_of(notify, typeof(*clk), pwrsrc_ntfy);
 568         nvkm_pstate_calc(clk, false);
 569         return NVKM_NOTIFY_DROP;
 570 }
 571
 572 /******************************************************************************
 573  * subdev base class implementation
 574  *****************************************************************************/
 575
 576 int
 577 nvkm_clk_read(struct nvkm_clk *clk, enum nv_clk_src src)
 578 {
 579         return clk->func->read(clk, src);
 580 }
 581
 582 static int
 583 nvkm_clk_fini(struct nvkm_subdev *subdev, bool suspend)
 584 {
 585         struct nvkm_clk *clk = nvkm_clk(subdev);
 586         nvkm_notify_put(&clk->pwrsrc_ntfy);
 587         flush_work(&clk->work);
 588         if (clk->func->fini)
 589                 clk->func->fini(clk);
 590         return 0;
 591 }
 592
 593 static int
 594 nvkm_clk_init(struct nvkm_subdev *subdev)
 595 {
 596         struct nvkm_clk *clk = nvkm_clk(subdev);
 597         const struct nvkm_domain *clock = clk->domains;
 598         int ret;
 599
 600         memset(&clk->bstate, 0x00, sizeof(clk->bstate));
 601         INIT_LIST_HEAD(&clk->bstate.list);
 602         clk->bstate.pstate = 0xff;
 603
 604         while (clock->name != nv_clk_src_max) {
 605                 ret = nvkm_clk_read(clk, clock->name);
 606                 if (ret < 0) {
 607                         nvkm_error(subdev, "%02x freq unknown\n", clock->name);
 608                         return ret;
 609                 }
 610                 clk->bstate.base.domain[clock->name] = ret;
 611                 clock++;
 612         }
 613
 614         nvkm_pstate_info(clk, &clk->bstate);
 615
 616         if (clk->func->init)
 617                 return clk->func->init(clk);
 618
 619         clk->astate = clk->state_nr - 1;
 620         clk->dstate = 0;
 621         clk->pstate = -1;
 622         clk->temp = 90; /* reasonable default value */
 623         nvkm_pstate_calc(clk, true);
 624         return 0;
 625 }
 626
 627 static void *
 628 nvkm_clk_dtor(struct nvkm_subdev *subdev)
 629 {
 630         struct nvkm_clk *clk = nvkm_clk(subdev);
 631         struct nvkm_pstate *pstate, *temp;
 632
 633         nvkm_notify_fini(&clk->pwrsrc_ntfy);
 634
 635         /* Early return if the pstates have been provided statically */
 636         if (clk->func->pstates)
 637                 return clk;
 638
 639         list_for_each_entry_safe(pstate, temp, &clk->states, head) {
 640                 nvkm_pstate_del(pstate);
 641         }
 642
 643         return clk;
 644 }
 645
 646 static const struct nvkm_subdev_func
 647 nvkm_clk = {
 648         .dtor = nvkm_clk_dtor,
 649         .init = nvkm_clk_init,
 650         .fini = nvkm_clk_fini,
 651 };
 652
 653 int
 654 nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device,
 655               int index, bool allow_reclock, struct nvkm_clk *clk)
 656 {
 657         struct nvkm_subdev *subdev = &clk->subdev;
 658         struct nvkm_bios *bios = device->bios;
 659         int ret, idx, arglen;
 660         const char *mode;
 661         struct nvbios_vpstate_header h;
 662
 663         nvkm_subdev_ctor(&nvkm_clk, device, index, subdev);
 664
 665         if (bios && !nvbios_vpstate_parse(bios, &h)) {
 666                 struct nvbios_vpstate_entry base, boost;
 667                 if (!nvbios_vpstate_entry(bios, &h, h.boost_id, &boost))
 668                         clk->boost_khz = boost.clock_mhz * 1000;
 669                 if (!nvbios_vpstate_entry(bios, &h, h.base_id, &base))
 670                         clk->base_khz = base.clock_mhz * 1000;
 671         }
 672
 673         clk->func = func;
 674         INIT_LIST_HEAD(&clk->states);
 675         clk->domains = func->domains;
 676         clk->ustate_ac = -1;
 677         clk->ustate_dc = -1;
 678         clk->allow_reclock = allow_reclock;
 679
 680         INIT_WORK(&clk->work, nvkm_pstate_work);
 681         init_waitqueue_head(&clk->wait);
 682         atomic_set(&clk->waiting, 0);
 683
 684         /* If no pstates are provided, try and fetch them from the BIOS */
 685         if (!func->pstates) {
 686                 idx = 0;
 687                 do {
 688                         ret = nvkm_pstate_new(clk, idx++);
 689                 } while (ret == 0);
 690         } else {
 691                 for (idx = 0; idx < func->nr_pstates; idx++)
 692                         list_add_tail(&func->pstates[idx].head, &clk->states);
 693                 clk->state_nr = func->nr_pstates;
 694         }
 695
 696         ret = nvkm_notify_init(NULL, &device->event, nvkm_clk_pwrsrc, true,
 697                                NULL, 0, 0, &clk->pwrsrc_ntfy);
 698         if (ret)
 699                 return ret;
 700
 701         mode = nvkm_stropt(device->cfgopt, "NvClkMode", &arglen);
 702         if (mode) {
 703                 clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
 704                 clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
 705         }
 706
 707         mode = nvkm_stropt(device->cfgopt, "NvClkModeAC", &arglen);
 708         if (mode)
 709                 clk->ustate_ac = nvkm_clk_nstate(clk, mode, arglen);
 710
 711         mode = nvkm_stropt(device->cfgopt, "NvClkModeDC", &arglen);
 712         if (mode)
 713                 clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
 714
 715         clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost",
 716                                        NVKM_CLK_BOOST_NONE);
 717         return 0;
 718 }
 719
 720 int
 721 nvkm_clk_new_(const struct nvkm_clk_func *func, struct nvkm_device *device,
 722               int index, bool allow_reclock, struct nvkm_clk **pclk)
 723 {
 724         if (!(*pclk = kzalloc(sizeof(**pclk), GFP_KERNEL)))
 725                 return -ENOMEM;
 726         return nvkm_clk_ctor(func, device, index, allow_reclock, *pclk);
 727 }