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20 * DEALINGS IN THE SOFTWARE.
25 #include <subdev/timer.h>
27 #include <nvif/class.h>
36 gk20a_gr_av_to_init(struct gf100_gr *gr, const char *fw_name,
37 struct gf100_gr_pack **ppack)
39 struct gf100_gr_fuc fuc;
40 struct gf100_gr_init *init;
41 struct gf100_gr_pack *pack;
46 ret = gf100_gr_ctor_fw(gr, fw_name, &fuc);
50 nent = (fuc.size / sizeof(struct gk20a_fw_av));
51 pack = vzalloc((sizeof(*pack) * 2) + (sizeof(*init) * (nent + 1)));
57 init = (void *)(pack + 2);
60 for (i = 0; i < nent; i++) {
61 struct gf100_gr_init *ent = &init[i];
62 struct gk20a_fw_av *av = &((struct gk20a_fw_av *)fuc.data)[i];
73 gf100_gr_dtor_fw(&fuc);
85 gk20a_gr_aiv_to_init(struct gf100_gr *gr, const char *fw_name,
86 struct gf100_gr_pack **ppack)
88 struct gf100_gr_fuc fuc;
89 struct gf100_gr_init *init;
90 struct gf100_gr_pack *pack;
95 ret = gf100_gr_ctor_fw(gr, fw_name, &fuc);
99 nent = (fuc.size / sizeof(struct gk20a_fw_aiv));
100 pack = vzalloc((sizeof(*pack) * 2) + (sizeof(*init) * (nent + 1)));
106 init = (void *)(pack + 2);
109 for (i = 0; i < nent; i++) {
110 struct gf100_gr_init *ent = &init[i];
111 struct gk20a_fw_aiv *av = &((struct gk20a_fw_aiv *)fuc.data)[i];
113 ent->addr = av->addr;
114 ent->data = av->data;
122 gf100_gr_dtor_fw(&fuc);
127 gk20a_gr_av_to_method(struct gf100_gr *gr, const char *fw_name,
128 struct gf100_gr_pack **ppack)
130 struct gf100_gr_fuc fuc;
131 struct gf100_gr_init *init;
132 struct gf100_gr_pack *pack;
133 /* We don't suppose we will initialize more than 16 classes here... */
134 static const unsigned int max_classes = 16;
135 u32 classidx = 0, prevclass = 0;
140 ret = gf100_gr_ctor_fw(gr, fw_name, &fuc);
144 nent = (fuc.size / sizeof(struct gk20a_fw_av));
146 pack = vzalloc((sizeof(*pack) * (max_classes + 1)) +
147 (sizeof(*init) * (nent + max_classes + 1)));
153 init = (void *)(pack + max_classes + 1);
155 for (i = 0; i < nent; i++, init++) {
156 struct gk20a_fw_av *av = &((struct gk20a_fw_av *)fuc.data)[i];
157 u32 class = av->addr & 0xffff;
158 u32 addr = (av->addr & 0xffff0000) >> 14;
160 if (prevclass != class) {
161 if (prevclass) /* Add terminator to the method list. */
163 pack[classidx].init = init;
164 pack[classidx].type = class;
166 if (++classidx >= max_classes) {
174 init->data = av->data;
182 gf100_gr_dtor_fw(&fuc);
187 gk20a_gr_wait_mem_scrubbing(struct gf100_gr *gr)
189 struct nvkm_subdev *subdev = &gr->base.engine.subdev;
190 struct nvkm_device *device = subdev->device;
192 if (nvkm_msec(device, 2000,
193 if (!(nvkm_rd32(device, 0x40910c) & 0x00000006))
196 nvkm_error(subdev, "FECS mem scrubbing timeout\n");
200 if (nvkm_msec(device, 2000,
201 if (!(nvkm_rd32(device, 0x41a10c) & 0x00000006))
204 nvkm_error(subdev, "GPCCS mem scrubbing timeout\n");
212 gk20a_gr_set_hww_esr_report_mask(struct gf100_gr *gr)
214 struct nvkm_device *device = gr->base.engine.subdev.device;
215 nvkm_wr32(device, 0x419e44, 0x1ffffe);
216 nvkm_wr32(device, 0x419e4c, 0x7f);
220 gk20a_gr_init(struct gf100_gr *gr)
222 struct nvkm_device *device = gr->base.engine.subdev.device;
226 nvkm_wr32(device, 0x40802c, 0x1);
228 gf100_gr_mmio(gr, gr->fuc_sw_nonctx);
230 ret = gk20a_gr_wait_mem_scrubbing(gr);
234 ret = gf100_gr_wait_idle(gr);
238 /* MMU debug buffer */
239 if (gr->func->init_gpc_mmu)
240 gr->func->init_gpc_mmu(gr);
242 /* Set the PE as stream master */
243 nvkm_mask(device, 0x503018, 0x1, 0x1);
246 gr->func->init_zcull(gr);
248 gr->func->init_rop_active_fbps(gr);
250 /* Enable FIFO access */
251 nvkm_wr32(device, 0x400500, 0x00010001);
253 /* Enable interrupts */
254 nvkm_wr32(device, 0x400100, 0xffffffff);
255 nvkm_wr32(device, 0x40013c, 0xffffffff);
257 /* Enable FECS error interrupts */
258 nvkm_wr32(device, 0x409c24, 0x000f0000);
260 /* Enable hardware warning exceptions */
261 nvkm_wr32(device, 0x404000, 0xc0000000);
262 nvkm_wr32(device, 0x404600, 0xc0000000);
264 if (gr->func->set_hww_esr_report_mask)
265 gr->func->set_hww_esr_report_mask(gr);
267 /* Enable TPC exceptions per GPC */
268 nvkm_wr32(device, 0x419d0c, 0x2);
269 nvkm_wr32(device, 0x41ac94, (((1 << gr->tpc_total) - 1) & 0xff) << 16);
271 /* Reset and enable all exceptions */
272 nvkm_wr32(device, 0x400108, 0xffffffff);
273 nvkm_wr32(device, 0x400138, 0xffffffff);
274 nvkm_wr32(device, 0x400118, 0xffffffff);
275 nvkm_wr32(device, 0x400130, 0xffffffff);
276 nvkm_wr32(device, 0x40011c, 0xffffffff);
277 nvkm_wr32(device, 0x400134, 0xffffffff);
279 gf100_gr_zbc_init(gr);
281 return gf100_gr_init_ctxctl(gr);
284 static const struct gf100_gr_func
286 .oneinit_tiles = gf100_gr_oneinit_tiles,
287 .oneinit_sm_id = gf100_gr_oneinit_sm_id,
288 .init = gk20a_gr_init,
289 .init_zcull = gf117_gr_init_zcull,
290 .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
291 .trap_mp = gf100_gr_trap_mp,
292 .set_hww_esr_report_mask = gk20a_gr_set_hww_esr_report_mask,
293 .rops = gf100_gr_rops,
295 .grctx = &gk20a_grctx,
296 .zbc = &gf100_gr_zbc,
298 { -1, -1, FERMI_TWOD_A },
299 { -1, -1, KEPLER_INLINE_TO_MEMORY_A },
300 { -1, -1, KEPLER_C, &gf100_fermi },
301 { -1, -1, KEPLER_COMPUTE_A },
307 gk20a_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
312 if (!(gr = kzalloc(sizeof(*gr), GFP_KERNEL)))
316 ret = gf100_gr_ctor(&gk20a_gr, device, index, gr);
320 if (gf100_gr_ctor_fw(gr, "fecs_inst", &gr->fuc409c) ||
321 gf100_gr_ctor_fw(gr, "fecs_data", &gr->fuc409d) ||
322 gf100_gr_ctor_fw(gr, "gpccs_inst", &gr->fuc41ac) ||
323 gf100_gr_ctor_fw(gr, "gpccs_data", &gr->fuc41ad))
326 ret = gk20a_gr_av_to_init(gr, "sw_nonctx", &gr->fuc_sw_nonctx);
330 ret = gk20a_gr_aiv_to_init(gr, "sw_ctx", &gr->fuc_sw_ctx);
334 ret = gk20a_gr_av_to_init(gr, "sw_bundle_init", &gr->fuc_bundle);
338 ret = gk20a_gr_av_to_method(gr, "sw_method_init", &gr->fuc_method);