drivers/gpu/drm/nouveau/include/nvif/cla06f.h

   1 #ifndef __NVIF_CLA06F_H__
   2 #define __NVIF_CLA06F_H__
   3
   4 struct kepler_channel_gpfifo_a_v0 {
   5         __u8  version;
   6         __u8  pad01[5];
   7         __u16 chid;
   8 #define NVA06F_V0_ENGINE_SW                                          0x00000001
   9 #define NVA06F_V0_ENGINE_GR                                          0x00000002
  10 #define NVA06F_V0_ENGINE_SEC                                         0x00000004
  11 #define NVA06F_V0_ENGINE_MSVLD                                       0x00000010
  12 #define NVA06F_V0_ENGINE_MSPDEC                                      0x00000020
  13 #define NVA06F_V0_ENGINE_MSPPP                                       0x00000040
  14 #define NVA06F_V0_ENGINE_MSENC                                       0x00000080
  15 #define NVA06F_V0_ENGINE_VIC                                         0x00000100
  16 #define NVA06F_V0_ENGINE_NVDEC                                       0x00000200
  17 #define NVA06F_V0_ENGINE_NVENC0                                      0x00000400
  18 #define NVA06F_V0_ENGINE_NVENC1                                      0x00000800
  19 #define NVA06F_V0_ENGINE_CE0                                         0x00010000
  20 #define NVA06F_V0_ENGINE_CE1                                         0x00020000
  21 #define NVA06F_V0_ENGINE_CE2                                         0x00040000
  22         __u32 engines;
  23         __u32 ilength;
  24         __u64 ioffset;
  25         __u64 vm;
  26 };
  27
  28 #define NVA06F_V0_NTFY_UEVENT                                              0x00
  29 #endif