drivers/gpu/drm/nouveau/dispnv50/atom.h

   1 #ifndef __NV50_KMS_ATOM_H__
   2 #define __NV50_KMS_ATOM_H__
   3 #define nv50_atom(p) container_of((p), struct nv50_atom, state)
   4 #include <drm/drm_atomic.h>
   5
   6 struct nv50_atom {
   7         struct drm_atomic_state state;
   8
   9         struct list_head outp;
  10         bool lock_core;
  11         bool flush_disable;
  12 };
  13
  14 #define nv50_head_atom(p) container_of((p), struct nv50_head_atom, state)
  15
  16 struct nv50_head_atom {
  17         struct drm_crtc_state state;
  18
  19         struct {
  20                 u32 mask;
  21                 u32 olut;
  22         } wndw;
  23
  24         struct {
  25                 u16 iW;
  26                 u16 iH;
  27                 u16 oW;
  28                 u16 oH;
  29         } view;
  30
  31         struct nv50_head_mode {
  32                 bool interlace;
  33                 u32 clock;
  34                 struct {
  35                         u16 active;
  36                         u16 synce;
  37                         u16 blanke;
  38                         u16 blanks;
  39                 } h;
  40                 struct {
  41                         u32 active;
  42                         u16 synce;
  43                         u16 blanke;
  44                         u16 blanks;
  45                         u16 blank2s;
  46                         u16 blank2e;
  47                         u16 blankus;
  48                 } v;
  49         } mode;
  50
  51         struct {
  52                 bool visible;
  53                 u32 handle;
  54                 u64 offset:40;
  55                 u8 buffer:1;
  56                 u8 mode:4;
  57                 u8 size:2;
  58                 u8 range:2;
  59                 u8 output_mode:2;
  60         } olut;
  61
  62         struct {
  63                 bool visible;
  64                 u32 handle;
  65                 u64 offset:40;
  66                 u8  format;
  67                 u8  kind:7;
  68                 u8  layout:1;
  69                 u8  blockh:4;
  70                 u16 blocks:12;
  71                 u32 pitch:20;
  72                 u16 x;
  73                 u16 y;
  74                 u16 w;
  75                 u16 h;
  76         } core;
  77
  78         struct {
  79                 bool visible;
  80                 u32 handle;
  81                 u64 offset:40;
  82                 u8  layout:2;
  83                 u8  format:8;
  84         } curs;
  85
  86         struct {
  87                 u8  depth;
  88                 u8  cpp;
  89                 u16 x;
  90                 u16 y;
  91                 u16 w;
  92                 u16 h;
  93         } base;
  94
  95         struct {
  96                 u8 cpp;
  97         } ovly;
  98
  99         struct {
 100                 bool enable:1;
 101                 u8 bits:2;
 102                 u8 mode:4;
 103         } dither;
 104
 105         struct {
 106                 struct {
 107                         u16 cos:12;
 108                         u16 sin:12;
 109                 } sat;
 110         } procamp;
 111
 112         struct {
 113                 u8 nhsync:1;
 114                 u8 nvsync:1;
 115                 u8 depth:4;
 116         } or;
 117
 118         union nv50_head_atom_mask {
 119                 struct {
 120                         bool olut:1;
 121                         bool core:1;
 122                         bool curs:1;
 123                         bool view:1;
 124                         bool mode:1;
 125                         bool base:1;
 126                         bool ovly:1;
 127                         bool dither:1;
 128                         bool procamp:1;
 129                         bool or:1;
 130                 };
 131                 u16 mask;
 132         } set, clr;
 133 };
 134
 135 static inline struct nv50_head_atom *
 136 nv50_head_atom_get(struct drm_atomic_state *state, struct drm_crtc *crtc)
 137 {
 138         struct drm_crtc_state *statec = drm_atomic_get_crtc_state(state, crtc);
 139         if (IS_ERR(statec))
 140                 return (void *)statec;
 141         return nv50_head_atom(statec);
 142 }
 143
 144 #define nv50_wndw_atom(p) container_of((p), struct nv50_wndw_atom, state)
 145
 146 struct nv50_wndw_atom {
 147         struct drm_plane_state state;
 148
 149         struct drm_property_blob *ilut;
 150         bool visible;
 151
 152         struct {
 153                 u32  handle;
 154                 u16  offset:12;
 155                 bool awaken:1;
 156         } ntfy;
 157
 158         struct {
 159                 u32 handle;
 160                 u16 offset:12;
 161                 u32 acquire;
 162                 u32 release;
 163         } sema;
 164
 165         struct {
 166                 u32 handle;
 167                 struct {
 168                         u64 offset:40;
 169                         u8  buffer:1;
 170                         u8  enable:2;
 171                         u8  mode:4;
 172                         u8  size:2;
 173                         u8  range:2;
 174                         u8  output_mode:2;
 175                 } i;
 176         } xlut;
 177
 178         struct {
 179                 u8  mode:2;
 180                 u8  interval:4;
 181
 182                 u8  colorspace:2;
 183                 u8  format;
 184                 u8  kind:7;
 185                 u8  layout:1;
 186                 u8  blockh:4;
 187                 u16 blocks[3];
 188                 u32 pitch[3];
 189                 u16 w;
 190                 u16 h;
 191
 192                 u32 handle[6];
 193                 u64 offset[6];
 194         } image;
 195
 196         struct {
 197                 u16 sx;
 198                 u16 sy;
 199                 u16 sw;
 200                 u16 sh;
 201                 u16 dw;
 202                 u16 dh;
 203         } scale;
 204
 205         struct {
 206                 u16 x;
 207                 u16 y;
 208         } point;
 209
 210         union nv50_wndw_atom_mask {
 211                 struct {
 212                         bool ntfy:1;
 213                         bool sema:1;
 214                         bool xlut:1;
 215                         bool image:1;
 216                         bool scale:1;
 217                         bool point:1;
 218                 };
 219                 u8 mask;
 220         } set, clr;
 221 };
 222 #endif