2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #define DOWN_SCALE_MAX 8
21 #define UP_SCALE_MAX 8
24 struct drm_plane base;
35 #define to_mdp4_plane(x) container_of(x, struct mdp4_plane, base)
37 /* MDP format helper functions */
39 enum mdp4_frame_format mdp4_get_frame_format(struct drm_framebuffer *fb)
43 if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
46 if (fb->format->format == DRM_FORMAT_NV12 && is_tile)
47 return FRAME_TILE_YCBCR_420;
52 static void mdp4_plane_set_scanout(struct drm_plane *plane,
53 struct drm_framebuffer *fb);
54 static int mdp4_plane_mode_set(struct drm_plane *plane,
55 struct drm_crtc *crtc, struct drm_framebuffer *fb,
56 int crtc_x, int crtc_y,
57 unsigned int crtc_w, unsigned int crtc_h,
58 uint32_t src_x, uint32_t src_y,
59 uint32_t src_w, uint32_t src_h);
61 static struct mdp4_kms *get_kms(struct drm_plane *plane)
63 struct msm_drm_private *priv = plane->dev->dev_private;
64 return to_mdp4_kms(to_mdp_kms(priv->kms));
67 static void mdp4_plane_destroy(struct drm_plane *plane)
69 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
71 drm_plane_helper_disable(plane, NULL);
72 drm_plane_cleanup(plane);
77 /* helper to install properties which are common to planes and crtcs */
78 static void mdp4_plane_install_properties(struct drm_plane *plane,
79 struct drm_mode_object *obj)
84 static int mdp4_plane_set_property(struct drm_plane *plane,
85 struct drm_property *property, uint64_t val)
91 static const struct drm_plane_funcs mdp4_plane_funcs = {
92 .update_plane = drm_atomic_helper_update_plane,
93 .disable_plane = drm_atomic_helper_disable_plane,
94 .destroy = mdp4_plane_destroy,
95 .set_property = mdp4_plane_set_property,
96 .reset = drm_atomic_helper_plane_reset,
97 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
98 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
101 static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
102 struct drm_plane_state *old_state)
104 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
105 struct mdp4_kms *mdp4_kms = get_kms(plane);
106 struct msm_kms *kms = &mdp4_kms->base.base;
107 struct drm_framebuffer *fb = old_state->fb;
112 DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
113 msm_framebuffer_cleanup(fb, kms->aspace);
117 static int mdp4_plane_atomic_check(struct drm_plane *plane,
118 struct drm_plane_state *state)
123 static void mdp4_plane_atomic_update(struct drm_plane *plane,
124 struct drm_plane_state *old_state)
126 struct drm_plane_state *state = plane->state;
129 ret = mdp4_plane_mode_set(plane,
130 state->crtc, state->fb,
131 state->crtc_x, state->crtc_y,
132 state->crtc_w, state->crtc_h,
133 state->src_x, state->src_y,
134 state->src_w, state->src_h);
135 /* atomic_check should have ensured that this doesn't fail */
139 static const struct drm_plane_helper_funcs mdp4_plane_helper_funcs = {
140 .prepare_fb = msm_atomic_prepare_fb,
141 .cleanup_fb = mdp4_plane_cleanup_fb,
142 .atomic_check = mdp4_plane_atomic_check,
143 .atomic_update = mdp4_plane_atomic_update,
146 static void mdp4_plane_set_scanout(struct drm_plane *plane,
147 struct drm_framebuffer *fb)
149 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
150 struct mdp4_kms *mdp4_kms = get_kms(plane);
151 struct msm_kms *kms = &mdp4_kms->base.base;
152 enum mdp4_pipe pipe = mdp4_plane->pipe;
154 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
155 MDP4_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
156 MDP4_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
158 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_B(pipe),
159 MDP4_PIPE_SRC_STRIDE_B_P2(fb->pitches[2]) |
160 MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
162 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
163 msm_framebuffer_iova(fb, kms->aspace, 0));
164 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
165 msm_framebuffer_iova(fb, kms->aspace, 1));
166 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
167 msm_framebuffer_iova(fb, kms->aspace, 2));
168 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
169 msm_framebuffer_iova(fb, kms->aspace, 3));
172 static void mdp4_write_csc_config(struct mdp4_kms *mdp4_kms,
173 enum mdp4_pipe pipe, struct csc_cfg *csc)
177 for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {
178 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_MV(pipe, i),
182 for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {
183 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_BV(pipe, i),
186 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_BV(pipe, i),
190 for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {
191 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_PRE_LV(pipe, i),
194 mdp4_write(mdp4_kms, REG_MDP4_PIPE_CSC_POST_LV(pipe, i),
199 #define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000
201 static int mdp4_plane_mode_set(struct drm_plane *plane,
202 struct drm_crtc *crtc, struct drm_framebuffer *fb,
203 int crtc_x, int crtc_y,
204 unsigned int crtc_w, unsigned int crtc_h,
205 uint32_t src_x, uint32_t src_y,
206 uint32_t src_w, uint32_t src_h)
208 struct drm_device *dev = plane->dev;
209 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
210 struct mdp4_kms *mdp4_kms = get_kms(plane);
211 enum mdp4_pipe pipe = mdp4_plane->pipe;
212 const struct mdp_format *format;
213 uint32_t op_mode = 0;
214 uint32_t phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
215 uint32_t phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
216 enum mdp4_frame_format frame_type;
219 DBG("%s: disabled!", mdp4_plane->name);
223 frame_type = mdp4_get_frame_format(fb);
225 /* src values are in Q16 fixed point, convert to integer: */
231 DBG("%s: FB[%u] %u,%u,%u,%u -> CRTC[%u] %d,%d,%u,%u", mdp4_plane->name,
232 fb->base.id, src_x, src_y, src_w, src_h,
233 crtc->base.id, crtc_x, crtc_y, crtc_w, crtc_h);
235 format = to_mdp_format(msm_framebuffer_format(fb));
237 if (src_w > (crtc_w * DOWN_SCALE_MAX)) {
238 dev_err(dev->dev, "Width down scaling exceeds limits!\n");
242 if (src_h > (crtc_h * DOWN_SCALE_MAX)) {
243 dev_err(dev->dev, "Height down scaling exceeds limits!\n");
247 if (crtc_w > (src_w * UP_SCALE_MAX)) {
248 dev_err(dev->dev, "Width up scaling exceeds limits!\n");
252 if (crtc_h > (src_h * UP_SCALE_MAX)) {
253 dev_err(dev->dev, "Height up scaling exceeds limits!\n");
257 if (src_w != crtc_w) {
258 uint32_t sel_unit = SCALE_FIR;
259 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_EN;
261 if (MDP_FORMAT_IS_YUV(format)) {
263 sel_unit = SCALE_PIXEL_RPT;
264 else if (crtc_w <= (src_w / 4))
265 sel_unit = SCALE_MN_PHASE;
267 op_mode |= MDP4_PIPE_OP_MODE_SCALEX_UNIT_SEL(sel_unit);
268 phasex_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
273 if (src_h != crtc_h) {
274 uint32_t sel_unit = SCALE_FIR;
275 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_EN;
277 if (MDP_FORMAT_IS_YUV(format)) {
280 sel_unit = SCALE_PIXEL_RPT;
281 else if (crtc_h <= (src_h / 4))
282 sel_unit = SCALE_MN_PHASE;
284 op_mode |= MDP4_PIPE_OP_MODE_SCALEY_UNIT_SEL(sel_unit);
285 phasey_step = mult_frac(MDP4_VG_PHASE_STEP_DEFAULT,
290 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_SIZE(pipe),
291 MDP4_PIPE_SRC_SIZE_WIDTH(src_w) |
292 MDP4_PIPE_SRC_SIZE_HEIGHT(src_h));
294 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_XY(pipe),
295 MDP4_PIPE_SRC_XY_X(src_x) |
296 MDP4_PIPE_SRC_XY_Y(src_y));
298 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_SIZE(pipe),
299 MDP4_PIPE_DST_SIZE_WIDTH(crtc_w) |
300 MDP4_PIPE_DST_SIZE_HEIGHT(crtc_h));
302 mdp4_write(mdp4_kms, REG_MDP4_PIPE_DST_XY(pipe),
303 MDP4_PIPE_DST_XY_X(crtc_x) |
304 MDP4_PIPE_DST_XY_Y(crtc_y));
306 mdp4_plane_set_scanout(plane, fb);
308 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_FORMAT(pipe),
309 MDP4_PIPE_SRC_FORMAT_A_BPC(format->bpc_a) |
310 MDP4_PIPE_SRC_FORMAT_R_BPC(format->bpc_r) |
311 MDP4_PIPE_SRC_FORMAT_G_BPC(format->bpc_g) |
312 MDP4_PIPE_SRC_FORMAT_B_BPC(format->bpc_b) |
313 COND(format->alpha_enable, MDP4_PIPE_SRC_FORMAT_ALPHA_ENABLE) |
314 MDP4_PIPE_SRC_FORMAT_CPP(format->cpp - 1) |
315 MDP4_PIPE_SRC_FORMAT_UNPACK_COUNT(format->unpack_count - 1) |
316 MDP4_PIPE_SRC_FORMAT_FETCH_PLANES(format->fetch_type) |
317 MDP4_PIPE_SRC_FORMAT_CHROMA_SAMP(format->chroma_sample) |
318 MDP4_PIPE_SRC_FORMAT_FRAME_FORMAT(frame_type) |
319 COND(format->unpack_tight, MDP4_PIPE_SRC_FORMAT_UNPACK_TIGHT));
321 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_UNPACK(pipe),
322 MDP4_PIPE_SRC_UNPACK_ELEM0(format->unpack[0]) |
323 MDP4_PIPE_SRC_UNPACK_ELEM1(format->unpack[1]) |
324 MDP4_PIPE_SRC_UNPACK_ELEM2(format->unpack[2]) |
325 MDP4_PIPE_SRC_UNPACK_ELEM3(format->unpack[3]));
327 if (MDP_FORMAT_IS_YUV(format)) {
328 struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);
330 op_mode |= MDP4_PIPE_OP_MODE_SRC_YCBCR;
331 op_mode |= MDP4_PIPE_OP_MODE_CSC_EN;
332 mdp4_write_csc_config(mdp4_kms, pipe, csc);
335 mdp4_write(mdp4_kms, REG_MDP4_PIPE_OP_MODE(pipe), op_mode);
336 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEX_STEP(pipe), phasex_step);
337 mdp4_write(mdp4_kms, REG_MDP4_PIPE_PHASEY_STEP(pipe), phasey_step);
339 if (frame_type != FRAME_LINEAR)
340 mdp4_write(mdp4_kms, REG_MDP4_PIPE_SSTILE_FRAME_SIZE(pipe),
341 MDP4_PIPE_SSTILE_FRAME_SIZE_WIDTH(src_w) |
342 MDP4_PIPE_SSTILE_FRAME_SIZE_HEIGHT(src_h));
347 static const char *pipe_names[] = {
349 "RGB1", "RGB2", "RGB3",
353 enum mdp4_pipe mdp4_plane_pipe(struct drm_plane *plane)
355 struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
356 return mdp4_plane->pipe;
359 static const uint64_t supported_format_modifiers[] = {
360 DRM_FORMAT_MOD_SAMSUNG_64_32_TILE,
361 DRM_FORMAT_MOD_LINEAR,
362 DRM_FORMAT_MOD_INVALID
365 /* initialize plane */
366 struct drm_plane *mdp4_plane_init(struct drm_device *dev,
367 enum mdp4_pipe pipe_id, bool private_plane)
369 struct drm_plane *plane = NULL;
370 struct mdp4_plane *mdp4_plane;
372 enum drm_plane_type type;
374 mdp4_plane = kzalloc(sizeof(*mdp4_plane), GFP_KERNEL);
380 plane = &mdp4_plane->base;
382 mdp4_plane->pipe = pipe_id;
383 mdp4_plane->name = pipe_names[pipe_id];
384 mdp4_plane->caps = mdp4_pipe_caps(pipe_id);
386 mdp4_plane->nformats = mdp_get_formats(mdp4_plane->formats,
387 ARRAY_SIZE(mdp4_plane->formats),
388 !pipe_supports_yuv(mdp4_plane->caps));
390 type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
391 ret = drm_universal_plane_init(dev, plane, 0xff, &mdp4_plane_funcs,
392 mdp4_plane->formats, mdp4_plane->nformats,
393 supported_format_modifiers, type, NULL);
397 drm_plane_helper_add(plane, &mdp4_plane_helper_funcs);
399 mdp4_plane_install_properties(plane, &plane->base);
405 mdp4_plane_destroy(plane);