1 /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
13 #if !defined(_DPU_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ)
16 #include <linux/stringify.h>
17 #include <linux/types.h>
18 #include <linux/tracepoint.h>
20 #include <drm/drm_rect.h>
22 #include "dpu_encoder_phys.h"
23 #include "dpu_hw_mdss.h"
24 #include "dpu_hw_vbif.h"
25 #include "dpu_plane.h"
28 #define TRACE_SYSTEM dpu
29 #undef TRACE_INCLUDE_FILE
30 #define TRACE_INCLUDE_FILE dpu_trace
32 TRACE_EVENT(dpu_perf_set_qos_luts,
33 TP_PROTO(u32 pnum, u32 fmt, bool rt, u32 fl,
34 u32 lut, u32 lut_usage),
35 TP_ARGS(pnum, fmt, rt, fl, lut, lut_usage),
42 __field(u32, lut_usage)
50 __entry->lut_usage = lut_usage;
52 TP_printk("pnum=%d fmt=%x rt=%d fl=%d lut=0x%llx lut_usage=%d",
53 __entry->pnum, __entry->fmt,
54 __entry->rt, __entry->fl,
55 __entry->lut, __entry->lut_usage)
58 TRACE_EVENT(dpu_perf_set_danger_luts,
59 TP_PROTO(u32 pnum, u32 fmt, u32 mode, u32 danger_lut,
61 TP_ARGS(pnum, fmt, mode, danger_lut, safe_lut),
66 __field(u32, danger_lut)
67 __field(u32, safe_lut)
73 __entry->danger_lut = danger_lut;
74 __entry->safe_lut = safe_lut;
76 TP_printk("pnum=%d fmt=%x mode=%d luts[0x%x, 0x%x]",
77 __entry->pnum, __entry->fmt,
78 __entry->mode, __entry->danger_lut,
82 TRACE_EVENT(dpu_perf_set_ot,
83 TP_PROTO(u32 pnum, u32 xin_id, u32 rd_lim, u32 vbif_idx),
84 TP_ARGS(pnum, xin_id, rd_lim, vbif_idx),
89 __field(u32, vbif_idx)
93 __entry->xin_id = xin_id;
94 __entry->rd_lim = rd_lim;
95 __entry->vbif_idx = vbif_idx;
97 TP_printk("pnum:%d xin_id:%d ot:%d vbif:%d",
98 __entry->pnum, __entry->xin_id, __entry->rd_lim,
102 TRACE_EVENT(dpu_perf_update_bus,
103 TP_PROTO(int client, unsigned long long ab_quota,
104 unsigned long long ib_quota),
105 TP_ARGS(client, ab_quota, ib_quota),
108 __field(u64, ab_quota)
109 __field(u64, ib_quota)
112 __entry->client = client;
113 __entry->ab_quota = ab_quota;
114 __entry->ib_quota = ib_quota;
116 TP_printk("Request client:%d ab=%llu ib=%llu",
123 TRACE_EVENT(dpu_cmd_release_bw,
124 TP_PROTO(u32 crtc_id),
127 __field(u32, crtc_id)
130 __entry->crtc_id = crtc_id;
132 TP_printk("crtc:%d", __entry->crtc_id)
135 TRACE_EVENT(tracing_mark_write,
136 TP_PROTO(int pid, const char *name, bool trace_begin),
137 TP_ARGS(pid, name, trace_begin),
140 __string(trace_name, name)
141 __field(bool, trace_begin)
145 __assign_str(trace_name, name);
146 __entry->trace_begin = trace_begin;
148 TP_printk("%s|%d|%s", __entry->trace_begin ? "B" : "E",
149 __entry->pid, __get_str(trace_name))
152 TRACE_EVENT(dpu_trace_counter,
153 TP_PROTO(int pid, char *name, int value),
154 TP_ARGS(pid, name, value),
157 __string(counter_name, name)
161 __entry->pid = current->tgid;
162 __assign_str(counter_name, name);
163 __entry->value = value;
165 TP_printk("%d|%s|%d", __entry->pid,
166 __get_str(counter_name), __entry->value)
169 TRACE_EVENT(dpu_perf_crtc_update,
170 TP_PROTO(u32 crtc, u64 bw_ctl_mnoc, u64 bw_ctl_llcc,
171 u64 bw_ctl_ebi, u32 core_clk_rate,
172 bool stop_req, u32 update_bus, u32 update_clk),
173 TP_ARGS(crtc, bw_ctl_mnoc, bw_ctl_llcc, bw_ctl_ebi, core_clk_rate,
174 stop_req, update_bus, update_clk),
177 __field(u64, bw_ctl_mnoc)
178 __field(u64, bw_ctl_llcc)
179 __field(u64, bw_ctl_ebi)
180 __field(u32, core_clk_rate)
181 __field(bool, stop_req)
182 __field(u32, update_bus)
183 __field(u32, update_clk)
186 __entry->crtc = crtc;
187 __entry->bw_ctl_mnoc = bw_ctl_mnoc;
188 __entry->bw_ctl_llcc = bw_ctl_llcc;
189 __entry->bw_ctl_ebi = bw_ctl_ebi;
190 __entry->core_clk_rate = core_clk_rate;
191 __entry->stop_req = stop_req;
192 __entry->update_bus = update_bus;
193 __entry->update_clk = update_clk;
196 "crtc=%d bw_mnoc=%llu bw_llcc=%llu bw_ebi=%llu clk_rate=%u stop_req=%d u_bus=%d u_clk=%d",
198 __entry->bw_ctl_mnoc,
199 __entry->bw_ctl_llcc,
201 __entry->core_clk_rate,
207 DECLARE_EVENT_CLASS(dpu_enc_irq_template,
208 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx,
210 TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx),
212 __field( uint32_t, drm_id )
213 __field( enum dpu_intr_idx, intr_idx )
214 __field( int, hw_idx )
215 __field( int, irq_idx )
218 __entry->drm_id = drm_id;
219 __entry->intr_idx = intr_idx;
220 __entry->hw_idx = hw_idx;
221 __entry->irq_idx = irq_idx;
223 TP_printk("id=%u, intr=%d, hw=%d, irq=%d",
224 __entry->drm_id, __entry->intr_idx, __entry->hw_idx,
227 DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_register_success,
228 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx,
230 TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx)
232 DEFINE_EVENT(dpu_enc_irq_template, dpu_enc_irq_unregister_success,
233 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx,
235 TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx)
238 TRACE_EVENT(dpu_enc_irq_wait_success,
239 TP_PROTO(uint32_t drm_id, enum dpu_intr_idx intr_idx, int hw_idx,
240 int irq_idx, enum dpu_pingpong pp_idx, int atomic_cnt),
241 TP_ARGS(drm_id, intr_idx, hw_idx, irq_idx, pp_idx, atomic_cnt),
243 __field( uint32_t, drm_id )
244 __field( enum dpu_intr_idx, intr_idx )
245 __field( int, hw_idx )
246 __field( int, irq_idx )
247 __field( enum dpu_pingpong, pp_idx )
248 __field( int, atomic_cnt )
251 __entry->drm_id = drm_id;
252 __entry->intr_idx = intr_idx;
253 __entry->hw_idx = hw_idx;
254 __entry->irq_idx = irq_idx;
255 __entry->pp_idx = pp_idx;
256 __entry->atomic_cnt = atomic_cnt;
258 TP_printk("id=%u, intr=%d, hw=%d, irq=%d, pp=%d, atomic_cnt=%d",
259 __entry->drm_id, __entry->intr_idx, __entry->hw_idx,
260 __entry->irq_idx, __entry->pp_idx, __entry->atomic_cnt)
263 DECLARE_EVENT_CLASS(dpu_drm_obj_template,
264 TP_PROTO(uint32_t drm_id),
267 __field( uint32_t, drm_id )
270 __entry->drm_id = drm_id;
272 TP_printk("id=%u", __entry->drm_id)
274 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_atomic_check,
275 TP_PROTO(uint32_t drm_id),
278 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_mode_set,
279 TP_PROTO(uint32_t drm_id),
282 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_disable,
283 TP_PROTO(uint32_t drm_id),
286 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_kickoff,
287 TP_PROTO(uint32_t drm_id),
290 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff,
291 TP_PROTO(uint32_t drm_id),
294 DEFINE_EVENT(dpu_drm_obj_template, dpu_enc_prepare_kickoff_reset,
295 TP_PROTO(uint32_t drm_id),
298 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_flip,
299 TP_PROTO(uint32_t drm_id),
302 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_vblank_cb,
303 TP_PROTO(uint32_t drm_id),
306 DEFINE_EVENT(dpu_drm_obj_template, dpu_crtc_complete_commit,
307 TP_PROTO(uint32_t drm_id),
310 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_enc_enable,
311 TP_PROTO(uint32_t drm_id),
314 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_commit,
315 TP_PROTO(uint32_t drm_id),
318 DEFINE_EVENT(dpu_drm_obj_template, dpu_kms_wait_for_commit_done,
319 TP_PROTO(uint32_t drm_id),
323 TRACE_EVENT(dpu_enc_enable,
324 TP_PROTO(uint32_t drm_id, int hdisplay, int vdisplay),
325 TP_ARGS(drm_id, hdisplay, vdisplay),
327 __field( uint32_t, drm_id )
328 __field( int, hdisplay )
329 __field( int, vdisplay )
332 __entry->drm_id = drm_id;
333 __entry->hdisplay = hdisplay;
334 __entry->vdisplay = vdisplay;
336 TP_printk("id=%u, mode=%dx%d",
337 __entry->drm_id, __entry->hdisplay, __entry->vdisplay)
340 DECLARE_EVENT_CLASS(dpu_enc_keyval_template,
341 TP_PROTO(uint32_t drm_id, int val),
342 TP_ARGS(drm_id, val),
344 __field( uint32_t, drm_id )
348 __entry->drm_id = drm_id;
351 TP_printk("id=%u, val=%d", __entry->drm_id, __entry->val)
353 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_underrun_cb,
354 TP_PROTO(uint32_t drm_id, int count),
355 TP_ARGS(drm_id, count)
357 DEFINE_EVENT(dpu_enc_keyval_template, dpu_enc_trigger_start,
358 TP_PROTO(uint32_t drm_id, int ctl_idx),
359 TP_ARGS(drm_id, ctl_idx)
362 TRACE_EVENT(dpu_enc_atomic_check_flags,
363 TP_PROTO(uint32_t drm_id, unsigned int flags, int private_flags),
364 TP_ARGS(drm_id, flags, private_flags),
366 __field( uint32_t, drm_id )
367 __field( unsigned int, flags )
368 __field( int, private_flags )
371 __entry->drm_id = drm_id;
372 __entry->flags = flags;
373 __entry->private_flags = private_flags;
375 TP_printk("id=%u, flags=%u, private_flags=%d",
376 __entry->drm_id, __entry->flags, __entry->private_flags)
379 DECLARE_EVENT_CLASS(dpu_enc_id_enable_template,
380 TP_PROTO(uint32_t drm_id, bool enable),
381 TP_ARGS(drm_id, enable),
383 __field( uint32_t, drm_id )
384 __field( bool, enable )
387 __entry->drm_id = drm_id;
388 __entry->enable = enable;
390 TP_printk("id=%u, enable=%s",
391 __entry->drm_id, __entry->enable ? "true" : "false")
393 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_rc_helper,
394 TP_PROTO(uint32_t drm_id, bool enable),
395 TP_ARGS(drm_id, enable)
397 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_vblank_cb,
398 TP_PROTO(uint32_t drm_id, bool enable),
399 TP_ARGS(drm_id, enable)
401 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_frame_event_cb,
402 TP_PROTO(uint32_t drm_id, bool enable),
403 TP_ARGS(drm_id, enable)
405 DEFINE_EVENT(dpu_enc_id_enable_template, dpu_enc_phys_cmd_connect_te,
406 TP_PROTO(uint32_t drm_id, bool enable),
407 TP_ARGS(drm_id, enable)
410 TRACE_EVENT(dpu_enc_rc,
411 TP_PROTO(uint32_t drm_id, u32 sw_event, bool idle_pc_supported,
412 int rc_state, const char *stage),
413 TP_ARGS(drm_id, sw_event, idle_pc_supported, rc_state, stage),
415 __field( uint32_t, drm_id )
416 __field( u32, sw_event )
417 __field( bool, idle_pc_supported )
418 __field( int, rc_state )
419 __string( stage_str, stage )
422 __entry->drm_id = drm_id;
423 __entry->sw_event = sw_event;
424 __entry->idle_pc_supported = idle_pc_supported;
425 __entry->rc_state = rc_state;
426 __assign_str(stage_str, stage);
428 TP_printk("%s: id:%u, sw_event:%d, idle_pc_supported:%s, rc_state:%d\n",
429 __get_str(stage_str), __entry->drm_id, __entry->sw_event,
430 __entry->idle_pc_supported ? "true" : "false",
434 TRACE_EVENT(dpu_enc_frame_done_cb_not_busy,
435 TP_PROTO(uint32_t drm_id, u32 event, enum dpu_intf intf_idx),
436 TP_ARGS(drm_id, event, intf_idx),
438 __field( uint32_t, drm_id )
439 __field( u32, event )
440 __field( enum dpu_intf, intf_idx )
443 __entry->drm_id = drm_id;
444 __entry->event = event;
445 __entry->intf_idx = intf_idx;
447 TP_printk("id=%u, event=%u, intf=%d", __entry->drm_id, __entry->event,
451 TRACE_EVENT(dpu_enc_frame_done_cb,
452 TP_PROTO(uint32_t drm_id, unsigned int idx,
453 unsigned long frame_busy_mask),
454 TP_ARGS(drm_id, idx, frame_busy_mask),
456 __field( uint32_t, drm_id )
457 __field( unsigned int, idx )
458 __field( unsigned long, frame_busy_mask )
461 __entry->drm_id = drm_id;
463 __entry->frame_busy_mask = frame_busy_mask;
465 TP_printk("id=%u, idx=%u, frame_busy_mask=%lx", __entry->drm_id,
466 __entry->idx, __entry->frame_busy_mask)
469 TRACE_EVENT(dpu_enc_trigger_flush,
470 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx,
471 int pending_kickoff_cnt, int ctl_idx, u32 pending_flush_ret),
472 TP_ARGS(drm_id, intf_idx, pending_kickoff_cnt, ctl_idx,
475 __field( uint32_t, drm_id )
476 __field( enum dpu_intf, intf_idx )
477 __field( int, pending_kickoff_cnt )
478 __field( int, ctl_idx )
479 __field( u32, pending_flush_ret )
482 __entry->drm_id = drm_id;
483 __entry->intf_idx = intf_idx;
484 __entry->pending_kickoff_cnt = pending_kickoff_cnt;
485 __entry->ctl_idx = ctl_idx;
486 __entry->pending_flush_ret = pending_flush_ret;
488 TP_printk("id=%u, intf_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d "
489 "pending_flush_ret=%u", __entry->drm_id,
490 __entry->intf_idx, __entry->pending_kickoff_cnt,
491 __entry->ctl_idx, __entry->pending_flush_ret)
494 DECLARE_EVENT_CLASS(dpu_enc_ktime_template,
495 TP_PROTO(uint32_t drm_id, ktime_t time),
496 TP_ARGS(drm_id, time),
498 __field( uint32_t, drm_id )
499 __field( ktime_t, time )
502 __entry->drm_id = drm_id;
503 __entry->time = time;
505 TP_printk("id=%u, time=%lld", __entry->drm_id,
506 ktime_to_ms(__entry->time))
508 DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_vsync_event_work,
509 TP_PROTO(uint32_t drm_id, ktime_t time),
510 TP_ARGS(drm_id, time)
512 DEFINE_EVENT(dpu_enc_ktime_template, dpu_enc_early_kickoff,
513 TP_PROTO(uint32_t drm_id, ktime_t time),
514 TP_ARGS(drm_id, time)
517 DECLARE_EVENT_CLASS(dpu_id_event_template,
518 TP_PROTO(uint32_t drm_id, u32 event),
519 TP_ARGS(drm_id, event),
521 __field( uint32_t, drm_id )
522 __field( u32, event )
525 __entry->drm_id = drm_id;
526 __entry->event = event;
528 TP_printk("id=%u, event=%u", __entry->drm_id, __entry->event)
530 DEFINE_EVENT(dpu_id_event_template, dpu_enc_frame_done_timeout,
531 TP_PROTO(uint32_t drm_id, u32 event),
532 TP_ARGS(drm_id, event)
534 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_cb,
535 TP_PROTO(uint32_t drm_id, u32 event),
536 TP_ARGS(drm_id, event)
538 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_handle_power_event,
539 TP_PROTO(uint32_t drm_id, u32 event),
540 TP_ARGS(drm_id, event)
542 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_done,
543 TP_PROTO(uint32_t drm_id, u32 event),
544 TP_ARGS(drm_id, event)
546 DEFINE_EVENT(dpu_id_event_template, dpu_crtc_frame_event_more_pending,
547 TP_PROTO(uint32_t drm_id, u32 event),
548 TP_ARGS(drm_id, event)
551 TRACE_EVENT(dpu_enc_wait_event_timeout,
552 TP_PROTO(uint32_t drm_id, int32_t hw_id, int rc, s64 time,
553 s64 expected_time, int atomic_cnt),
554 TP_ARGS(drm_id, hw_id, rc, time, expected_time, atomic_cnt),
556 __field( uint32_t, drm_id )
557 __field( int32_t, hw_id )
560 __field( s64, expected_time )
561 __field( int, atomic_cnt )
564 __entry->drm_id = drm_id;
565 __entry->hw_id = hw_id;
567 __entry->time = time;
568 __entry->expected_time = expected_time;
569 __entry->atomic_cnt = atomic_cnt;
571 TP_printk("id=%u, hw_id=%d, rc=%d, time=%lld, expected=%lld cnt=%d",
572 __entry->drm_id, __entry->hw_id, __entry->rc, __entry->time,
573 __entry->expected_time, __entry->atomic_cnt)
576 TRACE_EVENT(dpu_enc_phys_cmd_irq_ctrl,
577 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, bool enable,
579 TP_ARGS(drm_id, pp, enable, refcnt),
581 __field( uint32_t, drm_id )
582 __field( enum dpu_pingpong, pp )
583 __field( bool, enable )
584 __field( int, refcnt )
587 __entry->drm_id = drm_id;
589 __entry->enable = enable;
590 __entry->refcnt = refcnt;
592 TP_printk("id=%u, pp=%d, enable=%s, refcnt=%d", __entry->drm_id,
593 __entry->pp, __entry->enable ? "true" : "false",
597 TRACE_EVENT(dpu_enc_phys_cmd_pp_tx_done,
598 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int new_count,
600 TP_ARGS(drm_id, pp, new_count, event),
602 __field( uint32_t, drm_id )
603 __field( enum dpu_pingpong, pp )
604 __field( int, new_count )
605 __field( u32, event )
608 __entry->drm_id = drm_id;
610 __entry->new_count = new_count;
611 __entry->event = event;
613 TP_printk("id=%u, pp=%d, new_count=%d, event=%u", __entry->drm_id,
614 __entry->pp, __entry->new_count, __entry->event)
617 TRACE_EVENT(dpu_enc_phys_cmd_pdone_timeout,
618 TP_PROTO(uint32_t drm_id, enum dpu_pingpong pp, int timeout_count,
619 int kickoff_count, u32 event),
620 TP_ARGS(drm_id, pp, timeout_count, kickoff_count, event),
622 __field( uint32_t, drm_id )
623 __field( enum dpu_pingpong, pp )
624 __field( int, timeout_count )
625 __field( int, kickoff_count )
626 __field( u32, event )
629 __entry->drm_id = drm_id;
631 __entry->timeout_count = timeout_count;
632 __entry->kickoff_count = kickoff_count;
633 __entry->event = event;
635 TP_printk("id=%u, pp=%d, timeout_count=%d, kickoff_count=%d, event=%u",
636 __entry->drm_id, __entry->pp, __entry->timeout_count,
637 __entry->kickoff_count, __entry->event)
640 TRACE_EVENT(dpu_enc_phys_vid_post_kickoff,
641 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx),
642 TP_ARGS(drm_id, intf_idx),
644 __field( uint32_t, drm_id )
645 __field( enum dpu_intf, intf_idx )
648 __entry->drm_id = drm_id;
649 __entry->intf_idx = intf_idx;
651 TP_printk("id=%u, intf_idx=%d", __entry->drm_id, __entry->intf_idx)
654 TRACE_EVENT(dpu_enc_phys_vid_irq_ctrl,
655 TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx, bool enable,
657 TP_ARGS(drm_id, intf_idx, enable, refcnt),
659 __field( uint32_t, drm_id )
660 __field( enum dpu_intf, intf_idx )
661 __field( bool, enable )
662 __field( int, refcnt )
665 __entry->drm_id = drm_id;
666 __entry->intf_idx = intf_idx;
667 __entry->enable = enable;
668 __entry->refcnt = refcnt;
670 TP_printk("id=%u, intf_idx=%d enable=%s refcnt=%d", __entry->drm_id,
671 __entry->intf_idx, __entry->enable ? "true" : "false",
675 TRACE_EVENT(dpu_crtc_setup_mixer,
676 TP_PROTO(uint32_t crtc_id, uint32_t plane_id,
677 struct drm_plane_state *state, struct dpu_plane_state *pstate,
678 uint32_t stage_idx, enum dpu_sspp sspp, uint32_t pixel_format,
680 TP_ARGS(crtc_id, plane_id, state, pstate, stage_idx, sspp,
681 pixel_format, modifier),
683 __field( uint32_t, crtc_id )
684 __field( uint32_t, plane_id )
685 __field( struct drm_plane_state*,state )
686 __field( struct dpu_plane_state*,pstate )
687 __field( uint32_t, stage_idx )
688 __field( enum dpu_sspp, sspp )
689 __field( uint32_t, pixel_format )
690 __field( uint64_t, modifier )
693 __entry->crtc_id = crtc_id;
694 __entry->plane_id = plane_id;
695 __entry->state = state;
696 __entry->pstate = pstate;
697 __entry->stage_idx = stage_idx;
698 __entry->sspp = sspp;
699 __entry->pixel_format = pixel_format;
700 __entry->modifier = modifier;
702 TP_printk("crtc_id:%u plane_id:%u fb_id:%u src:{%ux%u+%ux%u} "
703 "dst:{%ux%u+%ux%u} stage_idx:%u stage:%d, sspp:%d "
704 "multirect_index:%d multirect_mode:%u pix_format:%u "
706 __entry->crtc_id, __entry->plane_id,
707 __entry->state->fb ? __entry->state->fb->base.id : -1,
708 __entry->state->src_w >> 16, __entry->state->src_h >> 16,
709 __entry->state->src_x >> 16, __entry->state->src_y >> 16,
710 __entry->state->crtc_w, __entry->state->crtc_h,
711 __entry->state->crtc_x, __entry->state->crtc_y,
712 __entry->stage_idx, __entry->pstate->stage, __entry->sspp,
713 __entry->pstate->multirect_index,
714 __entry->pstate->multirect_mode, __entry->pixel_format,
718 TRACE_EVENT(dpu_crtc_setup_lm_bounds,
719 TP_PROTO(uint32_t drm_id, int mixer, struct drm_rect *bounds),
720 TP_ARGS(drm_id, mixer, bounds),
722 __field( uint32_t, drm_id )
723 __field( int, mixer )
724 __field( struct drm_rect *, bounds )
727 __entry->drm_id = drm_id;
728 __entry->mixer = mixer;
729 __entry->bounds = bounds;
731 TP_printk("id:%u mixer:%d bounds:" DRM_RECT_FMT, __entry->drm_id,
732 __entry->mixer, DRM_RECT_ARG(__entry->bounds))
735 TRACE_EVENT(dpu_crtc_vblank_enable,
736 TP_PROTO(uint32_t drm_id, uint32_t enc_id, bool enable,
737 struct dpu_crtc *crtc),
738 TP_ARGS(drm_id, enc_id, enable, crtc),
740 __field( uint32_t, drm_id )
741 __field( uint32_t, enc_id )
742 __field( bool, enable )
743 __field( struct dpu_crtc *, crtc )
746 __entry->drm_id = drm_id;
747 __entry->enc_id = enc_id;
748 __entry->enable = enable;
749 __entry->crtc = crtc;
751 TP_printk("id:%u encoder:%u enable:%s state{enabled:%s suspend:%s "
753 __entry->drm_id, __entry->enc_id,
754 __entry->enable ? "true" : "false",
755 __entry->crtc->enabled ? "true" : "false",
756 __entry->crtc->suspend ? "true" : "false",
757 __entry->crtc->vblank_requested ? "true" : "false")
760 DECLARE_EVENT_CLASS(dpu_crtc_enable_template,
761 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
762 TP_ARGS(drm_id, enable, crtc),
764 __field( uint32_t, drm_id )
765 __field( bool, enable )
766 __field( struct dpu_crtc *, crtc )
769 __entry->drm_id = drm_id;
770 __entry->enable = enable;
771 __entry->crtc = crtc;
773 TP_printk("id:%u enable:%s state{enabled:%s suspend:%s vblank_req:%s}",
774 __entry->drm_id, __entry->enable ? "true" : "false",
775 __entry->crtc->enabled ? "true" : "false",
776 __entry->crtc->suspend ? "true" : "false",
777 __entry->crtc->vblank_requested ? "true" : "false")
779 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_set_suspend,
780 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
781 TP_ARGS(drm_id, enable, crtc)
783 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_enable,
784 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
785 TP_ARGS(drm_id, enable, crtc)
787 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_disable,
788 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
789 TP_ARGS(drm_id, enable, crtc)
791 DEFINE_EVENT(dpu_crtc_enable_template, dpu_crtc_vblank,
792 TP_PROTO(uint32_t drm_id, bool enable, struct dpu_crtc *crtc),
793 TP_ARGS(drm_id, enable, crtc)
796 TRACE_EVENT(dpu_crtc_disable_frame_pending,
797 TP_PROTO(uint32_t drm_id, int frame_pending),
798 TP_ARGS(drm_id, frame_pending),
800 __field( uint32_t, drm_id )
801 __field( int, frame_pending )
804 __entry->drm_id = drm_id;
805 __entry->frame_pending = frame_pending;
807 TP_printk("id:%u frame_pending:%d", __entry->drm_id,
808 __entry->frame_pending)
811 TRACE_EVENT(dpu_plane_set_scanout,
812 TP_PROTO(enum dpu_sspp index, struct dpu_hw_fmt_layout *layout,
813 enum dpu_sspp_multirect_index multirect_index),
814 TP_ARGS(index, layout, multirect_index),
816 __field( enum dpu_sspp, index )
817 __field( struct dpu_hw_fmt_layout*, layout )
818 __field( enum dpu_sspp_multirect_index, multirect_index)
821 __entry->index = index;
822 __entry->layout = layout;
823 __entry->multirect_index = multirect_index;
825 TP_printk("index:%d layout:{%ux%u @ [%u/%u, %u/%u, %u/%u, %u/%u]} "
826 "multirect_index:%d", __entry->index, __entry->layout->width,
827 __entry->layout->height, __entry->layout->plane_addr[0],
828 __entry->layout->plane_size[0],
829 __entry->layout->plane_addr[1],
830 __entry->layout->plane_size[1],
831 __entry->layout->plane_addr[2],
832 __entry->layout->plane_size[2],
833 __entry->layout->plane_addr[3],
834 __entry->layout->plane_size[3], __entry->multirect_index)
837 TRACE_EVENT(dpu_plane_disable,
838 TP_PROTO(uint32_t drm_id, bool is_virtual, uint32_t multirect_mode),
839 TP_ARGS(drm_id, is_virtual, multirect_mode),
841 __field( uint32_t, drm_id )
842 __field( bool, is_virtual )
843 __field( uint32_t, multirect_mode )
846 __entry->drm_id = drm_id;
847 __entry->is_virtual = is_virtual;
848 __entry->multirect_mode = multirect_mode;
850 TP_printk("id:%u is_virtual:%s multirect_mode:%u", __entry->drm_id,
851 __entry->is_virtual ? "true" : "false",
852 __entry->multirect_mode)
855 DECLARE_EVENT_CLASS(dpu_rm_iter_template,
856 TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
857 TP_ARGS(id, type, enc_id),
859 __field( uint32_t, id )
860 __field( enum dpu_hw_blk_type, type )
861 __field( uint32_t, enc_id )
865 __entry->type = type;
866 __entry->enc_id = enc_id;
868 TP_printk("id:%d type:%d enc_id:%u", __entry->id, __entry->type,
871 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_cdm,
872 TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
873 TP_ARGS(id, type, enc_id)
875 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_intf,
876 TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
877 TP_ARGS(id, type, enc_id)
879 DEFINE_EVENT(dpu_rm_iter_template, dpu_rm_reserve_ctls,
880 TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id),
881 TP_ARGS(id, type, enc_id)
884 TRACE_EVENT(dpu_rm_reserve_lms,
885 TP_PROTO(uint32_t id, enum dpu_hw_blk_type type, uint32_t enc_id,
887 TP_ARGS(id, type, enc_id, pp_id),
889 __field( uint32_t, id )
890 __field( enum dpu_hw_blk_type, type )
891 __field( uint32_t, enc_id )
892 __field( uint32_t, pp_id )
896 __entry->type = type;
897 __entry->enc_id = enc_id;
898 __entry->pp_id = pp_id;
900 TP_printk("id:%d type:%d enc_id:%u pp_id:%u", __entry->id,
901 __entry->type, __entry->enc_id, __entry->pp_id)
904 TRACE_EVENT(dpu_vbif_wait_xin_halt_fail,
905 TP_PROTO(enum dpu_vbif index, u32 xin_id),
906 TP_ARGS(index, xin_id),
908 __field( enum dpu_vbif, index )
909 __field( u32, xin_id )
912 __entry->index = index;
913 __entry->xin_id = xin_id;
915 TP_printk("index:%d xin_id:%u", __entry->index, __entry->xin_id)
918 TRACE_EVENT(dpu_pp_connect_ext_te,
919 TP_PROTO(enum dpu_pingpong pp, u32 cfg),
922 __field( enum dpu_pingpong, pp )
929 TP_printk("pp:%d cfg:%u", __entry->pp, __entry->cfg)
932 DECLARE_EVENT_CLASS(dpu_core_irq_idx_cnt_template,
933 TP_PROTO(int irq_idx, int enable_count),
934 TP_ARGS(irq_idx, enable_count),
936 __field( int, irq_idx )
937 __field( int, enable_count )
940 __entry->irq_idx = irq_idx;
941 __entry->enable_count = enable_count;
943 TP_printk("irq_idx:%d enable_count:%u", __entry->irq_idx,
944 __entry->enable_count)
946 DEFINE_EVENT(dpu_core_irq_idx_cnt_template, dpu_core_irq_enable_idx,
947 TP_PROTO(int irq_idx, int enable_count),
948 TP_ARGS(irq_idx, enable_count)
950 DEFINE_EVENT(dpu_core_irq_idx_cnt_template, dpu_core_irq_disable_idx,
951 TP_PROTO(int irq_idx, int enable_count),
952 TP_ARGS(irq_idx, enable_count)
955 DECLARE_EVENT_CLASS(dpu_core_irq_callback_template,
956 TP_PROTO(int irq_idx, struct dpu_irq_callback *callback),
957 TP_ARGS(irq_idx, callback),
959 __field( int, irq_idx )
960 __field( struct dpu_irq_callback *, callback)
963 __entry->irq_idx = irq_idx;
964 __entry->callback = callback;
966 TP_printk("irq_idx:%d callback:%pK", __entry->irq_idx,
969 DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_register_callback,
970 TP_PROTO(int irq_idx, struct dpu_irq_callback *callback),
971 TP_ARGS(irq_idx, callback)
973 DEFINE_EVENT(dpu_core_irq_callback_template, dpu_core_irq_unregister_callback,
974 TP_PROTO(int irq_idx, struct dpu_irq_callback *callback),
975 TP_ARGS(irq_idx, callback)
978 TRACE_EVENT(dpu_core_perf_update_clk,
979 TP_PROTO(struct drm_device *dev, bool stop_req, u64 clk_rate),
980 TP_ARGS(dev, stop_req, clk_rate),
982 __field( struct drm_device *, dev )
983 __field( bool, stop_req )
984 __field( u64, clk_rate )
988 __entry->stop_req = stop_req;
989 __entry->clk_rate = clk_rate;
991 TP_printk("dev:%s stop_req:%s clk_rate:%llu", __entry->dev->unique,
992 __entry->stop_req ? "true" : "false", __entry->clk_rate)
995 #define DPU_ATRACE_END(name) trace_tracing_mark_write(current->tgid, name, 0)
996 #define DPU_ATRACE_BEGIN(name) trace_tracing_mark_write(current->tgid, name, 1)
997 #define DPU_ATRACE_FUNC() DPU_ATRACE_BEGIN(__func__)
999 #define DPU_ATRACE_INT(name, value) \
1000 trace_dpu_trace_counter(current->tgid, name, value)
1002 #endif /* _DPU_TRACE_H_ */
1004 /* This part must be outside protection */
1005 #undef TRACE_INCLUDE_PATH
1006 #define TRACE_INCLUDE_PATH .
1007 #include <trace/define_trace.h>