2 * Copyright (C) 2013-2014 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
5 * Copyright (c) 2014,2017 The Linux Foundation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #include "adreno_gpu.h"
24 bool hang_debug = false;
25 MODULE_PARM_DESC(hang_debug, "Dump registers when hang is detected (can be slow!)");
26 module_param_named(hang_debug, hang_debug, bool, 0600);
28 static const struct adreno_info gpulist[] = {
30 .rev = ADRENO_REV(3, 0, 5, ANY_ID),
34 [ADRENO_FW_PM4] = "/*(DEBLOBBED)*/",
35 [ADRENO_FW_PFP] = "/*(DEBLOBBED)*/",
38 .inactive_period = DRM_MSM_INACTIVE_PERIOD,
39 .init = a3xx_gpu_init,
41 .rev = ADRENO_REV(3, 0, 6, 0),
42 .revn = 307, /* because a305c is revn==306 */
45 [ADRENO_FW_PM4] = "/*(DEBLOBBED)*/",
46 [ADRENO_FW_PFP] = "/*(DEBLOBBED)*/",
49 .inactive_period = DRM_MSM_INACTIVE_PERIOD,
50 .init = a3xx_gpu_init,
52 .rev = ADRENO_REV(3, 2, ANY_ID, ANY_ID),
56 [ADRENO_FW_PM4] = "/*(DEBLOBBED)*/",
57 [ADRENO_FW_PFP] = "/*(DEBLOBBED)*/",
60 .inactive_period = DRM_MSM_INACTIVE_PERIOD,
61 .init = a3xx_gpu_init,
63 .rev = ADRENO_REV(3, 3, 0, ANY_ID),
67 [ADRENO_FW_PM4] = "/*(DEBLOBBED)*/",
68 [ADRENO_FW_PFP] = "/*(DEBLOBBED)*/",
71 .inactive_period = DRM_MSM_INACTIVE_PERIOD,
72 .init = a3xx_gpu_init,
74 .rev = ADRENO_REV(4, 2, 0, ANY_ID),
78 [ADRENO_FW_PM4] = "/*(DEBLOBBED)*/",
79 [ADRENO_FW_PFP] = "/*(DEBLOBBED)*/",
81 .gmem = (SZ_1M + SZ_512K),
82 .inactive_period = DRM_MSM_INACTIVE_PERIOD,
83 .init = a4xx_gpu_init,
85 .rev = ADRENO_REV(4, 3, 0, ANY_ID),
89 [ADRENO_FW_PM4] = "/*(DEBLOBBED)*/",
90 [ADRENO_FW_PFP] = "/*(DEBLOBBED)*/",
92 .gmem = (SZ_1M + SZ_512K),
93 .inactive_period = DRM_MSM_INACTIVE_PERIOD,
94 .init = a4xx_gpu_init,
96 .rev = ADRENO_REV(5, 3, 0, 2),
100 [ADRENO_FW_PM4] = "/*(DEBLOBBED)*/",
101 [ADRENO_FW_PFP] = "/*(DEBLOBBED)*/",
102 [ADRENO_FW_GPMU] = "/*(DEBLOBBED)*/",
106 * Increase inactive period to 250 to avoid bouncing
107 * the GDSC which appears to make it grumpy
109 .inactive_period = 250,
110 .quirks = ADRENO_QUIRK_TWO_PASS_USE_WFI |
111 ADRENO_QUIRK_FAULT_DETECT_MASK,
112 .init = a5xx_gpu_init,
113 .zapfw = "/*(DEBLOBBED)*/",
115 .rev = ADRENO_REV(6, 3, 0, ANY_ID),
119 [ADRENO_FW_SQE] = "/*(DEBLOBBED)*/",
120 [ADRENO_FW_GMU] = "/*(DEBLOBBED)*/",
123 .init = a6xx_gpu_init,
129 static inline bool _rev_match(uint8_t entry, uint8_t id)
131 return (entry == ANY_ID) || (entry == id);
134 const struct adreno_info *adreno_info(struct adreno_rev rev)
139 for (i = 0; i < ARRAY_SIZE(gpulist); i++) {
140 const struct adreno_info *info = &gpulist[i];
141 if (_rev_match(info->rev.core, rev.core) &&
142 _rev_match(info->rev.major, rev.major) &&
143 _rev_match(info->rev.minor, rev.minor) &&
144 _rev_match(info->rev.patchid, rev.patchid))
151 struct msm_gpu *adreno_load_gpu(struct drm_device *dev)
153 struct msm_drm_private *priv = dev->dev_private;
154 struct platform_device *pdev = priv->gpu_pdev;
155 struct msm_gpu *gpu = NULL;
156 struct adreno_gpu *adreno_gpu;
160 gpu = platform_get_drvdata(pdev);
163 dev_err_once(dev->dev, "no GPU device was found\n");
167 adreno_gpu = to_adreno_gpu(gpu);
170 * The number one reason for HW init to fail is if the firmware isn't
171 * loaded yet. Try that first and don't bother continuing on
175 ret = adreno_load_fw(adreno_gpu);
179 /* Make sure pm runtime is active and reset any previous errors */
180 pm_runtime_set_active(&pdev->dev);
182 ret = pm_runtime_get_sync(&pdev->dev);
184 dev_err(dev->dev, "Couldn't power up the GPU: %d\n", ret);
188 mutex_lock(&dev->struct_mutex);
189 ret = msm_gpu_hw_init(gpu);
190 mutex_unlock(&dev->struct_mutex);
191 pm_runtime_put_autosuspend(&pdev->dev);
193 dev_err(dev->dev, "gpu hw init failed: %d\n", ret);
197 #ifdef CONFIG_DEBUG_FS
198 if (gpu->funcs->debugfs_init) {
199 gpu->funcs->debugfs_init(gpu, dev->primary);
200 gpu->funcs->debugfs_init(gpu, dev->render);
207 static void set_gpu_pdev(struct drm_device *dev,
208 struct platform_device *pdev)
210 struct msm_drm_private *priv = dev->dev_private;
211 priv->gpu_pdev = pdev;
214 static int find_chipid(struct device *dev, struct adreno_rev *rev)
216 struct device_node *node = dev->of_node;
221 /* first search the compat strings for qcom,adreno-XYZ.W: */
222 ret = of_property_read_string_index(node, "compatible", 0, &compat);
224 unsigned int r, patch;
226 if (sscanf(compat, "qcom,adreno-%u.%u", &r, &patch) == 2) {
232 rev->patchid = patch;
238 /* and if that fails, fall back to legacy "qcom,chipid" property: */
239 ret = of_property_read_u32(node, "qcom,chipid", &chipid);
241 dev_err(dev, "could not parse qcom,chipid: %d\n", ret);
245 rev->core = (chipid >> 24) & 0xff;
246 rev->major = (chipid >> 16) & 0xff;
247 rev->minor = (chipid >> 8) & 0xff;
248 rev->patchid = (chipid & 0xff);
250 dev_warn(dev, "Using legacy qcom,chipid binding!\n");
251 dev_warn(dev, "Use compatible qcom,adreno-%u%u%u.%u instead.\n",
252 rev->core, rev->major, rev->minor, rev->patchid);
257 static int adreno_bind(struct device *dev, struct device *master, void *data)
259 static struct adreno_platform_config config = {};
260 const struct adreno_info *info;
261 struct drm_device *drm = dev_get_drvdata(master);
265 ret = find_chipid(dev, &config.rev);
269 dev->platform_data = &config;
270 set_gpu_pdev(drm, to_platform_device(dev));
272 info = adreno_info(config.rev);
275 dev_warn(drm->dev, "Unknown GPU revision: %u.%u.%u.%u\n",
276 config.rev.core, config.rev.major,
277 config.rev.minor, config.rev.patchid);
281 DBG("Found GPU: %u.%u.%u.%u", config.rev.core, config.rev.major,
282 config.rev.minor, config.rev.patchid);
284 gpu = info->init(drm);
286 dev_warn(drm->dev, "failed to load adreno gpu\n");
290 dev_set_drvdata(dev, gpu);
295 static void adreno_unbind(struct device *dev, struct device *master,
298 struct msm_gpu *gpu = dev_get_drvdata(dev);
300 gpu->funcs->pm_suspend(gpu);
301 gpu->funcs->destroy(gpu);
303 set_gpu_pdev(dev_get_drvdata(master), NULL);
306 static const struct component_ops a3xx_ops = {
308 .unbind = adreno_unbind,
311 static int adreno_probe(struct platform_device *pdev)
313 return component_add(&pdev->dev, &a3xx_ops);
316 static int adreno_remove(struct platform_device *pdev)
318 component_del(&pdev->dev, &a3xx_ops);
322 static const struct of_device_id dt_match[] = {
323 { .compatible = "qcom,adreno" },
324 { .compatible = "qcom,adreno-3xx" },
325 /* for backwards compat w/ downstream kgsl DT files: */
326 { .compatible = "qcom,kgsl-3d0" },
331 static int adreno_resume(struct device *dev)
333 struct platform_device *pdev = to_platform_device(dev);
334 struct msm_gpu *gpu = platform_get_drvdata(pdev);
336 return gpu->funcs->pm_resume(gpu);
339 static int adreno_suspend(struct device *dev)
341 struct platform_device *pdev = to_platform_device(dev);
342 struct msm_gpu *gpu = platform_get_drvdata(pdev);
344 return gpu->funcs->pm_suspend(gpu);
348 static const struct dev_pm_ops adreno_pm_ops = {
349 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
350 SET_RUNTIME_PM_OPS(adreno_suspend, adreno_resume, NULL)
353 static struct platform_driver adreno_driver = {
354 .probe = adreno_probe,
355 .remove = adreno_remove,
358 .of_match_table = dt_match,
359 .pm = &adreno_pm_ops,
363 void __init adreno_register(void)
365 platform_driver_register(&adreno_driver);
368 void __exit adreno_unregister(void)
370 platform_driver_unregister(&adreno_driver);