1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2012 Red Hat
5 * Authors: Matthew Garrett
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/vmalloc.h>
13 #include <drm/drm_aperture.h>
14 #include <drm/drm_drv.h>
15 #include <drm/drm_file.h>
16 #include <drm/drm_ioctl.h>
17 #include <drm/drm_managed.h>
18 #include <drm/drm_module.h>
19 #include <drm/drm_pciids.h>
21 #include "mgag200_drv.h"
23 int mgag200_modeset = -1;
24 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
25 module_param_named(modeset, mgag200_modeset, int, 0400);
31 DEFINE_DRM_GEM_FOPS(mgag200_driver_fops);
33 static const struct drm_driver mgag200_driver = {
34 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
35 .fops = &mgag200_driver_fops,
39 .major = DRIVER_MAJOR,
40 .minor = DRIVER_MINOR,
41 .patchlevel = DRIVER_PATCHLEVEL,
42 DRM_GEM_SHMEM_DRIVER_OPS,
49 static bool mgag200_has_sgram(struct mga_device *mdev)
51 struct drm_device *dev = &mdev->base;
52 struct pci_dev *pdev = to_pci_dev(dev->dev);
56 ret = pci_read_config_dword(pdev, PCI_MGA_OPTION, &option);
57 if (drm_WARN(dev, ret, "failed to read PCI config dword: %d\n", ret))
60 return !!(option & PCI_MGA_OPTION_HARDPWMSK);
63 static int mgag200_regs_init(struct mga_device *mdev)
65 struct drm_device *dev = &mdev->base;
66 struct pci_dev *pdev = to_pci_dev(dev->dev);
71 ret = drmm_mutex_init(dev, &mdev->rmmio_lock);
78 if (mgag200_has_sgram(mdev))
87 if (mgag200_has_sgram(mdev))
88 option |= PCI_MGA_OPTION_HARDPWMSK;
103 option2 = 0x0000b000;
111 pci_write_config_dword(pdev, PCI_MGA_OPTION, option);
113 pci_write_config_dword(pdev, PCI_MGA_OPTION2, option2);
115 /* BAR 1 contains registers */
116 mdev->rmmio_base = pci_resource_start(pdev, 1);
117 mdev->rmmio_size = pci_resource_len(pdev, 1);
119 if (!devm_request_mem_region(dev->dev, mdev->rmmio_base,
120 mdev->rmmio_size, "mgadrmfb_mmio")) {
121 drm_err(dev, "can't reserve mmio registers\n");
125 mdev->rmmio = pcim_iomap(pdev, 1, 0);
126 if (mdev->rmmio == NULL)
129 RREG_ECRT(0x03, crtcext3);
130 crtcext3 |= MGAREG_CRTCEXT3_MGAMODE;
131 WREG_ECRT(0x03, crtcext3);
136 static void mgag200_g200_interpret_bios(struct mga_device *mdev,
137 const unsigned char *bios,
140 static const char matrox[] = {'M', 'A', 'T', 'R', 'O', 'X'};
141 static const unsigned int expected_length[6] = {
142 0, 64, 64, 64, 128, 128
144 struct drm_device *dev = &mdev->base;
145 const unsigned char *pins;
146 unsigned int pins_len, version;
150 /* Test for MATROX string. */
151 if (size < 45 + sizeof(matrox))
153 if (memcmp(&bios[45], matrox, sizeof(matrox)) != 0)
156 /* Get the PInS offset. */
157 if (size < MGA_BIOS_OFFSET + 2)
159 offset = (bios[MGA_BIOS_OFFSET + 1] << 8) | bios[MGA_BIOS_OFFSET];
161 /* Get PInS data structure. */
163 if (size < offset + 6)
165 pins = bios + offset;
166 if (pins[0] == 0x2e && pins[1] == 0x41) {
171 pins_len = pins[0] + (pins[1] << 8);
174 if (version < 1 || version > 5) {
175 drm_warn(dev, "Unknown BIOS PInS version: %d\n", version);
178 if (pins_len != expected_length[version]) {
179 drm_warn(dev, "Unexpected BIOS PInS size: %d expected: %d\n",
180 pins_len, expected_length[version]);
183 if (size < offset + pins_len)
186 drm_dbg_kms(dev, "MATROX BIOS PInS version %d size: %d found\n",
189 /* Extract the clock values */
193 tmp = pins[24] + (pins[25] << 8);
195 mdev->model.g200.pclk_max = tmp * 10;
198 if (pins[41] != 0xff)
199 mdev->model.g200.pclk_max = (pins[41] + 100) * 1000;
202 if (pins[36] != 0xff)
203 mdev->model.g200.pclk_max = (pins[36] + 100) * 1000;
205 mdev->model.g200.ref_clk = 14318;
208 if (pins[39] != 0xff)
209 mdev->model.g200.pclk_max = pins[39] * 4 * 1000;
211 mdev->model.g200.ref_clk = 14318;
214 tmp = pins[4] ? 8000 : 6000;
215 if (pins[123] != 0xff)
216 mdev->model.g200.pclk_min = pins[123] * tmp;
217 if (pins[38] != 0xff)
218 mdev->model.g200.pclk_max = pins[38] * tmp;
219 if (pins[110] & 0x01)
220 mdev->model.g200.ref_clk = 14318;
227 static void mgag200_g200_init_refclk(struct mga_device *mdev)
229 struct drm_device *dev = &mdev->base;
230 struct pci_dev *pdev = to_pci_dev(dev->dev);
231 unsigned char __iomem *rom;
235 mdev->model.g200.pclk_min = 50000;
236 mdev->model.g200.pclk_max = 230000;
237 mdev->model.g200.ref_clk = 27050;
239 rom = pci_map_rom(pdev, &size);
243 bios = vmalloc(size);
246 memcpy_fromio(bios, rom, size);
248 if (size != 0 && bios[0] == 0x55 && bios[1] == 0xaa)
249 mgag200_g200_interpret_bios(mdev, bios, size);
251 drm_dbg_kms(dev, "pclk_min: %ld pclk_max: %ld ref_clk: %ld\n",
252 mdev->model.g200.pclk_min, mdev->model.g200.pclk_max,
253 mdev->model.g200.ref_clk);
257 pci_unmap_rom(pdev, rom);
260 static void mgag200_g200se_init_unique_id(struct mga_device *mdev)
262 struct drm_device *dev = &mdev->base;
264 /* stash G200 SE model number for later use */
265 mdev->model.g200se.unique_rev_id = RREG32(0x1e24);
267 drm_dbg(dev, "G200 SE unique revision id is 0x%x\n",
268 mdev->model.g200se.unique_rev_id);
271 static struct mga_device *
272 mgag200_device_create(struct pci_dev *pdev, enum mga_type type, unsigned long flags)
274 struct mga_device *mdev;
275 struct drm_device *dev;
278 mdev = devm_drm_dev_alloc(&pdev->dev, &mgag200_driver, struct mga_device, base);
283 pci_set_drvdata(pdev, dev);
288 ret = mgag200_regs_init(mdev);
292 if (mdev->type == G200_PCI || mdev->type == G200_AGP)
293 mgag200_g200_init_refclk(mdev);
294 else if (IS_G200_SE(mdev))
295 mgag200_g200se_init_unique_id(mdev);
297 ret = mgag200_mm_init(mdev);
301 ret = mgag200_modeset_init(mdev);
312 static const struct pci_device_id mgag200_pciidlist[] = {
313 { PCI_VENDOR_ID_MATROX, 0x520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_PCI },
314 { PCI_VENDOR_ID_MATROX, 0x521, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_AGP },
315 { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
316 G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD},
317 { PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B },
318 { PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV },
319 { PCI_VENDOR_ID_MATROX, 0x532, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_WB },
320 { PCI_VENDOR_ID_MATROX, 0x533, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH },
321 { PCI_VENDOR_ID_MATROX, 0x534, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_ER },
322 { PCI_VENDOR_ID_MATROX, 0x536, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EW3 },
323 { PCI_VENDOR_ID_MATROX, 0x538, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH3 },
327 MODULE_DEVICE_TABLE(pci, mgag200_pciidlist);
329 static enum mga_type mgag200_type_from_driver_data(kernel_ulong_t driver_data)
331 return (enum mga_type)(driver_data & MGAG200_TYPE_MASK);
334 static unsigned long mgag200_flags_from_driver_data(kernel_ulong_t driver_data)
336 return driver_data & MGAG200_FLAG_MASK;
340 mgag200_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
342 kernel_ulong_t driver_data = ent->driver_data;
343 enum mga_type type = mgag200_type_from_driver_data(driver_data);
344 unsigned long flags = mgag200_flags_from_driver_data(driver_data);
345 struct mga_device *mdev;
346 struct drm_device *dev;
349 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &mgag200_driver);
353 ret = pcim_enable_device(pdev);
357 mdev = mgag200_device_create(pdev, type, flags);
359 return PTR_ERR(mdev);
362 ret = drm_dev_register(dev, 0);
366 drm_fbdev_generic_setup(dev, 0);
371 static void mgag200_pci_remove(struct pci_dev *pdev)
373 struct drm_device *dev = pci_get_drvdata(pdev);
375 drm_dev_unregister(dev);
378 static struct pci_driver mgag200_pci_driver = {
380 .id_table = mgag200_pciidlist,
381 .probe = mgag200_pci_probe,
382 .remove = mgag200_pci_remove,
385 drm_module_pci_driver_if_modeset(mgag200_pci_driver, mgag200_modeset);
387 MODULE_AUTHOR(DRIVER_AUTHOR);
388 MODULE_DESCRIPTION(DRIVER_DESC);
389 MODULE_LICENSE("GPL");