1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Copyright (C) 2014 Endless Mobile
8 * Jasper St. Pierre <jstpierre@mecheye.net>
11 #include <linux/component.h>
12 #include <linux/module.h>
13 #include <linux/of_graph.h>
14 #include <linux/sys_soc.h>
15 #include <linux/platform_device.h>
16 #include <linux/soc/amlogic/meson-canvas.h>
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_drv.h>
20 #include <drm/drm_fb_helper.h>
21 #include <drm/drm_gem_cma_helper.h>
22 #include <drm/drm_gem_framebuffer_helper.h>
23 #include <drm/drm_irq.h>
24 #include <drm/drm_modeset_helper_vtables.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_vblank.h>
28 #include "meson_crtc.h"
29 #include "meson_drv.h"
30 #include "meson_overlay.h"
31 #include "meson_plane.h"
32 #include "meson_osd_afbcd.h"
33 #include "meson_registers.h"
34 #include "meson_venc_cvbs.h"
35 #include "meson_viu.h"
36 #include "meson_vpp.h"
37 #include "meson_rdma.h"
39 #define DRIVER_NAME "meson"
40 #define DRIVER_DESC "Amlogic Meson DRM driver"
43 * DOC: Video Processing Unit
45 * VPU Handles the Global Video Processing, it includes management of the
46 * clocks gates, blocks reset lines and power domains.
50 * - Full reset of entire video processing HW blocks
51 * - Scaling and setup of the VPU clock
53 * - Powering up video processing HW blocks
54 * - Powering Up HDMI controller and PHY
57 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
58 .atomic_check = drm_atomic_helper_check,
59 .atomic_commit = drm_atomic_helper_commit,
60 .fb_create = drm_gem_fb_create,
63 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
64 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
67 static irqreturn_t meson_irq(int irq, void *arg)
69 struct drm_device *dev = arg;
70 struct meson_drm *priv = dev->dev_private;
72 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
79 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
80 struct drm_mode_create_dumb *args)
83 * We need 64bytes aligned stride, and PAGE aligned size
85 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
86 args->size = PAGE_ALIGN(args->pitch * args->height);
88 return drm_gem_cma_dumb_create_internal(file, dev, args);
91 DEFINE_DRM_GEM_CMA_FOPS(fops);
93 static struct drm_driver meson_driver = {
94 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
97 .irq_handler = meson_irq,
100 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
111 static bool meson_vpu_has_available_connectors(struct device *dev)
113 struct device_node *ep, *remote;
115 /* Parses each endpoint and check if remote exists */
116 for_each_endpoint_of_node(dev->of_node, ep) {
117 /* If the endpoint node exists, consider it enabled */
118 remote = of_graph_get_remote_port(ep);
129 static struct regmap_config meson_regmap_config = {
133 .max_register = 0x1000,
136 static void meson_vpu_init(struct meson_drm *priv)
141 * Slave dc0 and dc5 connected to master port 1.
142 * By default other slaves are connected to master port 0.
144 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
145 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
146 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
148 /* Slave dc0 connected to master port 1 */
149 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
150 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
152 /* Slave dc4 and dc7 connected to master port 1 */
153 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
154 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
155 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
157 /* Slave dc1 connected to master port 1 */
158 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
159 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
162 static void meson_remove_framebuffers(void)
164 struct apertures_struct *ap;
166 ap = alloc_apertures(1);
170 /* The framebuffer can be located anywhere in RAM */
171 ap->ranges[0].base = 0;
172 ap->ranges[0].size = ~0;
174 drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb",
179 struct meson_drm_soc_attr {
180 struct meson_drm_soc_limits limits;
181 const struct soc_device_attribute *attrs;
184 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
185 /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
188 .max_hdmi_phy_freq = 1650000,
190 .attrs = (const struct soc_device_attribute []) {
191 { .soc_id = "GXL (S805*)", },
197 static int meson_drv_bind_master(struct device *dev, bool has_components)
199 struct platform_device *pdev = to_platform_device(dev);
200 const struct meson_drm_match_data *match;
201 struct meson_drm *priv;
202 struct drm_device *drm;
203 struct resource *res;
207 /* Checks if an output connector is available */
208 if (!meson_vpu_has_available_connectors(dev)) {
209 dev_err(dev, "No output connector available\n");
213 match = of_device_get_match_data(dev);
217 drm = drm_dev_alloc(&meson_driver, dev);
221 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
226 drm->dev_private = priv;
229 priv->compat = match->compat;
230 priv->afbcd.ops = match->afbcd_ops;
232 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
233 regs = devm_ioremap_resource(dev, res);
239 priv->io_base = regs;
241 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
246 /* Simply ioremap since it may be a shared register zone */
247 regs = devm_ioremap(dev, res->start, resource_size(res));
249 ret = -EADDRNOTAVAIL;
253 priv->hhi = devm_regmap_init_mmio(dev, regs,
254 &meson_regmap_config);
255 if (IS_ERR(priv->hhi)) {
256 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
257 ret = PTR_ERR(priv->hhi);
261 priv->canvas = meson_canvas_get(dev);
262 if (IS_ERR(priv->canvas)) {
263 ret = PTR_ERR(priv->canvas);
267 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
270 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
272 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
275 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
277 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
278 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
281 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
283 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
284 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
285 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
289 priv->vsync_irq = platform_get_irq(pdev, 0);
291 ret = drm_vblank_init(drm, 1);
295 /* Assign limits per soc revision/package */
296 for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
297 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
298 priv->limits = &meson_drm_soc_attrs[i].limits;
303 /* Remove early framebuffers (ie. simplefb) */
304 meson_remove_framebuffers();
306 ret = drmm_mode_config_init(drm);
309 drm->mode_config.max_width = 3840;
310 drm->mode_config.max_height = 2160;
311 drm->mode_config.funcs = &meson_mode_config_funcs;
312 drm->mode_config.helper_private = &meson_mode_config_helpers;
314 /* Hardware Initialization */
316 meson_vpu_init(priv);
317 meson_venc_init(priv);
318 meson_vpp_init(priv);
319 meson_viu_init(priv);
320 if (priv->afbcd.ops) {
321 ret = priv->afbcd.ops->init(priv);
326 /* Encoder Initialization */
328 ret = meson_venc_cvbs_create(priv);
332 if (has_components) {
333 ret = component_bind_all(drm->dev, drm);
335 dev_err(drm->dev, "Couldn't bind all components\n");
340 ret = meson_plane_create(priv);
344 ret = meson_overlay_create(priv);
348 ret = meson_crtc_create(priv);
352 ret = drm_irq_install(drm, priv->vsync_irq);
356 drm_mode_config_reset(drm);
358 drm_kms_helper_poll_init(drm);
360 platform_set_drvdata(pdev, priv);
362 ret = drm_dev_register(drm, 0);
366 drm_fbdev_generic_setup(drm, 32);
371 drm_irq_uninstall(drm);
378 static int meson_drv_bind(struct device *dev)
380 return meson_drv_bind_master(dev, true);
383 static void meson_drv_unbind(struct device *dev)
385 struct meson_drm *priv = dev_get_drvdata(dev);
386 struct drm_device *drm = priv->drm;
389 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
390 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
391 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
392 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
395 drm_dev_unregister(drm);
396 drm_kms_helper_poll_fini(drm);
397 drm_atomic_helper_shutdown(drm);
398 component_unbind_all(dev, drm);
399 drm_irq_uninstall(drm);
403 priv->afbcd.ops->exit(priv);
406 static const struct component_master_ops meson_drv_master_ops = {
407 .bind = meson_drv_bind,
408 .unbind = meson_drv_unbind,
411 static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
413 struct meson_drm *priv = dev_get_drvdata(dev);
418 return drm_mode_config_helper_suspend(priv->drm);
421 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
423 struct meson_drm *priv = dev_get_drvdata(dev);
428 meson_vpu_init(priv);
429 meson_venc_init(priv);
430 meson_vpp_init(priv);
431 meson_viu_init(priv);
433 priv->afbcd.ops->init(priv);
435 return drm_mode_config_helper_resume(priv->drm);
438 static int compare_of(struct device *dev, void *data)
440 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
443 return dev->of_node == data;
446 /* Possible connectors nodes to ignore */
447 static const struct of_device_id connectors_match[] = {
448 { .compatible = "composite-video-connector" },
449 { .compatible = "svideo-connector" },
450 { .compatible = "hdmi-connector" },
451 { .compatible = "dvi-connector" },
455 static int meson_probe_remote(struct platform_device *pdev,
456 struct component_match **match,
457 struct device_node *parent,
458 struct device_node *remote)
460 struct device_node *ep, *remote_node;
463 /* If node is a connector, return and do not add to match table */
464 if (of_match_node(connectors_match, remote))
467 component_match_add(&pdev->dev, match, compare_of, remote);
469 for_each_endpoint_of_node(remote, ep) {
470 remote_node = of_graph_get_remote_port_parent(ep);
472 remote_node == parent || /* Ignore parent endpoint */
473 !of_device_is_available(remote_node)) {
474 of_node_put(remote_node);
478 count += meson_probe_remote(pdev, match, remote, remote_node);
480 of_node_put(remote_node);
486 static void meson_drv_shutdown(struct platform_device *pdev)
488 struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
493 drm_kms_helper_poll_fini(priv->drm);
494 drm_atomic_helper_shutdown(priv->drm);
497 static int meson_drv_probe(struct platform_device *pdev)
499 struct component_match *match = NULL;
500 struct device_node *np = pdev->dev.of_node;
501 struct device_node *ep, *remote;
504 for_each_endpoint_of_node(np, ep) {
505 remote = of_graph_get_remote_port_parent(ep);
506 if (!remote || !of_device_is_available(remote)) {
511 count += meson_probe_remote(pdev, &match, np, remote);
516 return meson_drv_bind_master(&pdev->dev, false);
518 /* If some endpoints were found, initialize the nodes */
520 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
522 return component_master_add_with_match(&pdev->dev,
523 &meson_drv_master_ops,
527 /* If no output endpoints were available, simply bail out */
531 static int meson_drv_remove(struct platform_device *pdev)
533 component_master_del(&pdev->dev, &meson_drv_master_ops);
538 static struct meson_drm_match_data meson_drm_gxbb_data = {
539 .compat = VPU_COMPATIBLE_GXBB,
542 static struct meson_drm_match_data meson_drm_gxl_data = {
543 .compat = VPU_COMPATIBLE_GXL,
546 static struct meson_drm_match_data meson_drm_gxm_data = {
547 .compat = VPU_COMPATIBLE_GXM,
548 .afbcd_ops = &meson_afbcd_gxm_ops,
551 static struct meson_drm_match_data meson_drm_g12a_data = {
552 .compat = VPU_COMPATIBLE_G12A,
553 .afbcd_ops = &meson_afbcd_g12a_ops,
556 static const struct of_device_id dt_match[] = {
557 { .compatible = "amlogic,meson-gxbb-vpu",
558 .data = (void *)&meson_drm_gxbb_data },
559 { .compatible = "amlogic,meson-gxl-vpu",
560 .data = (void *)&meson_drm_gxl_data },
561 { .compatible = "amlogic,meson-gxm-vpu",
562 .data = (void *)&meson_drm_gxm_data },
563 { .compatible = "amlogic,meson-g12a-vpu",
564 .data = (void *)&meson_drm_g12a_data },
567 MODULE_DEVICE_TABLE(of, dt_match);
569 static const struct dev_pm_ops meson_drv_pm_ops = {
570 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
573 static struct platform_driver meson_drm_platform_driver = {
574 .probe = meson_drv_probe,
575 .remove = meson_drv_remove,
576 .shutdown = meson_drv_shutdown,
579 .of_match_table = dt_match,
580 .pm = &meson_drv_pm_ops,
584 module_platform_driver(meson_drm_platform_driver);
586 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
587 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
588 MODULE_DESCRIPTION(DRIVER_DESC);
589 MODULE_LICENSE("GPL");