GNU Linux-libre 4.14.251-gnu1
[releases.git] / drivers / gpu / drm / mediatek / mtk_drm_drv.c
1 /*
2  * Copyright (c) 2015 MediaTek Inc.
3  * Author: YT SHEN <yt.shen@mediatek.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14
15 #include <drm/drmP.h>
16 #include <drm/drm_atomic.h>
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_crtc_helper.h>
19 #include <drm/drm_gem.h>
20 #include <drm/drm_gem_cma_helper.h>
21 #include <drm/drm_of.h>
22 #include <linux/component.h>
23 #include <linux/iommu.h>
24 #include <linux/of_address.h>
25 #include <linux/of_platform.h>
26 #include <linux/pm_runtime.h>
27
28 #include "mtk_drm_crtc.h"
29 #include "mtk_drm_ddp.h"
30 #include "mtk_drm_ddp_comp.h"
31 #include "mtk_drm_drv.h"
32 #include "mtk_drm_fb.h"
33 #include "mtk_drm_gem.h"
34
35 #define DRIVER_NAME "mediatek"
36 #define DRIVER_DESC "Mediatek SoC DRM"
37 #define DRIVER_DATE "20150513"
38 #define DRIVER_MAJOR 1
39 #define DRIVER_MINOR 0
40
41 static void mtk_atomic_schedule(struct mtk_drm_private *private,
42                                 struct drm_atomic_state *state)
43 {
44         private->commit.state = state;
45         schedule_work(&private->commit.work);
46 }
47
48 static void mtk_atomic_wait_for_fences(struct drm_atomic_state *state)
49 {
50         struct drm_plane *plane;
51         struct drm_plane_state *new_plane_state;
52         int i;
53
54         for_each_new_plane_in_state(state, plane, new_plane_state, i)
55                 mtk_fb_wait(new_plane_state->fb);
56 }
57
58 static void mtk_atomic_complete(struct mtk_drm_private *private,
59                                 struct drm_atomic_state *state)
60 {
61         struct drm_device *drm = private->drm;
62
63         mtk_atomic_wait_for_fences(state);
64
65         /*
66          * Mediatek drm supports runtime PM, so plane registers cannot be
67          * written when their crtc is disabled.
68          *
69          * The comment for drm_atomic_helper_commit states:
70          *     For drivers supporting runtime PM the recommended sequence is
71          *
72          *     drm_atomic_helper_commit_modeset_disables(dev, state);
73          *     drm_atomic_helper_commit_modeset_enables(dev, state);
74          *     drm_atomic_helper_commit_planes(dev, state,
75          *                                     DRM_PLANE_COMMIT_ACTIVE_ONLY);
76          *
77          * See the kerneldoc entries for these three functions for more details.
78          */
79         drm_atomic_helper_commit_modeset_disables(drm, state);
80         drm_atomic_helper_commit_modeset_enables(drm, state);
81         drm_atomic_helper_commit_planes(drm, state,
82                                         DRM_PLANE_COMMIT_ACTIVE_ONLY);
83
84         drm_atomic_helper_wait_for_vblanks(drm, state);
85
86         drm_atomic_helper_cleanup_planes(drm, state);
87         drm_atomic_state_put(state);
88 }
89
90 static void mtk_atomic_work(struct work_struct *work)
91 {
92         struct mtk_drm_private *private = container_of(work,
93                         struct mtk_drm_private, commit.work);
94
95         mtk_atomic_complete(private, private->commit.state);
96 }
97
98 static int mtk_atomic_commit(struct drm_device *drm,
99                              struct drm_atomic_state *state,
100                              bool async)
101 {
102         struct mtk_drm_private *private = drm->dev_private;
103         int ret;
104
105         ret = drm_atomic_helper_prepare_planes(drm, state);
106         if (ret)
107                 return ret;
108
109         mutex_lock(&private->commit.lock);
110         flush_work(&private->commit.work);
111
112         ret = drm_atomic_helper_swap_state(state, true);
113         if (ret) {
114                 mutex_unlock(&private->commit.lock);
115                 drm_atomic_helper_cleanup_planes(drm, state);
116                 return ret;
117         }
118
119         drm_atomic_state_get(state);
120         if (async)
121                 mtk_atomic_schedule(private, state);
122         else
123                 mtk_atomic_complete(private, state);
124
125         mutex_unlock(&private->commit.lock);
126
127         return 0;
128 }
129
130 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
131         .fb_create = mtk_drm_mode_fb_create,
132         .atomic_check = drm_atomic_helper_check,
133         .atomic_commit = mtk_atomic_commit,
134 };
135
136 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
137         DDP_COMPONENT_OVL0,
138         DDP_COMPONENT_RDMA0,
139         DDP_COMPONENT_COLOR0,
140         DDP_COMPONENT_BLS,
141         DDP_COMPONENT_DSI0,
142 };
143
144 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
145         DDP_COMPONENT_RDMA1,
146         DDP_COMPONENT_DPI0,
147 };
148
149 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
150         DDP_COMPONENT_OVL0,
151         DDP_COMPONENT_COLOR0,
152         DDP_COMPONENT_AAL,
153         DDP_COMPONENT_OD,
154         DDP_COMPONENT_RDMA0,
155         DDP_COMPONENT_UFOE,
156         DDP_COMPONENT_DSI0,
157         DDP_COMPONENT_PWM0,
158 };
159
160 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
161         DDP_COMPONENT_OVL1,
162         DDP_COMPONENT_COLOR1,
163         DDP_COMPONENT_GAMMA,
164         DDP_COMPONENT_RDMA1,
165         DDP_COMPONENT_DPI0,
166 };
167
168 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
169         .main_path = mt2701_mtk_ddp_main,
170         .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
171         .ext_path = mt2701_mtk_ddp_ext,
172         .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
173         .shadow_register = true,
174 };
175
176 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
177         .main_path = mt8173_mtk_ddp_main,
178         .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
179         .ext_path = mt8173_mtk_ddp_ext,
180         .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
181 };
182
183 static int mtk_drm_kms_init(struct drm_device *drm)
184 {
185         struct mtk_drm_private *private = drm->dev_private;
186         struct platform_device *pdev;
187         struct device_node *np;
188         struct device *dma_dev;
189         int ret;
190
191         if (!iommu_present(&platform_bus_type))
192                 return -EPROBE_DEFER;
193
194         pdev = of_find_device_by_node(private->mutex_node);
195         if (!pdev) {
196                 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n",
197                         private->mutex_node);
198                 of_node_put(private->mutex_node);
199                 return -EPROBE_DEFER;
200         }
201         private->mutex_dev = &pdev->dev;
202
203         drm_mode_config_init(drm);
204
205         drm->mode_config.min_width = 64;
206         drm->mode_config.min_height = 64;
207
208         /*
209          * set max width and height as default value(4096x4096).
210          * this value would be used to check framebuffer size limitation
211          * at drm_mode_addfb().
212          */
213         drm->mode_config.max_width = 4096;
214         drm->mode_config.max_height = 4096;
215         drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
216
217         ret = component_bind_all(drm->dev, drm);
218         if (ret)
219                 goto err_config_cleanup;
220
221         /*
222          * We currently support two fixed data streams, each optional,
223          * and each statically assigned to a crtc:
224          * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
225          */
226         ret = mtk_drm_crtc_create(drm, private->data->main_path,
227                                   private->data->main_len);
228         if (ret < 0)
229                 goto err_component_unbind;
230         /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
231         ret = mtk_drm_crtc_create(drm, private->data->ext_path,
232                                   private->data->ext_len);
233         if (ret < 0)
234                 goto err_component_unbind;
235
236         /* Use OVL device for all DMA memory allocations */
237         np = private->comp_node[private->data->main_path[0]] ?:
238              private->comp_node[private->data->ext_path[0]];
239         pdev = of_find_device_by_node(np);
240         if (!pdev) {
241                 ret = -ENODEV;
242                 dev_err(drm->dev, "Need at least one OVL device\n");
243                 goto err_component_unbind;
244         }
245
246         dma_dev = &pdev->dev;
247         private->dma_dev = dma_dev;
248
249         /*
250          * Configure the DMA segment size to make sure we get contiguous IOVA
251          * when importing PRIME buffers.
252          */
253         if (!dma_dev->dma_parms) {
254                 private->dma_parms_allocated = true;
255                 dma_dev->dma_parms =
256                         devm_kzalloc(drm->dev, sizeof(*dma_dev->dma_parms),
257                                      GFP_KERNEL);
258         }
259         if (!dma_dev->dma_parms) {
260                 ret = -ENOMEM;
261                 goto err_component_unbind;
262         }
263
264         ret = dma_set_max_seg_size(dma_dev, (unsigned int)DMA_BIT_MASK(32));
265         if (ret) {
266                 dev_err(dma_dev, "Failed to set DMA segment size\n");
267                 goto err_unset_dma_parms;
268         }
269
270         /*
271          * We don't use the drm_irq_install() helpers provided by the DRM
272          * core, so we need to set this manually in order to allow the
273          * DRM_IOCTL_WAIT_VBLANK to operate correctly.
274          */
275         drm->irq_enabled = true;
276         ret = drm_vblank_init(drm, MAX_CRTC);
277         if (ret < 0)
278                 goto err_unset_dma_parms;
279
280         drm_kms_helper_poll_init(drm);
281         drm_mode_config_reset(drm);
282
283         return 0;
284
285 err_unset_dma_parms:
286         if (private->dma_parms_allocated)
287                 dma_dev->dma_parms = NULL;
288 err_component_unbind:
289         component_unbind_all(drm->dev, drm);
290 err_config_cleanup:
291         drm_mode_config_cleanup(drm);
292
293         return ret;
294 }
295
296 static void mtk_drm_kms_deinit(struct drm_device *drm)
297 {
298         struct mtk_drm_private *private = drm->dev_private;
299
300         drm_kms_helper_poll_fini(drm);
301         drm_atomic_helper_shutdown(drm);
302
303         if (private->dma_parms_allocated)
304                 private->dma_dev->dma_parms = NULL;
305
306         component_unbind_all(drm->dev, drm);
307         drm_mode_config_cleanup(drm);
308 }
309
310 static const struct file_operations mtk_drm_fops = {
311         .owner = THIS_MODULE,
312         .open = drm_open,
313         .release = drm_release,
314         .unlocked_ioctl = drm_ioctl,
315         .mmap = mtk_drm_gem_mmap,
316         .poll = drm_poll,
317         .read = drm_read,
318         .compat_ioctl = drm_compat_ioctl,
319 };
320
321 /*
322  * We need to override this because the device used to import the memory is
323  * not dev->dev, as drm_gem_prime_import() expects.
324  */
325 struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,
326                                                 struct dma_buf *dma_buf)
327 {
328         struct mtk_drm_private *private = dev->dev_private;
329
330         return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
331 }
332
333 static struct drm_driver mtk_drm_driver = {
334         .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
335                            DRIVER_ATOMIC,
336
337         .gem_free_object_unlocked = mtk_drm_gem_free_object,
338         .gem_vm_ops = &drm_gem_cma_vm_ops,
339         .dumb_create = mtk_drm_gem_dumb_create,
340
341         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
342         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
343         .gem_prime_export = drm_gem_prime_export,
344         .gem_prime_import = mtk_drm_gem_prime_import,
345         .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
346         .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
347         .gem_prime_mmap = mtk_drm_gem_mmap_buf,
348         .fops = &mtk_drm_fops,
349
350         .name = DRIVER_NAME,
351         .desc = DRIVER_DESC,
352         .date = DRIVER_DATE,
353         .major = DRIVER_MAJOR,
354         .minor = DRIVER_MINOR,
355 };
356
357 static int compare_of(struct device *dev, void *data)
358 {
359         return dev->of_node == data;
360 }
361
362 static int mtk_drm_bind(struct device *dev)
363 {
364         struct mtk_drm_private *private = dev_get_drvdata(dev);
365         struct drm_device *drm;
366         int ret;
367
368         drm = drm_dev_alloc(&mtk_drm_driver, dev);
369         if (IS_ERR(drm))
370                 return PTR_ERR(drm);
371
372         drm->dev_private = private;
373         private->drm = drm;
374
375         ret = mtk_drm_kms_init(drm);
376         if (ret < 0)
377                 goto err_free;
378
379         ret = drm_dev_register(drm, 0);
380         if (ret < 0)
381                 goto err_deinit;
382
383         return 0;
384
385 err_deinit:
386         mtk_drm_kms_deinit(drm);
387 err_free:
388         drm_dev_unref(drm);
389         return ret;
390 }
391
392 static void mtk_drm_unbind(struct device *dev)
393 {
394         struct mtk_drm_private *private = dev_get_drvdata(dev);
395
396         drm_dev_unregister(private->drm);
397         drm_dev_unref(private->drm);
398         private->drm = NULL;
399 }
400
401 static const struct component_master_ops mtk_drm_ops = {
402         .bind           = mtk_drm_bind,
403         .unbind         = mtk_drm_unbind,
404 };
405
406 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
407         { .compatible = "mediatek,mt2701-disp-ovl",   .data = (void *)MTK_DISP_OVL },
408         { .compatible = "mediatek,mt8173-disp-ovl",   .data = (void *)MTK_DISP_OVL },
409         { .compatible = "mediatek,mt2701-disp-rdma",  .data = (void *)MTK_DISP_RDMA },
410         { .compatible = "mediatek,mt8173-disp-rdma",  .data = (void *)MTK_DISP_RDMA },
411         { .compatible = "mediatek,mt8173-disp-wdma",  .data = (void *)MTK_DISP_WDMA },
412         { .compatible = "mediatek,mt2701-disp-color", .data = (void *)MTK_DISP_COLOR },
413         { .compatible = "mediatek,mt8173-disp-color", .data = (void *)MTK_DISP_COLOR },
414         { .compatible = "mediatek,mt8173-disp-aal",   .data = (void *)MTK_DISP_AAL},
415         { .compatible = "mediatek,mt8173-disp-gamma", .data = (void *)MTK_DISP_GAMMA, },
416         { .compatible = "mediatek,mt8173-disp-ufoe",  .data = (void *)MTK_DISP_UFOE },
417         { .compatible = "mediatek,mt2701-dsi",        .data = (void *)MTK_DSI },
418         { .compatible = "mediatek,mt8173-dsi",        .data = (void *)MTK_DSI },
419         { .compatible = "mediatek,mt8173-dpi",        .data = (void *)MTK_DPI },
420         { .compatible = "mediatek,mt2701-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
421         { .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
422         { .compatible = "mediatek,mt2701-disp-pwm",   .data = (void *)MTK_DISP_BLS },
423         { .compatible = "mediatek,mt8173-disp-pwm",   .data = (void *)MTK_DISP_PWM },
424         { .compatible = "mediatek,mt8173-disp-od",    .data = (void *)MTK_DISP_OD },
425         { }
426 };
427
428 static int mtk_drm_probe(struct platform_device *pdev)
429 {
430         struct device *dev = &pdev->dev;
431         struct mtk_drm_private *private;
432         struct resource *mem;
433         struct device_node *node;
434         struct component_match *match = NULL;
435         int ret;
436         int i;
437
438         private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
439         if (!private)
440                 return -ENOMEM;
441
442         mutex_init(&private->commit.lock);
443         INIT_WORK(&private->commit.work, mtk_atomic_work);
444         private->data = of_device_get_match_data(dev);
445
446         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
447         private->config_regs = devm_ioremap_resource(dev, mem);
448         if (IS_ERR(private->config_regs)) {
449                 ret = PTR_ERR(private->config_regs);
450                 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
451                         ret);
452                 return ret;
453         }
454
455         /* Iterate over sibling DISP function blocks */
456         for_each_child_of_node(dev->of_node->parent, node) {
457                 const struct of_device_id *of_id;
458                 enum mtk_ddp_comp_type comp_type;
459                 int comp_id;
460
461                 of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
462                 if (!of_id)
463                         continue;
464
465                 if (!of_device_is_available(node)) {
466                         dev_dbg(dev, "Skipping disabled component %pOF\n",
467                                 node);
468                         continue;
469                 }
470
471                 comp_type = (enum mtk_ddp_comp_type)of_id->data;
472
473                 if (comp_type == MTK_DISP_MUTEX) {
474                         private->mutex_node = of_node_get(node);
475                         continue;
476                 }
477
478                 comp_id = mtk_ddp_comp_get_id(node, comp_type);
479                 if (comp_id < 0) {
480                         dev_warn(dev, "Skipping unknown component %pOF\n",
481                                  node);
482                         continue;
483                 }
484
485                 private->comp_node[comp_id] = of_node_get(node);
486
487                 /*
488                  * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have
489                  * separate component platform drivers and initialize their own
490                  * DDP component structure. The others are initialized here.
491                  */
492                 if (comp_type == MTK_DISP_COLOR ||
493                     comp_type == MTK_DISP_OVL ||
494                     comp_type == MTK_DISP_RDMA ||
495                     comp_type == MTK_DSI ||
496                     comp_type == MTK_DPI) {
497                         dev_info(dev, "Adding component match for %pOF\n",
498                                  node);
499                         drm_of_component_match_add(dev, &match, compare_of,
500                                                    node);
501                 } else {
502                         struct mtk_ddp_comp *comp;
503
504                         comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
505                         if (!comp) {
506                                 ret = -ENOMEM;
507                                 of_node_put(node);
508                                 goto err_node;
509                         }
510
511                         ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
512                         if (ret) {
513                                 of_node_put(node);
514                                 goto err_node;
515                         }
516
517                         private->ddp_comp[comp_id] = comp;
518                 }
519         }
520
521         if (!private->mutex_node) {
522                 dev_err(dev, "Failed to find disp-mutex node\n");
523                 ret = -ENODEV;
524                 goto err_node;
525         }
526
527         pm_runtime_enable(dev);
528
529         platform_set_drvdata(pdev, private);
530
531         ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
532         if (ret)
533                 goto err_pm;
534
535         return 0;
536
537 err_pm:
538         pm_runtime_disable(dev);
539 err_node:
540         of_node_put(private->mutex_node);
541         for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) {
542                 of_node_put(private->comp_node[i]);
543                 if (private->ddp_comp[i]) {
544                         put_device(private->ddp_comp[i]->larb_dev);
545                         private->ddp_comp[i] = NULL;
546                 }
547         }
548         return ret;
549 }
550
551 static int mtk_drm_remove(struct platform_device *pdev)
552 {
553         struct mtk_drm_private *private = platform_get_drvdata(pdev);
554         struct drm_device *drm = private->drm;
555         int i;
556
557         drm_dev_unregister(drm);
558         mtk_drm_kms_deinit(drm);
559         drm_dev_unref(drm);
560
561         component_master_del(&pdev->dev, &mtk_drm_ops);
562         pm_runtime_disable(&pdev->dev);
563         of_node_put(private->mutex_node);
564         for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
565                 of_node_put(private->comp_node[i]);
566
567         return 0;
568 }
569
570 #ifdef CONFIG_PM_SLEEP
571 static int mtk_drm_sys_suspend(struct device *dev)
572 {
573         struct mtk_drm_private *private = dev_get_drvdata(dev);
574         struct drm_device *drm = private->drm;
575
576         drm_kms_helper_poll_disable(drm);
577
578         private->suspend_state = drm_atomic_helper_suspend(drm);
579         if (IS_ERR(private->suspend_state)) {
580                 drm_kms_helper_poll_enable(drm);
581                 return PTR_ERR(private->suspend_state);
582         }
583
584         DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
585         return 0;
586 }
587
588 static int mtk_drm_sys_resume(struct device *dev)
589 {
590         struct mtk_drm_private *private = dev_get_drvdata(dev);
591         struct drm_device *drm = private->drm;
592
593         drm_atomic_helper_resume(drm, private->suspend_state);
594         drm_kms_helper_poll_enable(drm);
595
596         DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
597         return 0;
598 }
599 #endif
600
601 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
602                          mtk_drm_sys_resume);
603
604 static const struct of_device_id mtk_drm_of_ids[] = {
605         { .compatible = "mediatek,mt2701-mmsys",
606           .data = &mt2701_mmsys_driver_data},
607         { .compatible = "mediatek,mt8173-mmsys",
608           .data = &mt8173_mmsys_driver_data},
609         { }
610 };
611
612 static struct platform_driver mtk_drm_platform_driver = {
613         .probe  = mtk_drm_probe,
614         .remove = mtk_drm_remove,
615         .driver = {
616                 .name   = "mediatek-drm",
617                 .of_match_table = mtk_drm_of_ids,
618                 .pm     = &mtk_drm_pm_ops,
619         },
620 };
621
622 static struct platform_driver * const mtk_drm_drivers[] = {
623         &mtk_ddp_driver,
624         &mtk_disp_color_driver,
625         &mtk_disp_ovl_driver,
626         &mtk_disp_rdma_driver,
627         &mtk_dpi_driver,
628         &mtk_drm_platform_driver,
629         &mtk_dsi_driver,
630         &mtk_mipi_tx_driver,
631 };
632
633 static int __init mtk_drm_init(void)
634 {
635         return platform_register_drivers(mtk_drm_drivers,
636                                          ARRAY_SIZE(mtk_drm_drivers));
637 }
638
639 static void __exit mtk_drm_exit(void)
640 {
641         platform_unregister_drivers(mtk_drm_drivers,
642                                     ARRAY_SIZE(mtk_drm_drivers));
643 }
644
645 module_init(mtk_drm_init);
646 module_exit(mtk_drm_exit);
647
648 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
649 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
650 MODULE_LICENSE("GPL v2");