drivers/gpu/drm/mediatek/mtk_drm_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2015 MediaTek Inc.
   4  * Author: YT SHEN <yt.shen@mediatek.com>
   5  */
   6
   7 #include <linux/component.h>
   8 #include <linux/iommu.h>
   9 #include <linux/module.h>
  10 #include <linux/of_address.h>
  11 #include <linux/of_platform.h>
  12 #include <linux/pm_runtime.h>
  13 #include <linux/dma-mapping.h>
  14
  15 #include <drm/drm_atomic.h>
  16 #include <drm/drm_atomic_helper.h>
  17 #include <drm/drm_drv.h>
  18 #include <drm/drm_fb_helper.h>
  19 #include <drm/drm_fourcc.h>
  20 #include <drm/drm_gem.h>
  21 #include <drm/drm_gem_cma_helper.h>
  22 #include <drm/drm_gem_framebuffer_helper.h>
  23 #include <drm/drm_of.h>
  24 #include <drm/drm_probe_helper.h>
  25 #include <drm/drm_vblank.h>
  26
  27 #include "mtk_drm_crtc.h"
  28 #include "mtk_drm_ddp_comp.h"
  29 #include "mtk_drm_drv.h"
  30 #include "mtk_drm_gem.h"
  31
  32 #define DRIVER_NAME "mediatek"
  33 #define DRIVER_DESC "Mediatek SoC DRM"
  34 #define DRIVER_DATE "20150513"
  35 #define DRIVER_MAJOR 1
  36 #define DRIVER_MINOR 0
  37
  38 static const struct drm_mode_config_helper_funcs mtk_drm_mode_config_helpers = {
  39         .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
  40 };
  41
  42 static struct drm_framebuffer *
  43 mtk_drm_mode_fb_create(struct drm_device *dev,
  44                        struct drm_file *file,
  45                        const struct drm_mode_fb_cmd2 *cmd)
  46 {
  47         const struct drm_format_info *info = drm_get_format_info(dev, cmd);
  48
  49         if (info->num_planes != 1)
  50                 return ERR_PTR(-EINVAL);
  51
  52         return drm_gem_fb_create(dev, file, cmd);
  53 }
  54
  55 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
  56         .fb_create = mtk_drm_mode_fb_create,
  57         .atomic_check = drm_atomic_helper_check,
  58         .atomic_commit = drm_atomic_helper_commit,
  59 };
  60
  61 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
  62         DDP_COMPONENT_OVL0,
  63         DDP_COMPONENT_RDMA0,
  64         DDP_COMPONENT_COLOR0,
  65         DDP_COMPONENT_BLS,
  66         DDP_COMPONENT_DSI0,
  67 };
  68
  69 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
  70         DDP_COMPONENT_RDMA1,
  71         DDP_COMPONENT_DPI0,
  72 };
  73
  74 static const enum mtk_ddp_comp_id mt7623_mtk_ddp_main[] = {
  75         DDP_COMPONENT_OVL0,
  76         DDP_COMPONENT_RDMA0,
  77         DDP_COMPONENT_COLOR0,
  78         DDP_COMPONENT_BLS,
  79         DDP_COMPONENT_DPI0,
  80 };
  81
  82 static const enum mtk_ddp_comp_id mt7623_mtk_ddp_ext[] = {
  83         DDP_COMPONENT_RDMA1,
  84         DDP_COMPONENT_DSI0,
  85 };
  86
  87 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
  88         DDP_COMPONENT_OVL0,
  89         DDP_COMPONENT_COLOR0,
  90         DDP_COMPONENT_AAL0,
  91         DDP_COMPONENT_OD0,
  92         DDP_COMPONENT_RDMA0,
  93         DDP_COMPONENT_DPI0,
  94         DDP_COMPONENT_PWM0,
  95 };
  96
  97 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
  98         DDP_COMPONENT_OVL1,
  99         DDP_COMPONENT_COLOR1,
 100         DDP_COMPONENT_AAL1,
 101         DDP_COMPONENT_OD1,
 102         DDP_COMPONENT_RDMA1,
 103         DDP_COMPONENT_DPI1,
 104         DDP_COMPONENT_PWM1,
 105 };
 106
 107 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
 108         DDP_COMPONENT_RDMA2,
 109         DDP_COMPONENT_DSI3,
 110         DDP_COMPONENT_PWM2,
 111 };
 112
 113 static enum mtk_ddp_comp_id mt8167_mtk_ddp_main[] = {
 114         DDP_COMPONENT_OVL0,
 115         DDP_COMPONENT_COLOR0,
 116         DDP_COMPONENT_CCORR,
 117         DDP_COMPONENT_AAL0,
 118         DDP_COMPONENT_GAMMA,
 119         DDP_COMPONENT_DITHER,
 120         DDP_COMPONENT_RDMA0,
 121         DDP_COMPONENT_DSI0,
 122 };
 123
 124 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
 125         DDP_COMPONENT_OVL0,
 126         DDP_COMPONENT_COLOR0,
 127         DDP_COMPONENT_AAL0,
 128         DDP_COMPONENT_OD0,
 129         DDP_COMPONENT_RDMA0,
 130         DDP_COMPONENT_UFOE,
 131         DDP_COMPONENT_DSI0,
 132         DDP_COMPONENT_PWM0,
 133 };
 134
 135 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
 136         DDP_COMPONENT_OVL1,
 137         DDP_COMPONENT_COLOR1,
 138         DDP_COMPONENT_GAMMA,
 139         DDP_COMPONENT_RDMA1,
 140         DDP_COMPONENT_DPI0,
 141 };
 142
 143 static const enum mtk_ddp_comp_id mt8183_mtk_ddp_main[] = {
 144         DDP_COMPONENT_OVL0,
 145         DDP_COMPONENT_OVL_2L0,
 146         DDP_COMPONENT_RDMA0,
 147         DDP_COMPONENT_COLOR0,
 148         DDP_COMPONENT_CCORR,
 149         DDP_COMPONENT_AAL0,
 150         DDP_COMPONENT_GAMMA,
 151         DDP_COMPONENT_DITHER,
 152         DDP_COMPONENT_DSI0,
 153 };
 154
 155 static const enum mtk_ddp_comp_id mt8183_mtk_ddp_ext[] = {
 156         DDP_COMPONENT_OVL_2L1,
 157         DDP_COMPONENT_RDMA1,
 158         DDP_COMPONENT_DPI0,
 159 };
 160
 161 static const enum mtk_ddp_comp_id mt8186_mtk_ddp_main[] = {
 162         DDP_COMPONENT_OVL0,
 163         DDP_COMPONENT_RDMA0,
 164         DDP_COMPONENT_COLOR0,
 165         DDP_COMPONENT_CCORR,
 166         DDP_COMPONENT_AAL0,
 167         DDP_COMPONENT_GAMMA,
 168         DDP_COMPONENT_POSTMASK0,
 169         DDP_COMPONENT_DITHER,
 170         DDP_COMPONENT_DSI0,
 171 };
 172
 173 static const enum mtk_ddp_comp_id mt8186_mtk_ddp_ext[] = {
 174         DDP_COMPONENT_OVL_2L0,
 175         DDP_COMPONENT_RDMA1,
 176         DDP_COMPONENT_DPI0,
 177 };
 178
 179 static const enum mtk_ddp_comp_id mt8192_mtk_ddp_main[] = {
 180         DDP_COMPONENT_OVL0,
 181         DDP_COMPONENT_OVL_2L0,
 182         DDP_COMPONENT_RDMA0,
 183         DDP_COMPONENT_COLOR0,
 184         DDP_COMPONENT_CCORR,
 185         DDP_COMPONENT_AAL0,
 186         DDP_COMPONENT_GAMMA,
 187         DDP_COMPONENT_POSTMASK0,
 188         DDP_COMPONENT_DITHER,
 189         DDP_COMPONENT_DSI0,
 190 };
 191
 192 static const enum mtk_ddp_comp_id mt8192_mtk_ddp_ext[] = {
 193         DDP_COMPONENT_OVL_2L2,
 194         DDP_COMPONENT_RDMA4,
 195         DDP_COMPONENT_DPI0,
 196 };
 197
 198 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
 199         .main_path = mt2701_mtk_ddp_main,
 200         .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
 201         .ext_path = mt2701_mtk_ddp_ext,
 202         .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
 203         .shadow_register = true,
 204 };
 205
 206 static const struct mtk_mmsys_driver_data mt7623_mmsys_driver_data = {
 207         .main_path = mt7623_mtk_ddp_main,
 208         .main_len = ARRAY_SIZE(mt7623_mtk_ddp_main),
 209         .ext_path = mt7623_mtk_ddp_ext,
 210         .ext_len = ARRAY_SIZE(mt7623_mtk_ddp_ext),
 211         .shadow_register = true,
 212 };
 213
 214 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
 215         .main_path = mt2712_mtk_ddp_main,
 216         .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
 217         .ext_path = mt2712_mtk_ddp_ext,
 218         .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
 219         .third_path = mt2712_mtk_ddp_third,
 220         .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
 221 };
 222
 223 static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data = {
 224         .main_path = mt8167_mtk_ddp_main,
 225         .main_len = ARRAY_SIZE(mt8167_mtk_ddp_main),
 226 };
 227
 228 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
 229         .main_path = mt8173_mtk_ddp_main,
 230         .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
 231         .ext_path = mt8173_mtk_ddp_ext,
 232         .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
 233 };
 234
 235 static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
 236         .main_path = mt8183_mtk_ddp_main,
 237         .main_len = ARRAY_SIZE(mt8183_mtk_ddp_main),
 238         .ext_path = mt8183_mtk_ddp_ext,
 239         .ext_len = ARRAY_SIZE(mt8183_mtk_ddp_ext),
 240 };
 241
 242 static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
 243         .main_path = mt8186_mtk_ddp_main,
 244         .main_len = ARRAY_SIZE(mt8186_mtk_ddp_main),
 245         .ext_path = mt8186_mtk_ddp_ext,
 246         .ext_len = ARRAY_SIZE(mt8186_mtk_ddp_ext),
 247 };
 248
 249 static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
 250         .main_path = mt8192_mtk_ddp_main,
 251         .main_len = ARRAY_SIZE(mt8192_mtk_ddp_main),
 252         .ext_path = mt8192_mtk_ddp_ext,
 253         .ext_len = ARRAY_SIZE(mt8192_mtk_ddp_ext),
 254 };
 255
 256 static int mtk_drm_kms_init(struct drm_device *drm)
 257 {
 258         struct mtk_drm_private *private = drm->dev_private;
 259         struct platform_device *pdev;
 260         struct device_node *np;
 261         struct device *dma_dev;
 262         int ret;
 263
 264         if (drm_firmware_drivers_only())
 265                 return -ENODEV;
 266
 267         if (!iommu_present(&platform_bus_type))
 268                 return -EPROBE_DEFER;
 269
 270         pdev = of_find_device_by_node(private->mutex_node);
 271         if (!pdev) {
 272                 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n",
 273                         private->mutex_node);
 274                 of_node_put(private->mutex_node);
 275                 return -EPROBE_DEFER;
 276         }
 277         private->mutex_dev = &pdev->dev;
 278
 279         ret = drmm_mode_config_init(drm);
 280         if (ret)
 281                 goto put_mutex_dev;
 282
 283         drm->mode_config.min_width = 64;
 284         drm->mode_config.min_height = 64;
 285
 286         /*
 287          * set max width and height as default value(4096x4096).
 288          * this value would be used to check framebuffer size limitation
 289          * at drm_mode_addfb().
 290          */
 291         drm->mode_config.max_width = 4096;
 292         drm->mode_config.max_height = 4096;
 293         drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
 294         drm->mode_config.helper_private = &mtk_drm_mode_config_helpers;
 295
 296         ret = component_bind_all(drm->dev, drm);
 297         if (ret)
 298                 goto put_mutex_dev;
 299
 300         /*
 301          * We currently support two fixed data streams, each optional,
 302          * and each statically assigned to a crtc:
 303          * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
 304          */
 305         ret = mtk_drm_crtc_create(drm, private->data->main_path,
 306                                   private->data->main_len);
 307         if (ret < 0)
 308                 goto err_component_unbind;
 309         /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
 310         ret = mtk_drm_crtc_create(drm, private->data->ext_path,
 311                                   private->data->ext_len);
 312         if (ret < 0)
 313                 goto err_component_unbind;
 314
 315         ret = mtk_drm_crtc_create(drm, private->data->third_path,
 316                                   private->data->third_len);
 317         if (ret < 0)
 318                 goto err_component_unbind;
 319
 320         /* Use OVL device for all DMA memory allocations */
 321         np = private->comp_node[private->data->main_path[0]] ?:
 322              private->comp_node[private->data->ext_path[0]];
 323         pdev = of_find_device_by_node(np);
 324         if (!pdev) {
 325                 ret = -ENODEV;
 326                 dev_err(drm->dev, "Need at least one OVL device\n");
 327                 goto err_component_unbind;
 328         }
 329
 330         dma_dev = &pdev->dev;
 331         private->dma_dev = dma_dev;
 332
 333         /*
 334          * Configure the DMA segment size to make sure we get contiguous IOVA
 335          * when importing PRIME buffers.
 336          */
 337         ret = dma_set_max_seg_size(dma_dev, UINT_MAX);
 338         if (ret) {
 339                 dev_err(dma_dev, "Failed to set DMA segment size\n");
 340                 goto err_component_unbind;
 341         }
 342
 343         ret = drm_vblank_init(drm, MAX_CRTC);
 344         if (ret < 0)
 345                 goto err_component_unbind;
 346
 347         drm_kms_helper_poll_init(drm);
 348         drm_mode_config_reset(drm);
 349
 350         return 0;
 351
 352 err_component_unbind:
 353         component_unbind_all(drm->dev, drm);
 354 put_mutex_dev:
 355         put_device(private->mutex_dev);
 356         return ret;
 357 }
 358
 359 static void mtk_drm_kms_deinit(struct drm_device *drm)
 360 {
 361         drm_kms_helper_poll_fini(drm);
 362         drm_atomic_helper_shutdown(drm);
 363
 364         component_unbind_all(drm->dev, drm);
 365 }
 366
 367 DEFINE_DRM_GEM_FOPS(mtk_drm_fops);
 368
 369 /*
 370  * We need to override this because the device used to import the memory is
 371  * not dev->dev, as drm_gem_prime_import() expects.
 372  */
 373 static struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,
 374                                                        struct dma_buf *dma_buf)
 375 {
 376         struct mtk_drm_private *private = dev->dev_private;
 377
 378         return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
 379 }
 380
 381 static const struct drm_driver mtk_drm_driver = {
 382         .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
 383
 384         .dumb_create = mtk_drm_gem_dumb_create,
 385
 386         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 387         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 388         .gem_prime_import = mtk_drm_gem_prime_import,
 389         .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
 390         .gem_prime_mmap = drm_gem_prime_mmap,
 391         .fops = &mtk_drm_fops,
 392
 393         .name = DRIVER_NAME,
 394         .desc = DRIVER_DESC,
 395         .date = DRIVER_DATE,
 396         .major = DRIVER_MAJOR,
 397         .minor = DRIVER_MINOR,
 398 };
 399
 400 static int mtk_drm_bind(struct device *dev)
 401 {
 402         struct mtk_drm_private *private = dev_get_drvdata(dev);
 403         struct drm_device *drm;
 404         int ret;
 405
 406         drm = drm_dev_alloc(&mtk_drm_driver, dev);
 407         if (IS_ERR(drm))
 408                 return PTR_ERR(drm);
 409
 410         drm->dev_private = private;
 411         private->drm = drm;
 412
 413         ret = mtk_drm_kms_init(drm);
 414         if (ret < 0)
 415                 goto err_free;
 416
 417         ret = drm_dev_register(drm, 0);
 418         if (ret < 0)
 419                 goto err_deinit;
 420
 421         drm_fbdev_generic_setup(drm, 32);
 422
 423         return 0;
 424
 425 err_deinit:
 426         mtk_drm_kms_deinit(drm);
 427 err_free:
 428         drm_dev_put(drm);
 429         return ret;
 430 }
 431
 432 static void mtk_drm_unbind(struct device *dev)
 433 {
 434         struct mtk_drm_private *private = dev_get_drvdata(dev);
 435
 436         drm_dev_unregister(private->drm);
 437         mtk_drm_kms_deinit(private->drm);
 438         drm_dev_put(private->drm);
 439         private->num_pipes = 0;
 440         private->drm = NULL;
 441 }
 442
 443 static const struct component_master_ops mtk_drm_ops = {
 444         .bind           = mtk_drm_bind,
 445         .unbind         = mtk_drm_unbind,
 446 };
 447
 448 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
 449         { .compatible = "mediatek,mt8167-disp-aal",
 450           .data = (void *)MTK_DISP_AAL},
 451         { .compatible = "mediatek,mt8173-disp-aal",
 452           .data = (void *)MTK_DISP_AAL},
 453         { .compatible = "mediatek,mt8183-disp-aal",
 454           .data = (void *)MTK_DISP_AAL},
 455         { .compatible = "mediatek,mt8192-disp-aal",
 456           .data = (void *)MTK_DISP_AAL},
 457         { .compatible = "mediatek,mt8167-disp-ccorr",
 458           .data = (void *)MTK_DISP_CCORR },
 459         { .compatible = "mediatek,mt8183-disp-ccorr",
 460           .data = (void *)MTK_DISP_CCORR },
 461         { .compatible = "mediatek,mt8192-disp-ccorr",
 462           .data = (void *)MTK_DISP_CCORR },
 463         { .compatible = "mediatek,mt2701-disp-color",
 464           .data = (void *)MTK_DISP_COLOR },
 465         { .compatible = "mediatek,mt8167-disp-color",
 466           .data = (void *)MTK_DISP_COLOR },
 467         { .compatible = "mediatek,mt8173-disp-color",
 468           .data = (void *)MTK_DISP_COLOR },
 469         { .compatible = "mediatek,mt8167-disp-dither",
 470           .data = (void *)MTK_DISP_DITHER },
 471         { .compatible = "mediatek,mt8183-disp-dither",
 472           .data = (void *)MTK_DISP_DITHER },
 473         { .compatible = "mediatek,mt8167-disp-gamma",
 474           .data = (void *)MTK_DISP_GAMMA, },
 475         { .compatible = "mediatek,mt8173-disp-gamma",
 476           .data = (void *)MTK_DISP_GAMMA, },
 477         { .compatible = "mediatek,mt8183-disp-gamma",
 478           .data = (void *)MTK_DISP_GAMMA, },
 479         { .compatible = "mediatek,mt2701-disp-mutex",
 480           .data = (void *)MTK_DISP_MUTEX },
 481         { .compatible = "mediatek,mt2712-disp-mutex",
 482           .data = (void *)MTK_DISP_MUTEX },
 483         { .compatible = "mediatek,mt8167-disp-mutex",
 484           .data = (void *)MTK_DISP_MUTEX },
 485         { .compatible = "mediatek,mt8173-disp-mutex",
 486           .data = (void *)MTK_DISP_MUTEX },
 487         { .compatible = "mediatek,mt8183-disp-mutex",
 488           .data = (void *)MTK_DISP_MUTEX },
 489         { .compatible = "mediatek,mt8186-disp-mutex",
 490           .data = (void *)MTK_DISP_MUTEX },
 491         { .compatible = "mediatek,mt8192-disp-mutex",
 492           .data = (void *)MTK_DISP_MUTEX },
 493         { .compatible = "mediatek,mt8173-disp-od",
 494           .data = (void *)MTK_DISP_OD },
 495         { .compatible = "mediatek,mt2701-disp-ovl",
 496           .data = (void *)MTK_DISP_OVL },
 497         { .compatible = "mediatek,mt8167-disp-ovl",
 498           .data = (void *)MTK_DISP_OVL },
 499         { .compatible = "mediatek,mt8173-disp-ovl",
 500           .data = (void *)MTK_DISP_OVL },
 501         { .compatible = "mediatek,mt8183-disp-ovl",
 502           .data = (void *)MTK_DISP_OVL },
 503         { .compatible = "mediatek,mt8192-disp-ovl",
 504           .data = (void *)MTK_DISP_OVL },
 505         { .compatible = "mediatek,mt8183-disp-ovl-2l",
 506           .data = (void *)MTK_DISP_OVL_2L },
 507         { .compatible = "mediatek,mt8192-disp-ovl-2l",
 508           .data = (void *)MTK_DISP_OVL_2L },
 509         { .compatible = "mediatek,mt8192-disp-postmask",
 510           .data = (void *)MTK_DISP_POSTMASK },
 511         { .compatible = "mediatek,mt2701-disp-pwm",
 512           .data = (void *)MTK_DISP_BLS },
 513         { .compatible = "mediatek,mt8167-disp-pwm",
 514           .data = (void *)MTK_DISP_PWM },
 515         { .compatible = "mediatek,mt8173-disp-pwm",
 516           .data = (void *)MTK_DISP_PWM },
 517         { .compatible = "mediatek,mt2701-disp-rdma",
 518           .data = (void *)MTK_DISP_RDMA },
 519         { .compatible = "mediatek,mt8167-disp-rdma",
 520           .data = (void *)MTK_DISP_RDMA },
 521         { .compatible = "mediatek,mt8173-disp-rdma",
 522           .data = (void *)MTK_DISP_RDMA },
 523         { .compatible = "mediatek,mt8183-disp-rdma",
 524           .data = (void *)MTK_DISP_RDMA },
 525         { .compatible = "mediatek,mt8192-disp-rdma",
 526           .data = (void *)MTK_DISP_RDMA },
 527         { .compatible = "mediatek,mt8173-disp-ufoe",
 528           .data = (void *)MTK_DISP_UFOE },
 529         { .compatible = "mediatek,mt8173-disp-wdma",
 530           .data = (void *)MTK_DISP_WDMA },
 531         { .compatible = "mediatek,mt2701-dpi",
 532           .data = (void *)MTK_DPI },
 533         { .compatible = "mediatek,mt8167-dsi",
 534           .data = (void *)MTK_DSI },
 535         { .compatible = "mediatek,mt8173-dpi",
 536           .data = (void *)MTK_DPI },
 537         { .compatible = "mediatek,mt8183-dpi",
 538           .data = (void *)MTK_DPI },
 539         { .compatible = "mediatek,mt8192-dpi",
 540           .data = (void *)MTK_DPI },
 541         { .compatible = "mediatek,mt2701-dsi",
 542           .data = (void *)MTK_DSI },
 543         { .compatible = "mediatek,mt8173-dsi",
 544           .data = (void *)MTK_DSI },
 545         { .compatible = "mediatek,mt8183-dsi",
 546           .data = (void *)MTK_DSI },
 547         { }
 548 };
 549
 550 static const struct of_device_id mtk_drm_of_ids[] = {
 551         { .compatible = "mediatek,mt2701-mmsys",
 552           .data = &mt2701_mmsys_driver_data},
 553         { .compatible = "mediatek,mt7623-mmsys",
 554           .data = &mt7623_mmsys_driver_data},
 555         { .compatible = "mediatek,mt2712-mmsys",
 556           .data = &mt2712_mmsys_driver_data},
 557         { .compatible = "mediatek,mt8167-mmsys",
 558           .data = &mt8167_mmsys_driver_data},
 559         { .compatible = "mediatek,mt8173-mmsys",
 560           .data = &mt8173_mmsys_driver_data},
 561         { .compatible = "mediatek,mt8183-mmsys",
 562           .data = &mt8183_mmsys_driver_data},
 563         { .compatible = "mediatek,mt8186-mmsys",
 564           .data = &mt8186_mmsys_driver_data},
 565         { .compatible = "mediatek,mt8192-mmsys",
 566           .data = &mt8192_mmsys_driver_data},
 567         { }
 568 };
 569 MODULE_DEVICE_TABLE(of, mtk_drm_of_ids);
 570
 571 static int mtk_drm_probe(struct platform_device *pdev)
 572 {
 573         struct device *dev = &pdev->dev;
 574         struct device_node *phandle = dev->parent->of_node;
 575         const struct of_device_id *of_id;
 576         struct mtk_drm_private *private;
 577         struct device_node *node;
 578         struct component_match *match = NULL;
 579         int ret;
 580         int i;
 581
 582         private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
 583         if (!private)
 584                 return -ENOMEM;
 585
 586         private->mmsys_dev = dev->parent;
 587         if (!private->mmsys_dev) {
 588                 dev_err(dev, "Failed to get MMSYS device\n");
 589                 return -ENODEV;
 590         }
 591
 592         of_id = of_match_node(mtk_drm_of_ids, phandle);
 593         if (!of_id)
 594                 return -ENODEV;
 595
 596         private->data = of_id->data;
 597
 598         /* Iterate over sibling DISP function blocks */
 599         for_each_child_of_node(phandle->parent, node) {
 600                 const struct of_device_id *of_id;
 601                 enum mtk_ddp_comp_type comp_type;
 602                 int comp_id;
 603
 604                 of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
 605                 if (!of_id)
 606                         continue;
 607
 608                 if (!of_device_is_available(node)) {
 609                         dev_dbg(dev, "Skipping disabled component %pOF\n",
 610                                 node);
 611                         continue;
 612                 }
 613
 614                 comp_type = (enum mtk_ddp_comp_type)of_id->data;
 615
 616                 if (comp_type == MTK_DISP_MUTEX) {
 617                         private->mutex_node = of_node_get(node);
 618                         continue;
 619                 }
 620
 621                 comp_id = mtk_ddp_comp_get_id(node, comp_type);
 622                 if (comp_id < 0) {
 623                         dev_warn(dev, "Skipping unknown component %pOF\n",
 624                                  node);
 625                         continue;
 626                 }
 627
 628                 private->comp_node[comp_id] = of_node_get(node);
 629
 630                 /*
 631                  * Currently only the AAL, CCORR, COLOR, GAMMA, OVL, RDMA, DSI, and DPI
 632                  * blocks have separate component platform drivers and initialize their own
 633                  * DDP component structure. The others are initialized here.
 634                  */
 635                 if (comp_type == MTK_DISP_AAL ||
 636                     comp_type == MTK_DISP_CCORR ||
 637                     comp_type == MTK_DISP_COLOR ||
 638                     comp_type == MTK_DISP_GAMMA ||
 639                     comp_type == MTK_DISP_OVL ||
 640                     comp_type == MTK_DISP_OVL_2L ||
 641                     comp_type == MTK_DISP_RDMA ||
 642                     comp_type == MTK_DPI ||
 643                     comp_type == MTK_DSI) {
 644                         dev_info(dev, "Adding component match for %pOF\n",
 645                                  node);
 646                         drm_of_component_match_add(dev, &match, component_compare_of,
 647                                                    node);
 648                 }
 649
 650                 ret = mtk_ddp_comp_init(node, &private->ddp_comp[comp_id], comp_id);
 651                 if (ret) {
 652                         of_node_put(node);
 653                         goto err_node;
 654                 }
 655         }
 656
 657         if (!private->mutex_node) {
 658                 dev_err(dev, "Failed to find disp-mutex node\n");
 659                 ret = -ENODEV;
 660                 goto err_node;
 661         }
 662
 663         pm_runtime_enable(dev);
 664
 665         platform_set_drvdata(pdev, private);
 666
 667         ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
 668         if (ret)
 669                 goto err_pm;
 670
 671         return 0;
 672
 673 err_pm:
 674         pm_runtime_disable(dev);
 675 err_node:
 676         of_node_put(private->mutex_node);
 677         for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
 678                 of_node_put(private->comp_node[i]);
 679         return ret;
 680 }
 681
 682 static int mtk_drm_remove(struct platform_device *pdev)
 683 {
 684         struct mtk_drm_private *private = platform_get_drvdata(pdev);
 685         int i;
 686
 687         component_master_del(&pdev->dev, &mtk_drm_ops);
 688         pm_runtime_disable(&pdev->dev);
 689         of_node_put(private->mutex_node);
 690         for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
 691                 of_node_put(private->comp_node[i]);
 692
 693         return 0;
 694 }
 695
 696 #ifdef CONFIG_PM_SLEEP
 697 static int mtk_drm_sys_suspend(struct device *dev)
 698 {
 699         struct mtk_drm_private *private = dev_get_drvdata(dev);
 700         struct drm_device *drm = private->drm;
 701         int ret;
 702
 703         ret = drm_mode_config_helper_suspend(drm);
 704
 705         return ret;
 706 }
 707
 708 static int mtk_drm_sys_resume(struct device *dev)
 709 {
 710         struct mtk_drm_private *private = dev_get_drvdata(dev);
 711         struct drm_device *drm = private->drm;
 712         int ret;
 713
 714         ret = drm_mode_config_helper_resume(drm);
 715
 716         return ret;
 717 }
 718 #endif
 719
 720 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
 721                          mtk_drm_sys_resume);
 722
 723 static struct platform_driver mtk_drm_platform_driver = {
 724         .probe  = mtk_drm_probe,
 725         .remove = mtk_drm_remove,
 726         .driver = {
 727                 .name   = "mediatek-drm",
 728                 .pm     = &mtk_drm_pm_ops,
 729         },
 730 };
 731
 732 static struct platform_driver * const mtk_drm_drivers[] = {
 733         &mtk_disp_aal_driver,
 734         &mtk_disp_ccorr_driver,
 735         &mtk_disp_color_driver,
 736         &mtk_disp_gamma_driver,
 737         &mtk_disp_ovl_driver,
 738         &mtk_disp_rdma_driver,
 739         &mtk_dpi_driver,
 740         &mtk_drm_platform_driver,
 741         &mtk_dsi_driver,
 742 };
 743
 744 static int __init mtk_drm_init(void)
 745 {
 746         return platform_register_drivers(mtk_drm_drivers,
 747                                          ARRAY_SIZE(mtk_drm_drivers));
 748 }
 749
 750 static void __exit mtk_drm_exit(void)
 751 {
 752         platform_unregister_drivers(mtk_drm_drivers,
 753                                     ARRAY_SIZE(mtk_drm_drivers));
 754 }
 755
 756 module_init(mtk_drm_init);
 757 module_exit(mtk_drm_exit);
 758
 759 MODULE_AUTHOR("YT SHEN <yt.shen@mediatek.com>");
 760 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
 761 MODULE_LICENSE("GPL v2");