GNU Linux-libre 4.14.330-gnu1
[releases.git] / drivers / gpu / drm / mediatek / mtk_dpi.c
1 /*
2  * Copyright (c) 2014 MediaTek Inc.
3  * Author: Jie Qiu <jie.qiu@mediatek.com>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 #include <drm/drmP.h>
15 #include <drm/drm_crtc.h>
16 #include <drm/drm_crtc_helper.h>
17 #include <linux/kernel.h>
18 #include <linux/component.h>
19 #include <linux/platform_device.h>
20 #include <linux/of.h>
21 #include <linux/of_graph.h>
22 #include <linux/interrupt.h>
23 #include <linux/types.h>
24 #include <linux/clk.h>
25
26 #include "mtk_dpi_regs.h"
27 #include "mtk_drm_ddp_comp.h"
28
29 enum mtk_dpi_out_bit_num {
30         MTK_DPI_OUT_BIT_NUM_8BITS,
31         MTK_DPI_OUT_BIT_NUM_10BITS,
32         MTK_DPI_OUT_BIT_NUM_12BITS,
33         MTK_DPI_OUT_BIT_NUM_16BITS
34 };
35
36 enum mtk_dpi_out_yc_map {
37         MTK_DPI_OUT_YC_MAP_RGB,
38         MTK_DPI_OUT_YC_MAP_CYCY,
39         MTK_DPI_OUT_YC_MAP_YCYC,
40         MTK_DPI_OUT_YC_MAP_CY,
41         MTK_DPI_OUT_YC_MAP_YC
42 };
43
44 enum mtk_dpi_out_channel_swap {
45         MTK_DPI_OUT_CHANNEL_SWAP_RGB,
46         MTK_DPI_OUT_CHANNEL_SWAP_GBR,
47         MTK_DPI_OUT_CHANNEL_SWAP_BRG,
48         MTK_DPI_OUT_CHANNEL_SWAP_RBG,
49         MTK_DPI_OUT_CHANNEL_SWAP_GRB,
50         MTK_DPI_OUT_CHANNEL_SWAP_BGR
51 };
52
53 enum mtk_dpi_out_color_format {
54         MTK_DPI_COLOR_FORMAT_RGB
55 };
56
57 struct mtk_dpi {
58         struct mtk_ddp_comp ddp_comp;
59         struct drm_encoder encoder;
60         struct drm_bridge *bridge;
61         void __iomem *regs;
62         struct device *dev;
63         struct clk *engine_clk;
64         struct clk *pixel_clk;
65         struct clk *tvd_clk;
66         int irq;
67         struct drm_display_mode mode;
68         enum mtk_dpi_out_color_format color_format;
69         enum mtk_dpi_out_yc_map yc_map;
70         enum mtk_dpi_out_bit_num bit_num;
71         enum mtk_dpi_out_channel_swap channel_swap;
72         bool power_sta;
73         u8 power_ctl;
74 };
75
76 static inline struct mtk_dpi *mtk_dpi_from_encoder(struct drm_encoder *e)
77 {
78         return container_of(e, struct mtk_dpi, encoder);
79 }
80
81 enum mtk_dpi_polarity {
82         MTK_DPI_POLARITY_RISING,
83         MTK_DPI_POLARITY_FALLING,
84 };
85
86 enum mtk_dpi_power_ctl {
87         DPI_POWER_START = BIT(0),
88         DPI_POWER_ENABLE = BIT(1),
89 };
90
91 struct mtk_dpi_polarities {
92         enum mtk_dpi_polarity de_pol;
93         enum mtk_dpi_polarity ck_pol;
94         enum mtk_dpi_polarity hsync_pol;
95         enum mtk_dpi_polarity vsync_pol;
96 };
97
98 struct mtk_dpi_sync_param {
99         u32 sync_width;
100         u32 front_porch;
101         u32 back_porch;
102         bool shift_half_line;
103 };
104
105 struct mtk_dpi_yc_limit {
106         u16 y_top;
107         u16 y_bottom;
108         u16 c_top;
109         u16 c_bottom;
110 };
111
112 static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
113 {
114         u32 tmp = readl(dpi->regs + offset) & ~mask;
115
116         tmp |= (val & mask);
117         writel(tmp, dpi->regs + offset);
118 }
119
120 static void mtk_dpi_sw_reset(struct mtk_dpi *dpi, bool reset)
121 {
122         mtk_dpi_mask(dpi, DPI_RET, reset ? RST : 0, RST);
123 }
124
125 static void mtk_dpi_enable(struct mtk_dpi *dpi)
126 {
127         mtk_dpi_mask(dpi, DPI_EN, EN, EN);
128 }
129
130 static void mtk_dpi_disable(struct mtk_dpi *dpi)
131 {
132         mtk_dpi_mask(dpi, DPI_EN, 0, EN);
133 }
134
135 static void mtk_dpi_config_hsync(struct mtk_dpi *dpi,
136                                  struct mtk_dpi_sync_param *sync)
137 {
138         mtk_dpi_mask(dpi, DPI_TGEN_HWIDTH,
139                      sync->sync_width << HPW, HPW_MASK);
140         mtk_dpi_mask(dpi, DPI_TGEN_HPORCH,
141                      sync->back_porch << HBP, HBP_MASK);
142         mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP,
143                      HFP_MASK);
144 }
145
146 static void mtk_dpi_config_vsync(struct mtk_dpi *dpi,
147                                  struct mtk_dpi_sync_param *sync,
148                                  u32 width_addr, u32 porch_addr)
149 {
150         mtk_dpi_mask(dpi, width_addr,
151                      sync->sync_width << VSYNC_WIDTH_SHIFT,
152                      VSYNC_WIDTH_MASK);
153         mtk_dpi_mask(dpi, width_addr,
154                      sync->shift_half_line << VSYNC_HALF_LINE_SHIFT,
155                      VSYNC_HALF_LINE_MASK);
156         mtk_dpi_mask(dpi, porch_addr,
157                      sync->back_porch << VSYNC_BACK_PORCH_SHIFT,
158                      VSYNC_BACK_PORCH_MASK);
159         mtk_dpi_mask(dpi, porch_addr,
160                      sync->front_porch << VSYNC_FRONT_PORCH_SHIFT,
161                      VSYNC_FRONT_PORCH_MASK);
162 }
163
164 static void mtk_dpi_config_vsync_lodd(struct mtk_dpi *dpi,
165                                       struct mtk_dpi_sync_param *sync)
166 {
167         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH, DPI_TGEN_VPORCH);
168 }
169
170 static void mtk_dpi_config_vsync_leven(struct mtk_dpi *dpi,
171                                        struct mtk_dpi_sync_param *sync)
172 {
173         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_LEVEN,
174                              DPI_TGEN_VPORCH_LEVEN);
175 }
176
177 static void mtk_dpi_config_vsync_rodd(struct mtk_dpi *dpi,
178                                       struct mtk_dpi_sync_param *sync)
179 {
180         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_RODD,
181                              DPI_TGEN_VPORCH_RODD);
182 }
183
184 static void mtk_dpi_config_vsync_reven(struct mtk_dpi *dpi,
185                                        struct mtk_dpi_sync_param *sync)
186 {
187         mtk_dpi_config_vsync(dpi, sync, DPI_TGEN_VWIDTH_REVEN,
188                              DPI_TGEN_VPORCH_REVEN);
189 }
190
191 static void mtk_dpi_config_pol(struct mtk_dpi *dpi,
192                                struct mtk_dpi_polarities *dpi_pol)
193 {
194         unsigned int pol;
195
196         pol = (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? 0 : CK_POL) |
197               (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? 0 : DE_POL) |
198               (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 : HSYNC_POL) |
199               (dpi_pol->vsync_pol == MTK_DPI_POLARITY_RISING ? 0 : VSYNC_POL);
200         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
201                      CK_POL | DE_POL | HSYNC_POL | VSYNC_POL);
202 }
203
204 static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
205 {
206         mtk_dpi_mask(dpi, DPI_CON, en_3d ? TDFP_EN : 0, TDFP_EN);
207 }
208
209 static void mtk_dpi_config_interface(struct mtk_dpi *dpi, bool inter)
210 {
211         mtk_dpi_mask(dpi, DPI_CON, inter ? INTL_EN : 0, INTL_EN);
212 }
213
214 static void mtk_dpi_config_fb_size(struct mtk_dpi *dpi, u32 width, u32 height)
215 {
216         mtk_dpi_mask(dpi, DPI_SIZE, width << HSIZE, HSIZE_MASK);
217         mtk_dpi_mask(dpi, DPI_SIZE, height << VSIZE, VSIZE_MASK);
218 }
219
220 static void mtk_dpi_config_channel_limit(struct mtk_dpi *dpi,
221                                          struct mtk_dpi_yc_limit *limit)
222 {
223         mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_bottom << Y_LIMINT_BOT,
224                      Y_LIMINT_BOT_MASK);
225         mtk_dpi_mask(dpi, DPI_Y_LIMIT, limit->y_top << Y_LIMINT_TOP,
226                      Y_LIMINT_TOP_MASK);
227         mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_bottom << C_LIMIT_BOT,
228                      C_LIMIT_BOT_MASK);
229         mtk_dpi_mask(dpi, DPI_C_LIMIT, limit->c_top << C_LIMIT_TOP,
230                      C_LIMIT_TOP_MASK);
231 }
232
233 static void mtk_dpi_config_bit_num(struct mtk_dpi *dpi,
234                                    enum mtk_dpi_out_bit_num num)
235 {
236         u32 val;
237
238         switch (num) {
239         case MTK_DPI_OUT_BIT_NUM_8BITS:
240                 val = OUT_BIT_8;
241                 break;
242         case MTK_DPI_OUT_BIT_NUM_10BITS:
243                 val = OUT_BIT_10;
244                 break;
245         case MTK_DPI_OUT_BIT_NUM_12BITS:
246                 val = OUT_BIT_12;
247                 break;
248         case MTK_DPI_OUT_BIT_NUM_16BITS:
249                 val = OUT_BIT_16;
250                 break;
251         default:
252                 val = OUT_BIT_8;
253                 break;
254         }
255         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << OUT_BIT,
256                      OUT_BIT_MASK);
257 }
258
259 static void mtk_dpi_config_yc_map(struct mtk_dpi *dpi,
260                                   enum mtk_dpi_out_yc_map map)
261 {
262         u32 val;
263
264         switch (map) {
265         case MTK_DPI_OUT_YC_MAP_RGB:
266                 val = YC_MAP_RGB;
267                 break;
268         case MTK_DPI_OUT_YC_MAP_CYCY:
269                 val = YC_MAP_CYCY;
270                 break;
271         case MTK_DPI_OUT_YC_MAP_YCYC:
272                 val = YC_MAP_YCYC;
273                 break;
274         case MTK_DPI_OUT_YC_MAP_CY:
275                 val = YC_MAP_CY;
276                 break;
277         case MTK_DPI_OUT_YC_MAP_YC:
278                 val = YC_MAP_YC;
279                 break;
280         default:
281                 val = YC_MAP_RGB;
282                 break;
283         }
284
285         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << YC_MAP, YC_MAP_MASK);
286 }
287
288 static void mtk_dpi_config_channel_swap(struct mtk_dpi *dpi,
289                                         enum mtk_dpi_out_channel_swap swap)
290 {
291         u32 val;
292
293         switch (swap) {
294         case MTK_DPI_OUT_CHANNEL_SWAP_RGB:
295                 val = SWAP_RGB;
296                 break;
297         case MTK_DPI_OUT_CHANNEL_SWAP_GBR:
298                 val = SWAP_GBR;
299                 break;
300         case MTK_DPI_OUT_CHANNEL_SWAP_BRG:
301                 val = SWAP_BRG;
302                 break;
303         case MTK_DPI_OUT_CHANNEL_SWAP_RBG:
304                 val = SWAP_RBG;
305                 break;
306         case MTK_DPI_OUT_CHANNEL_SWAP_GRB:
307                 val = SWAP_GRB;
308                 break;
309         case MTK_DPI_OUT_CHANNEL_SWAP_BGR:
310                 val = SWAP_BGR;
311                 break;
312         default:
313                 val = SWAP_RGB;
314                 break;
315         }
316
317         mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, val << CH_SWAP, CH_SWAP_MASK);
318 }
319
320 static void mtk_dpi_config_yuv422_enable(struct mtk_dpi *dpi, bool enable)
321 {
322         mtk_dpi_mask(dpi, DPI_CON, enable ? YUV422_EN : 0, YUV422_EN);
323 }
324
325 static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable)
326 {
327         mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE);
328 }
329
330 static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
331 {
332         mtk_dpi_mask(dpi, DPI_CON, enable ? IN_RB_SWAP : 0, IN_RB_SWAP);
333 }
334
335 static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
336 {
337         mtk_dpi_mask(dpi, DPI_H_FRE_CON, H_FRE_2N, H_FRE_2N);
338 }
339
340 static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
341                                         enum mtk_dpi_out_color_format format)
342 {
343         /* only support RGB888 */
344         mtk_dpi_config_yuv422_enable(dpi, false);
345         mtk_dpi_config_csc_enable(dpi, false);
346         mtk_dpi_config_swap_input(dpi, false);
347         mtk_dpi_config_channel_swap(dpi, MTK_DPI_OUT_CHANNEL_SWAP_RGB);
348 }
349
350 static void mtk_dpi_power_off(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
351 {
352         dpi->power_ctl &= ~pctl;
353
354         if ((dpi->power_ctl & DPI_POWER_START) ||
355             (dpi->power_ctl & DPI_POWER_ENABLE))
356                 return;
357
358         if (!dpi->power_sta)
359                 return;
360
361         mtk_dpi_disable(dpi);
362         clk_disable_unprepare(dpi->pixel_clk);
363         clk_disable_unprepare(dpi->engine_clk);
364         dpi->power_sta = false;
365 }
366
367 static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
368 {
369         int ret;
370
371         dpi->power_ctl |= pctl;
372
373         if (!(dpi->power_ctl & DPI_POWER_START) &&
374             !(dpi->power_ctl & DPI_POWER_ENABLE))
375                 return 0;
376
377         if (dpi->power_sta)
378                 return 0;
379
380         ret = clk_prepare_enable(dpi->engine_clk);
381         if (ret) {
382                 dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
383                 goto err_eng;
384         }
385
386         ret = clk_prepare_enable(dpi->pixel_clk);
387         if (ret) {
388                 dev_err(dpi->dev, "Failed to enable pixel clock: %d\n", ret);
389                 goto err_pixel;
390         }
391
392         mtk_dpi_enable(dpi);
393         dpi->power_sta = true;
394         return 0;
395
396 err_pixel:
397         clk_disable_unprepare(dpi->engine_clk);
398 err_eng:
399         dpi->power_ctl &= ~pctl;
400         return ret;
401 }
402
403 static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
404                                     struct drm_display_mode *mode)
405 {
406         struct mtk_dpi_yc_limit limit;
407         struct mtk_dpi_polarities dpi_pol;
408         struct mtk_dpi_sync_param hsync;
409         struct mtk_dpi_sync_param vsync_lodd = { 0 };
410         struct mtk_dpi_sync_param vsync_leven = { 0 };
411         struct mtk_dpi_sync_param vsync_rodd = { 0 };
412         struct mtk_dpi_sync_param vsync_reven = { 0 };
413         unsigned long pix_rate;
414         unsigned long pll_rate;
415         unsigned int factor;
416
417         /* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
418         pix_rate = 1000UL * mode->clock;
419         if (mode->clock <= 27000)
420                 factor = 16 * 3;
421         else if (mode->clock <= 84000)
422                 factor = 8 * 3;
423         else if (mode->clock <= 167000)
424                 factor = 4 * 3;
425         else
426                 factor = 2 * 3;
427         pll_rate = pix_rate * factor;
428
429         dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",
430                 pll_rate, pix_rate);
431
432         clk_set_rate(dpi->tvd_clk, pll_rate);
433         pll_rate = clk_get_rate(dpi->tvd_clk);
434
435         pix_rate = pll_rate / factor;
436         clk_set_rate(dpi->pixel_clk, pix_rate);
437         pix_rate = clk_get_rate(dpi->pixel_clk);
438
439         dev_dbg(dpi->dev, "Got  PLL %lu Hz, pixel clock %lu Hz\n",
440                 pll_rate, pix_rate);
441
442         limit.c_bottom = 0x0010;
443         limit.c_top = 0x0FE0;
444         limit.y_bottom = 0x0010;
445         limit.y_top = 0x0FE0;
446
447         dpi_pol.ck_pol = MTK_DPI_POLARITY_FALLING;
448         dpi_pol.de_pol = MTK_DPI_POLARITY_RISING;
449         dpi_pol.hsync_pol = mode->flags & DRM_MODE_FLAG_PHSYNC ?
450                             MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
451         dpi_pol.vsync_pol = mode->flags & DRM_MODE_FLAG_PVSYNC ?
452                             MTK_DPI_POLARITY_FALLING : MTK_DPI_POLARITY_RISING;
453
454         hsync.sync_width = mode->hsync_end - mode->hsync_start;
455         hsync.back_porch = mode->htotal - mode->hsync_end;
456         hsync.front_porch = mode->hsync_start - mode->hdisplay;
457         hsync.shift_half_line = false;
458
459         vsync_lodd.sync_width = mode->vsync_end - mode->vsync_start;
460         vsync_lodd.back_porch = mode->vtotal - mode->vsync_end;
461         vsync_lodd.front_porch = mode->vsync_start - mode->vdisplay;
462         vsync_lodd.shift_half_line = false;
463
464         if (mode->flags & DRM_MODE_FLAG_INTERLACE &&
465             mode->flags & DRM_MODE_FLAG_3D_MASK) {
466                 vsync_leven = vsync_lodd;
467                 vsync_rodd = vsync_lodd;
468                 vsync_reven = vsync_lodd;
469                 vsync_leven.shift_half_line = true;
470                 vsync_reven.shift_half_line = true;
471         } else if (mode->flags & DRM_MODE_FLAG_INTERLACE &&
472                    !(mode->flags & DRM_MODE_FLAG_3D_MASK)) {
473                 vsync_leven = vsync_lodd;
474                 vsync_leven.shift_half_line = true;
475         } else if (!(mode->flags & DRM_MODE_FLAG_INTERLACE) &&
476                    mode->flags & DRM_MODE_FLAG_3D_MASK) {
477                 vsync_rodd = vsync_lodd;
478         }
479         mtk_dpi_sw_reset(dpi, true);
480         mtk_dpi_config_pol(dpi, &dpi_pol);
481
482         mtk_dpi_config_hsync(dpi, &hsync);
483         mtk_dpi_config_vsync_lodd(dpi, &vsync_lodd);
484         mtk_dpi_config_vsync_rodd(dpi, &vsync_rodd);
485         mtk_dpi_config_vsync_leven(dpi, &vsync_leven);
486         mtk_dpi_config_vsync_reven(dpi, &vsync_reven);
487
488         mtk_dpi_config_3d(dpi, !!(mode->flags & DRM_MODE_FLAG_3D_MASK));
489         mtk_dpi_config_interface(dpi, !!(mode->flags &
490                                          DRM_MODE_FLAG_INTERLACE));
491         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
492                 mtk_dpi_config_fb_size(dpi, mode->hdisplay, mode->vdisplay / 2);
493         else
494                 mtk_dpi_config_fb_size(dpi, mode->hdisplay, mode->vdisplay);
495
496         mtk_dpi_config_channel_limit(dpi, &limit);
497         mtk_dpi_config_bit_num(dpi, dpi->bit_num);
498         mtk_dpi_config_channel_swap(dpi, dpi->channel_swap);
499         mtk_dpi_config_yc_map(dpi, dpi->yc_map);
500         mtk_dpi_config_color_format(dpi, dpi->color_format);
501         mtk_dpi_config_2n_h_fre(dpi);
502         mtk_dpi_sw_reset(dpi, false);
503
504         return 0;
505 }
506
507 static void mtk_dpi_encoder_destroy(struct drm_encoder *encoder)
508 {
509         drm_encoder_cleanup(encoder);
510 }
511
512 static const struct drm_encoder_funcs mtk_dpi_encoder_funcs = {
513         .destroy = mtk_dpi_encoder_destroy,
514 };
515
516 static bool mtk_dpi_encoder_mode_fixup(struct drm_encoder *encoder,
517                                        const struct drm_display_mode *mode,
518                                        struct drm_display_mode *adjusted_mode)
519 {
520         return true;
521 }
522
523 static void mtk_dpi_encoder_mode_set(struct drm_encoder *encoder,
524                                      struct drm_display_mode *mode,
525                                      struct drm_display_mode *adjusted_mode)
526 {
527         struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
528
529         drm_mode_copy(&dpi->mode, adjusted_mode);
530 }
531
532 static void mtk_dpi_encoder_disable(struct drm_encoder *encoder)
533 {
534         struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
535
536         mtk_dpi_power_off(dpi, DPI_POWER_ENABLE);
537 }
538
539 static void mtk_dpi_encoder_enable(struct drm_encoder *encoder)
540 {
541         struct mtk_dpi *dpi = mtk_dpi_from_encoder(encoder);
542
543         mtk_dpi_power_on(dpi, DPI_POWER_ENABLE);
544         mtk_dpi_set_display_mode(dpi, &dpi->mode);
545 }
546
547 static int mtk_dpi_atomic_check(struct drm_encoder *encoder,
548                                 struct drm_crtc_state *crtc_state,
549                                 struct drm_connector_state *conn_state)
550 {
551         return 0;
552 }
553
554 static const struct drm_encoder_helper_funcs mtk_dpi_encoder_helper_funcs = {
555         .mode_fixup = mtk_dpi_encoder_mode_fixup,
556         .mode_set = mtk_dpi_encoder_mode_set,
557         .disable = mtk_dpi_encoder_disable,
558         .enable = mtk_dpi_encoder_enable,
559         .atomic_check = mtk_dpi_atomic_check,
560 };
561
562 static void mtk_dpi_start(struct mtk_ddp_comp *comp)
563 {
564         struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
565
566         mtk_dpi_power_on(dpi, DPI_POWER_START);
567 }
568
569 static void mtk_dpi_stop(struct mtk_ddp_comp *comp)
570 {
571         struct mtk_dpi *dpi = container_of(comp, struct mtk_dpi, ddp_comp);
572
573         mtk_dpi_power_off(dpi, DPI_POWER_START);
574 }
575
576 static const struct mtk_ddp_comp_funcs mtk_dpi_funcs = {
577         .start = mtk_dpi_start,
578         .stop = mtk_dpi_stop,
579 };
580
581 static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
582 {
583         struct mtk_dpi *dpi = dev_get_drvdata(dev);
584         struct drm_device *drm_dev = data;
585         int ret;
586
587         ret = mtk_ddp_comp_register(drm_dev, &dpi->ddp_comp);
588         if (ret < 0) {
589                 dev_err(dev, "Failed to register component %pOF: %d\n",
590                         dev->of_node, ret);
591                 return ret;
592         }
593
594         ret = drm_encoder_init(drm_dev, &dpi->encoder, &mtk_dpi_encoder_funcs,
595                                DRM_MODE_ENCODER_TMDS, NULL);
596         if (ret) {
597                 dev_err(dev, "Failed to initialize decoder: %d\n", ret);
598                 goto err_unregister;
599         }
600         drm_encoder_helper_add(&dpi->encoder, &mtk_dpi_encoder_helper_funcs);
601
602         /* Currently DPI0 is fixed to be driven by OVL1 */
603         dpi->encoder.possible_crtcs = BIT(1);
604
605         ret = drm_bridge_attach(&dpi->encoder, dpi->bridge, NULL);
606         if (ret) {
607                 dev_err(dev, "Failed to attach bridge: %d\n", ret);
608                 goto err_cleanup;
609         }
610
611         dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
612         dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
613         dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
614         dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
615
616         return 0;
617
618 err_cleanup:
619         drm_encoder_cleanup(&dpi->encoder);
620 err_unregister:
621         mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
622         return ret;
623 }
624
625 static void mtk_dpi_unbind(struct device *dev, struct device *master,
626                            void *data)
627 {
628         struct mtk_dpi *dpi = dev_get_drvdata(dev);
629         struct drm_device *drm_dev = data;
630
631         drm_encoder_cleanup(&dpi->encoder);
632         mtk_ddp_comp_unregister(drm_dev, &dpi->ddp_comp);
633 }
634
635 static const struct component_ops mtk_dpi_component_ops = {
636         .bind = mtk_dpi_bind,
637         .unbind = mtk_dpi_unbind,
638 };
639
640 static int mtk_dpi_probe(struct platform_device *pdev)
641 {
642         struct device *dev = &pdev->dev;
643         struct mtk_dpi *dpi;
644         struct resource *mem;
645         struct device_node *bridge_node;
646         int comp_id;
647         int ret;
648
649         dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
650         if (!dpi)
651                 return -ENOMEM;
652
653         dpi->dev = dev;
654
655         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
656         dpi->regs = devm_ioremap_resource(dev, mem);
657         if (IS_ERR(dpi->regs)) {
658                 ret = PTR_ERR(dpi->regs);
659                 dev_err(dev, "Failed to ioremap mem resource: %d\n", ret);
660                 return ret;
661         }
662
663         dpi->engine_clk = devm_clk_get(dev, "engine");
664         if (IS_ERR(dpi->engine_clk)) {
665                 ret = PTR_ERR(dpi->engine_clk);
666                 dev_err(dev, "Failed to get engine clock: %d\n", ret);
667                 return ret;
668         }
669
670         dpi->pixel_clk = devm_clk_get(dev, "pixel");
671         if (IS_ERR(dpi->pixel_clk)) {
672                 ret = PTR_ERR(dpi->pixel_clk);
673                 dev_err(dev, "Failed to get pixel clock: %d\n", ret);
674                 return ret;
675         }
676
677         dpi->tvd_clk = devm_clk_get(dev, "pll");
678         if (IS_ERR(dpi->tvd_clk)) {
679                 ret = PTR_ERR(dpi->tvd_clk);
680                 dev_err(dev, "Failed to get tvdpll clock: %d\n", ret);
681                 return ret;
682         }
683
684         dpi->irq = platform_get_irq(pdev, 0);
685         if (dpi->irq <= 0) {
686                 dev_err(dev, "Failed to get irq: %d\n", dpi->irq);
687                 return -EINVAL;
688         }
689
690         bridge_node = of_graph_get_remote_node(dev->of_node, 0, 0);
691         if (!bridge_node)
692                 return -ENODEV;
693
694         dev_info(dev, "Found bridge node: %pOF\n", bridge_node);
695
696         dpi->bridge = of_drm_find_bridge(bridge_node);
697         of_node_put(bridge_node);
698         if (!dpi->bridge)
699                 return -EPROBE_DEFER;
700
701         comp_id = mtk_ddp_comp_get_id(dev->of_node, MTK_DPI);
702         if (comp_id < 0) {
703                 dev_err(dev, "Failed to identify by alias: %d\n", comp_id);
704                 return comp_id;
705         }
706
707         ret = mtk_ddp_comp_init(dev, dev->of_node, &dpi->ddp_comp, comp_id,
708                                 &mtk_dpi_funcs);
709         if (ret) {
710                 dev_err(dev, "Failed to initialize component: %d\n", ret);
711                 return ret;
712         }
713
714         platform_set_drvdata(pdev, dpi);
715
716         ret = component_add(dev, &mtk_dpi_component_ops);
717         if (ret) {
718                 dev_err(dev, "Failed to add component: %d\n", ret);
719                 return ret;
720         }
721
722         return 0;
723 }
724
725 static int mtk_dpi_remove(struct platform_device *pdev)
726 {
727         component_del(&pdev->dev, &mtk_dpi_component_ops);
728
729         return 0;
730 }
731
732 static const struct of_device_id mtk_dpi_of_ids[] = {
733         { .compatible = "mediatek,mt8173-dpi", },
734         {}
735 };
736
737 struct platform_driver mtk_dpi_driver = {
738         .probe = mtk_dpi_probe,
739         .remove = mtk_dpi_remove,
740         .driver = {
741                 .name = "mediatek-dpi",
742                 .of_match_table = mtk_dpi_of_ids,
743         },
744 };