1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Linus Walleij <linus.walleij@linaro.org>
4 * Parts of this file were based on the MCDE driver by Marcus Lorentzon
5 * (C) ST-Ericsson SA 2013
9 * DOC: ST-Ericsson MCDE Driver
11 * The MCDE (short for multi-channel display engine) is a graphics
12 * controller found in the Ux500 chipsets, such as NovaThor U8500.
13 * It was initially conceptualized by ST Microelectronics for the
14 * successor of the Nomadik line, STn8500 but productified in the
15 * ST-Ericsson U8500 where is was used for mass-market deployments
16 * in Android phones from Samsung and Sony Ericsson.
18 * It can do 1080p30 on SDTV CCIR656, DPI-2, DBI-2 or DSI for
19 * panels with or without frame buffering and can convert most
20 * input formats including most variants of RGB and YUV.
22 * The hardware has four display pipes, and the layout is a little
25 * Memory -> Overlay -> Channel -> FIFO -> 5 formatters -> DSI/DPI
26 * External 0..5 0..3 A,B, 3 x DSI bridge
27 * source 0..9 C0,C1 2 x DPI
29 * FIFOs A and B are for LCD and HDMI while FIFO CO/C1 are for
30 * panels with embedded buffer.
31 * 3 of the formatters are for DSI.
32 * 2 of the formatters are for DPI.
34 * Behind the formatters are the DSI or DPI ports that route to
35 * the external pins of the chip. As there are 3 DSI ports and one
36 * DPI port, it is possible to configure up to 4 display pipelines
37 * (effectively using channels 0..3) for concurrent use.
39 * In the current DRM/KMS setup, we use one external source, one overlay,
40 * one FIFO and one formatter which we connect to the simple CMA framebuffer
41 * helpers. We then provide a bridge to the DSI port, and on the DSI port
42 * bridge we connect hang a panel bridge or other bridge. This may be subject
43 * to change as we exploit more of the hardware capabilities.
47 * - Enabled damaged rectangles using drm_plane_enable_fb_damage_clips()
48 * so we can selectively just transmit the damaged area to a
49 * command-only display.
50 * - Enable mixing of more planes, possibly at the cost of moving away
51 * from using the simple framebuffer pipeline.
52 * - Enable output to bridges such as the AV8100 HDMI encoder from
56 #include <linux/clk.h>
57 #include <linux/component.h>
58 #include <linux/dma-buf.h>
59 #include <linux/irq.h>
61 #include <linux/module.h>
62 #include <linux/of_platform.h>
63 #include <linux/platform_device.h>
64 #include <linux/regulator/consumer.h>
65 #include <linux/slab.h>
66 #include <linux/delay.h>
68 #include <drm/drm_atomic_helper.h>
69 #include <drm/drm_bridge.h>
70 #include <drm/drm_drv.h>
71 #include <drm/drm_fb_cma_helper.h>
72 #include <drm/drm_fb_helper.h>
73 #include <drm/drm_gem.h>
74 #include <drm/drm_gem_cma_helper.h>
75 #include <drm/drm_gem_framebuffer_helper.h>
76 #include <drm/drm_managed.h>
77 #include <drm/drm_of.h>
78 #include <drm/drm_probe_helper.h>
79 #include <drm/drm_panel.h>
80 #include <drm/drm_vblank.h>
84 #define DRIVER_DESC "DRM module for MCDE"
86 #define MCDE_PID 0x000001FC
87 #define MCDE_PID_METALFIX_VERSION_SHIFT 0
88 #define MCDE_PID_METALFIX_VERSION_MASK 0x000000FF
89 #define MCDE_PID_DEVELOPMENT_VERSION_SHIFT 8
90 #define MCDE_PID_DEVELOPMENT_VERSION_MASK 0x0000FF00
91 #define MCDE_PID_MINOR_VERSION_SHIFT 16
92 #define MCDE_PID_MINOR_VERSION_MASK 0x00FF0000
93 #define MCDE_PID_MAJOR_VERSION_SHIFT 24
94 #define MCDE_PID_MAJOR_VERSION_MASK 0xFF000000
96 static const struct drm_mode_config_funcs mcde_mode_config_funcs = {
97 .fb_create = drm_gem_fb_create_with_dirty,
98 .atomic_check = drm_atomic_helper_check,
99 .atomic_commit = drm_atomic_helper_commit,
102 static const struct drm_mode_config_helper_funcs mcde_mode_config_helpers = {
104 * Using this function is necessary to commit atomic updates
105 * that need the CRTC to be enabled before a commit, as is
106 * the case with e.g. DSI displays.
108 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
111 static irqreturn_t mcde_irq(int irq, void *data)
113 struct mcde *mcde = data;
116 val = readl(mcde->regs + MCDE_MISERR);
118 mcde_display_irq(mcde);
121 dev_info(mcde->dev, "some error IRQ\n");
122 writel(val, mcde->regs + MCDE_RISERR);
127 static int mcde_modeset_init(struct drm_device *drm)
129 struct drm_mode_config *mode_config;
130 struct mcde *mcde = to_mcde(drm);
134 dev_err(drm->dev, "no display output bridge yet\n");
135 return -EPROBE_DEFER;
138 mode_config = &drm->mode_config;
139 mode_config->funcs = &mcde_mode_config_funcs;
140 mode_config->helper_private = &mcde_mode_config_helpers;
141 /* This hardware can do 1080p */
142 mode_config->min_width = 1;
143 mode_config->max_width = 1920;
144 mode_config->min_height = 1;
145 mode_config->max_height = 1080;
147 ret = drm_vblank_init(drm, 1);
149 dev_err(drm->dev, "failed to init vblank\n");
153 ret = mcde_display_init(drm);
155 dev_err(drm->dev, "failed to init display\n");
160 * Attach the DSI bridge
162 * TODO: when adding support for the DPI bridge or several DSI bridges,
163 * we selectively connect the bridge(s) here instead of this simple
166 ret = drm_simple_display_pipe_attach_bridge(&mcde->pipe,
169 dev_err(drm->dev, "failed to attach display output bridge\n");
173 drm_mode_config_reset(drm);
174 drm_kms_helper_poll_init(drm);
179 DEFINE_DRM_GEM_CMA_FOPS(drm_fops);
181 static struct drm_driver mcde_drm_driver = {
183 DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
184 .lastclose = drm_fb_helper_lastclose,
193 DRM_GEM_CMA_DRIVER_OPS,
196 static int mcde_drm_bind(struct device *dev)
198 struct drm_device *drm = dev_get_drvdata(dev);
201 ret = drmm_mode_config_init(drm);
205 ret = component_bind_all(drm->dev, drm);
207 dev_err(dev, "can't bind component devices\n");
211 ret = mcde_modeset_init(drm);
215 ret = drm_dev_register(drm, 0);
219 drm_fbdev_generic_setup(drm, 32);
224 component_unbind_all(drm->dev, drm);
228 static void mcde_drm_unbind(struct device *dev)
230 struct drm_device *drm = dev_get_drvdata(dev);
232 drm_dev_unregister(drm);
233 drm_atomic_helper_shutdown(drm);
234 component_unbind_all(drm->dev, drm);
237 static const struct component_master_ops mcde_drm_comp_ops = {
238 .bind = mcde_drm_bind,
239 .unbind = mcde_drm_unbind,
242 static struct platform_driver *const mcde_component_drivers[] = {
246 static int mcde_compare_dev(struct device *dev, void *data)
251 static int mcde_probe(struct platform_device *pdev)
253 struct device *dev = &pdev->dev;
254 struct drm_device *drm;
256 struct component_match *match = NULL;
257 struct resource *res;
263 mcde = devm_drm_dev_alloc(dev, &mcde_drm_driver, struct mcde, drm);
265 return PTR_ERR(mcde);
268 platform_set_drvdata(pdev, drm);
270 /* First obtain and turn on the main power */
271 mcde->epod = devm_regulator_get(dev, "epod");
272 if (IS_ERR(mcde->epod)) {
273 ret = PTR_ERR(mcde->epod);
274 dev_err(dev, "can't get EPOD regulator\n");
277 ret = regulator_enable(mcde->epod);
279 dev_err(dev, "can't enable EPOD regulator\n");
282 mcde->vana = devm_regulator_get(dev, "vana");
283 if (IS_ERR(mcde->vana)) {
284 ret = PTR_ERR(mcde->vana);
285 dev_err(dev, "can't get VANA regulator\n");
286 goto regulator_epod_off;
288 ret = regulator_enable(mcde->vana);
290 dev_err(dev, "can't enable VANA regulator\n");
291 goto regulator_epod_off;
294 * The vendor code uses ESRAM (onchip RAM) and need to activate
295 * the v-esram34 regulator, but we don't use that yet
298 /* Clock the silicon so we can access the registers */
299 mcde->mcde_clk = devm_clk_get(dev, "mcde");
300 if (IS_ERR(mcde->mcde_clk)) {
301 dev_err(dev, "unable to get MCDE main clock\n");
302 ret = PTR_ERR(mcde->mcde_clk);
305 ret = clk_prepare_enable(mcde->mcde_clk);
307 dev_err(dev, "failed to enable MCDE main clock\n");
310 dev_info(dev, "MCDE clk rate %lu Hz\n", clk_get_rate(mcde->mcde_clk));
312 mcde->lcd_clk = devm_clk_get(dev, "lcd");
313 if (IS_ERR(mcde->lcd_clk)) {
314 dev_err(dev, "unable to get LCD clock\n");
315 ret = PTR_ERR(mcde->lcd_clk);
318 mcde->hdmi_clk = devm_clk_get(dev, "hdmi");
319 if (IS_ERR(mcde->hdmi_clk)) {
320 dev_err(dev, "unable to get HDMI clock\n");
321 ret = PTR_ERR(mcde->hdmi_clk);
325 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
326 mcde->regs = devm_ioremap_resource(dev, res);
327 if (IS_ERR(mcde->regs)) {
328 dev_err(dev, "no MCDE regs\n");
333 irq = platform_get_irq(pdev, 0);
339 ret = devm_request_irq(dev, irq, mcde_irq, 0, "mcde", mcde);
341 dev_err(dev, "failed to request irq %d\n", ret);
346 * Check hardware revision, we only support U8500v2 version
347 * as this was the only version used for mass market deployment,
348 * but surely you can add more versions if you have them and
351 pid = readl(mcde->regs + MCDE_PID);
352 dev_info(dev, "found MCDE HW revision %d.%d (dev %d, metal fix %d)\n",
353 (pid & MCDE_PID_MAJOR_VERSION_MASK)
354 >> MCDE_PID_MAJOR_VERSION_SHIFT,
355 (pid & MCDE_PID_MINOR_VERSION_MASK)
356 >> MCDE_PID_MINOR_VERSION_SHIFT,
357 (pid & MCDE_PID_DEVELOPMENT_VERSION_MASK)
358 >> MCDE_PID_DEVELOPMENT_VERSION_SHIFT,
359 (pid & MCDE_PID_METALFIX_VERSION_MASK)
360 >> MCDE_PID_METALFIX_VERSION_SHIFT);
361 if (pid != 0x03000800) {
362 dev_err(dev, "unsupported hardware revision\n");
367 /* Disable and clear any pending interrupts */
368 mcde_display_disable_irqs(mcde);
369 writel(0, mcde->regs + MCDE_IMSCERR);
370 writel(0xFFFFFFFF, mcde->regs + MCDE_RISERR);
372 /* Spawn child devices for the DSI ports */
373 devm_of_platform_populate(dev);
375 /* Create something that will match the subdrivers when we bind */
376 for (i = 0; i < ARRAY_SIZE(mcde_component_drivers); i++) {
377 struct device_driver *drv = &mcde_component_drivers[i]->driver;
378 struct device *p = NULL, *d;
380 while ((d = platform_find_device_by_driver(p, drv))) {
382 component_match_add(dev, &match, mcde_compare_dev, d);
388 dev_err(dev, "no matching components\n");
393 dev_err(dev, "could not create component match\n");
394 ret = PTR_ERR(match);
399 * Perform an invasive reset of the MCDE and all blocks by
400 * cutting the power to the subsystem, then bring it back up
401 * later when we enable the display as a result of
402 * component_master_add_with_match().
404 ret = regulator_disable(mcde->epod);
406 dev_err(dev, "can't disable EPOD regulator\n");
409 /* Wait 50 ms so we are sure we cut the power */
410 usleep_range(50000, 70000);
412 ret = component_master_add_with_match(&pdev->dev, &mcde_drm_comp_ops,
415 dev_err(dev, "failed to add component master\n");
417 * The EPOD regulator is already disabled at this point so some
418 * special errorpath code is needed
420 clk_disable_unprepare(mcde->mcde_clk);
421 regulator_disable(mcde->vana);
428 clk_disable_unprepare(mcde->mcde_clk);
430 regulator_disable(mcde->vana);
432 regulator_disable(mcde->epod);
437 static int mcde_remove(struct platform_device *pdev)
439 struct drm_device *drm = platform_get_drvdata(pdev);
440 struct mcde *mcde = to_mcde(drm);
442 component_master_del(&pdev->dev, &mcde_drm_comp_ops);
443 clk_disable_unprepare(mcde->mcde_clk);
444 regulator_disable(mcde->vana);
445 regulator_disable(mcde->epod);
450 static const struct of_device_id mcde_of_match[] = {
452 .compatible = "ste,mcde",
457 static struct platform_driver mcde_driver = {
460 .of_match_table = of_match_ptr(mcde_of_match),
463 .remove = mcde_remove,
466 static struct platform_driver *const component_drivers[] = {
470 static int __init mcde_drm_register(void)
474 ret = platform_register_drivers(component_drivers,
475 ARRAY_SIZE(component_drivers));
479 return platform_driver_register(&mcde_driver);
482 static void __exit mcde_drm_unregister(void)
484 platform_unregister_drivers(component_drivers,
485 ARRAY_SIZE(component_drivers));
486 platform_driver_unregister(&mcde_driver);
489 module_init(mcde_drm_register);
490 module_exit(mcde_drm_unregister);
492 MODULE_ALIAS("platform:mcde-drm");
493 MODULE_DESCRIPTION(DRIVER_DESC);
494 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
495 MODULE_LICENSE("GPL");