drivers/gpu/drm/i915/intel_huc.c

   1 /*
   2  * Copyright © 2016-2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24 #include <linux/firmware.h>
  25 #include "i915_drv.h"
  26 #include "intel_uc.h"
  27
  28 /**
  29  * DOC: HuC Firmware
  30  *
  31  * Motivation:
  32  * GEN9 introduces a new dedicated firmware for usage in media HEVC (High
  33  * Efficiency Video Coding) operations. Userspace can use the firmware
  34  * capabilities by adding HuC specific commands to batch buffers.
  35  *
  36  * Implementation:
  37  * The same firmware loader is used as the GuC. However, the actual
  38  * loading to HW is deferred until GEM initialization is done.
  39  *
  40  * Note that HuC firmware loading must be done before GuC loading.
  41  */
  42
  43 #define BXT_HUC_FW_MAJOR 01
  44 #define BXT_HUC_FW_MINOR 07
  45 #define BXT_BLD_NUM 1398
  46
  47 #define SKL_HUC_FW_MAJOR 01
  48 #define SKL_HUC_FW_MINOR 07
  49 #define SKL_BLD_NUM 1398
  50
  51 #define KBL_HUC_FW_MAJOR 02
  52 #define KBL_HUC_FW_MINOR 00
  53 #define KBL_BLD_NUM 1810
  54
  55 #define HUC_FW_PATH(platform, major, minor, bld_num) \
  56         "/*(DEBLOBBED)*/"
  57
  58 #define I915_SKL_HUC_UCODE HUC_FW_PATH(skl, SKL_HUC_FW_MAJOR, \
  59         SKL_HUC_FW_MINOR, SKL_BLD_NUM)
  60 /*(DEBLOBBED)*/
  61
  62 #define I915_BXT_HUC_UCODE HUC_FW_PATH(bxt, BXT_HUC_FW_MAJOR, \
  63         BXT_HUC_FW_MINOR, BXT_BLD_NUM)
  64 /*(DEBLOBBED)*/
  65
  66 #define I915_KBL_HUC_UCODE HUC_FW_PATH(kbl, KBL_HUC_FW_MAJOR, \
  67         KBL_HUC_FW_MINOR, KBL_BLD_NUM)
  68 /*(DEBLOBBED)*/
  69
  70 /**
  71  * huc_ucode_xfer() - DMA's the firmware
  72  * @dev_priv: the drm_i915_private device
  73  *
  74  * Transfer the firmware image to RAM for execution by the microcontroller.
  75  *
  76  * Return: 0 on success, non-zero on failure
  77  */
  78 static int huc_ucode_xfer(struct drm_i915_private *dev_priv)
  79 {
  80         struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
  81         struct i915_vma *vma;
  82         unsigned long offset = 0;
  83         u32 size;
  84         int ret;
  85
  86         ret = i915_gem_object_set_to_gtt_domain(huc_fw->obj, false);
  87         if (ret) {
  88                 DRM_DEBUG_DRIVER("set-domain failed %d\n", ret);
  89                 return ret;
  90         }
  91
  92         vma = i915_gem_object_ggtt_pin(huc_fw->obj, NULL, 0, 0,
  93                                 PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
  94         if (IS_ERR(vma)) {
  95                 DRM_DEBUG_DRIVER("pin failed %d\n", (int)PTR_ERR(vma));
  96                 return PTR_ERR(vma);
  97         }
  98
  99         intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 100
 101         /* Set the source address for the uCode */
 102         offset = guc_ggtt_offset(vma) + huc_fw->header_offset;
 103         I915_WRITE(DMA_ADDR_0_LOW, lower_32_bits(offset));
 104         I915_WRITE(DMA_ADDR_0_HIGH, upper_32_bits(offset) & 0xFFFF);
 105
 106         /* Hardware doesn't look at destination address for HuC. Set it to 0,
 107          * but still program the correct address space.
 108          */
 109         I915_WRITE(DMA_ADDR_1_LOW, 0);
 110         I915_WRITE(DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM);
 111
 112         size = huc_fw->header_size + huc_fw->ucode_size;
 113         I915_WRITE(DMA_COPY_SIZE, size);
 114
 115         /* Start the DMA */
 116         I915_WRITE(DMA_CTRL, _MASKED_BIT_ENABLE(HUC_UKERNEL | START_DMA));
 117
 118         /* Wait for DMA to finish */
 119         ret = wait_for((I915_READ(DMA_CTRL) & START_DMA) == 0, 100);
 120
 121         DRM_DEBUG_DRIVER("HuC DMA transfer wait over with ret %d\n", ret);
 122
 123         /* Disable the bits once DMA is over */
 124         I915_WRITE(DMA_CTRL, _MASKED_BIT_DISABLE(HUC_UKERNEL));
 125
 126         intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
 127
 128         /*
 129          * We keep the object pages for reuse during resume. But we can unpin it
 130          * now that DMA has completed, so it doesn't continue to take up space.
 131          */
 132         i915_vma_unpin(vma);
 133
 134         return ret;
 135 }
 136
 137 /**
 138  * intel_huc_select_fw() - selects HuC firmware for loading
 139  * @huc:        intel_huc struct
 140  */
 141 void intel_huc_select_fw(struct intel_huc *huc)
 142 {
 143         struct drm_i915_private *dev_priv = huc_to_i915(huc);
 144
 145         huc->fw.path = NULL;
 146         huc->fw.fetch_status = INTEL_UC_FIRMWARE_NONE;
 147         huc->fw.load_status = INTEL_UC_FIRMWARE_NONE;
 148         huc->fw.type = INTEL_UC_FW_TYPE_HUC;
 149
 150         if (i915.huc_firmware_path) {
 151                 huc->fw.path = i915.huc_firmware_path;
 152                 huc->fw.major_ver_wanted = 0;
 153                 huc->fw.minor_ver_wanted = 0;
 154         } else if (IS_SKYLAKE(dev_priv)) {
 155                 huc->fw.path = I915_SKL_HUC_UCODE;
 156                 huc->fw.major_ver_wanted = SKL_HUC_FW_MAJOR;
 157                 huc->fw.minor_ver_wanted = SKL_HUC_FW_MINOR;
 158         } else if (IS_BROXTON(dev_priv)) {
 159                 huc->fw.path = I915_BXT_HUC_UCODE;
 160                 huc->fw.major_ver_wanted = BXT_HUC_FW_MAJOR;
 161                 huc->fw.minor_ver_wanted = BXT_HUC_FW_MINOR;
 162         } else if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) {
 163                 huc->fw.path = I915_KBL_HUC_UCODE;
 164                 huc->fw.major_ver_wanted = KBL_HUC_FW_MAJOR;
 165                 huc->fw.minor_ver_wanted = KBL_HUC_FW_MINOR;
 166         } else {
 167                 DRM_ERROR("No HuC firmware known for platform with HuC!\n");
 168                 return;
 169         }
 170 }
 171
 172 /**
 173  * intel_huc_init_hw() - load HuC uCode to device
 174  * @huc: intel_huc structure
 175  *
 176  * Called from guc_setup() during driver loading and also after a GPU reset.
 177  * Be note that HuC loading must be done before GuC loading.
 178  *
 179  * The firmware image should have already been fetched into memory by the
 180  * earlier call to intel_huc_init(), so here we need only check that
 181  * is succeeded, and then transfer the image to the h/w.
 182  *
 183  */
 184 void intel_huc_init_hw(struct intel_huc *huc)
 185 {
 186         struct drm_i915_private *dev_priv = huc_to_i915(huc);
 187         int err;
 188
 189         DRM_DEBUG_DRIVER("%s fw status: fetch %s, load %s\n",
 190                 huc->fw.path,
 191                 intel_uc_fw_status_repr(huc->fw.fetch_status),
 192                 intel_uc_fw_status_repr(huc->fw.load_status));
 193
 194         if (huc->fw.fetch_status != INTEL_UC_FIRMWARE_SUCCESS)
 195                 return;
 196
 197         huc->fw.load_status = INTEL_UC_FIRMWARE_PENDING;
 198
 199         err = huc_ucode_xfer(dev_priv);
 200
 201         huc->fw.load_status = err ?
 202                 INTEL_UC_FIRMWARE_FAIL : INTEL_UC_FIRMWARE_SUCCESS;
 203
 204         DRM_DEBUG_DRIVER("%s fw status: fetch %s, load %s\n",
 205                 huc->fw.path,
 206                 intel_uc_fw_status_repr(huc->fw.fetch_status),
 207                 intel_uc_fw_status_repr(huc->fw.load_status));
 208
 209         if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
 210                 DRM_ERROR("Failed to complete HuC uCode load with ret %d\n", err);
 211
 212         return;
 213 }
 214
 215 /**
 216  * intel_guc_auth_huc() - authenticate ucode
 217  * @dev_priv: the drm_i915_device
 218  *
 219  * Triggers a HuC fw authentication request to the GuC via intel_guc_action_
 220  * authenticate_huc interface.
 221  */
 222 void intel_guc_auth_huc(struct drm_i915_private *dev_priv)
 223 {
 224         struct intel_guc *guc = &dev_priv->guc;
 225         struct intel_huc *huc = &dev_priv->huc;
 226         struct i915_vma *vma;
 227         int ret;
 228         u32 data[2];
 229
 230         if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
 231                 return;
 232
 233         vma = i915_gem_object_ggtt_pin(huc->fw.obj, NULL, 0, 0,
 234                                 PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
 235         if (IS_ERR(vma)) {
 236                 DRM_ERROR("failed to pin huc fw object %d\n",
 237                                 (int)PTR_ERR(vma));
 238                 return;
 239         }
 240
 241         /* Specify auth action and where public signature is. */
 242         data[0] = INTEL_GUC_ACTION_AUTHENTICATE_HUC;
 243         data[1] = guc_ggtt_offset(vma) + huc->fw.rsa_offset;
 244
 245         ret = intel_guc_send(guc, data, ARRAY_SIZE(data));
 246         if (ret) {
 247                 DRM_ERROR("HuC: GuC did not ack Auth request %d\n", ret);
 248                 goto out;
 249         }
 250
 251         /* Check authentication status, it should be done by now */
 252         ret = intel_wait_for_register(dev_priv,
 253                                 HUC_STATUS2,
 254                                 HUC_FW_VERIFIED,
 255                                 HUC_FW_VERIFIED,
 256                                 50);
 257
 258         if (ret) {
 259                 DRM_ERROR("HuC: Authentication failed %d\n", ret);
 260                 goto out;
 261         }
 262
 263 out:
 264         i915_vma_unpin(vma);
 265 }
 266