1 // SPDX-License-Identifier: MIT
3 * Copyright © 2016-2019 Intel Corporation
6 #include <linux/bitfield.h>
7 #include <linux/firmware.h>
8 #include <drm/drm_print.h>
10 #include "intel_uc_fw.h"
11 #include "intel_uc_fw_abi.h"
14 static inline struct intel_gt *
15 ____uc_fw_to_gt(struct intel_uc_fw *uc_fw, enum intel_uc_fw_type type)
17 if (type == INTEL_UC_FW_TYPE_GUC)
18 return container_of(uc_fw, struct intel_gt, uc.guc.fw);
20 GEM_BUG_ON(type != INTEL_UC_FW_TYPE_HUC);
21 return container_of(uc_fw, struct intel_gt, uc.huc.fw);
24 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw)
26 GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED);
27 return ____uc_fw_to_gt(uc_fw, uc_fw->type);
30 #ifdef CONFIG_DRM_I915_DEBUG_GUC
31 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw,
32 enum intel_uc_fw_status status)
34 uc_fw->__status = status;
35 drm_dbg(&__uc_fw_to_gt(uc_fw)->i915->drm,
36 "%s firmware -> %s\n",
37 intel_uc_fw_type_repr(uc_fw->type),
38 status == INTEL_UC_FIRMWARE_SELECTED ?
39 uc_fw->path : intel_uc_fw_status_repr(status));
44 * List of required GuC and HuC binaries per-platform.
45 * Must be ordered based on platform + revid, from newer to older.
47 * TGL 35.2 is interface-compatible with 33.0 for previous Gens. The deltas
48 * between 33.0 and 35.2 are only related to new additions to support new Gen12
51 * Note that RKL uses the same firmware as TGL.
53 #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \
54 fw_def(ROCKETLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7, 5, 0)) \
55 fw_def(TIGERLAKE, 0, guc_def(tgl, 35, 2, 0), huc_def(tgl, 7, 5, 0)) \
56 fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9, 0, 0)) \
57 fw_def(ICELAKE, 0, guc_def(icl, 33, 0, 0), huc_def(icl, 9, 0, 0)) \
58 fw_def(COMETLAKE, 5, guc_def(cml, 33, 0, 0), huc_def(cml, 4, 0, 0)) \
59 fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
60 fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 4, 0, 0)) \
61 fw_def(KABYLAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \
62 fw_def(BROXTON, 0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 2, 0, 0)) \
63 fw_def(SKYLAKE, 0, guc_def(skl, 33, 0, 0), huc_def(skl, 2, 0, 0))
65 #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \
68 #define MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_) \
69 __MAKE_UC_FW_PATH(prefix_, "_guc_", major_, minor_, patch_)
71 #define MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_) \
72 __MAKE_UC_FW_PATH(prefix_, "_huc_", major_, minor_, bld_num_)
74 /* All blobs need to be declared via MODULE_FIRMWARE() */
75 #define INTEL_UC_MODULE_FW(platform_, revid_, guc_, huc_) \
79 INTEL_UC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH, MAKE_HUC_FW_PATH)
81 /* The below structs and macros are used to iterate across the list of blobs */
82 struct __packed uc_fw_blob {
88 #define UC_FW_BLOB(major_, minor_, path_) \
89 { .major = major_, .minor = minor_, .path = path_ }
91 #define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \
92 UC_FW_BLOB(major_, minor_, \
93 MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_))
95 #define HUC_FW_BLOB(prefix_, major_, minor_, bld_num_) \
96 UC_FW_BLOB(major_, minor_, \
97 MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_))
99 struct __packed uc_fw_platform_requirement {
100 enum intel_platform p;
101 u8 rev; /* first platform rev using this FW */
102 const struct uc_fw_blob blobs[INTEL_UC_FW_NUM_TYPES];
105 #define MAKE_FW_LIST(platform_, revid_, guc_, huc_) \
107 .p = INTEL_##platform_, \
109 .blobs[INTEL_UC_FW_TYPE_GUC] = guc_, \
110 .blobs[INTEL_UC_FW_TYPE_HUC] = huc_, \
114 __uc_fw_auto_select(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
116 static const struct uc_fw_platform_requirement fw_blobs[] = {
117 INTEL_UC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, HUC_FW_BLOB)
119 enum intel_platform p = INTEL_INFO(i915)->platform;
120 u8 rev = INTEL_REVID(i915);
123 for (i = 0; i < ARRAY_SIZE(fw_blobs) && p <= fw_blobs[i].p; i++) {
124 if (p == fw_blobs[i].p && rev >= fw_blobs[i].rev) {
125 const struct uc_fw_blob *blob =
126 &fw_blobs[i].blobs[uc_fw->type];
127 uc_fw->path = blob->path;
128 uc_fw->major_ver_wanted = blob->major;
129 uc_fw->minor_ver_wanted = blob->minor;
134 /* make sure the list is ordered as expected */
135 if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST)) {
136 for (i = 1; i < ARRAY_SIZE(fw_blobs); i++) {
137 if (fw_blobs[i].p < fw_blobs[i - 1].p)
140 if (fw_blobs[i].p == fw_blobs[i - 1].p &&
141 fw_blobs[i].rev < fw_blobs[i - 1].rev)
144 pr_err("invalid FW blob order: %s r%u comes before %s r%u\n",
145 intel_platform_name(fw_blobs[i - 1].p),
147 intel_platform_name(fw_blobs[i].p),
154 /* We don't want to enable GuC/HuC on pre-Gen11 by default */
155 if (i915->params.enable_guc == -1 && p < INTEL_ICELAKE)
159 static const char *__override_guc_firmware_path(struct drm_i915_private *i915)
161 if (i915->params.enable_guc & (ENABLE_GUC_SUBMISSION |
162 ENABLE_GUC_LOAD_HUC))
163 return i915->params.guc_firmware_path;
167 static const char *__override_huc_firmware_path(struct drm_i915_private *i915)
169 if (i915->params.enable_guc & ENABLE_GUC_LOAD_HUC)
170 return i915->params.huc_firmware_path;
174 static void __uc_fw_user_override(struct drm_i915_private *i915, struct intel_uc_fw *uc_fw)
176 const char *path = NULL;
178 switch (uc_fw->type) {
179 case INTEL_UC_FW_TYPE_GUC:
180 path = __override_guc_firmware_path(i915);
182 case INTEL_UC_FW_TYPE_HUC:
183 path = __override_huc_firmware_path(i915);
187 if (unlikely(path)) {
189 uc_fw->user_overridden = true;
194 * intel_uc_fw_init_early - initialize the uC object and select the firmware
195 * @uc_fw: uC firmware
198 * Initialize the state of our uC object and relevant tracking and select the
199 * firmware to fetch and load.
201 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw,
202 enum intel_uc_fw_type type)
204 struct drm_i915_private *i915 = ____uc_fw_to_gt(uc_fw, type)->i915;
207 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status
208 * before we're looked at the HW caps to see if we have uc support
210 BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED);
211 GEM_BUG_ON(uc_fw->status);
212 GEM_BUG_ON(uc_fw->path);
216 if (HAS_GT_UC(i915)) {
217 __uc_fw_auto_select(i915, uc_fw);
218 __uc_fw_user_override(i915, uc_fw);
221 intel_uc_fw_change_status(uc_fw, uc_fw->path ? *uc_fw->path ?
222 INTEL_UC_FIRMWARE_SELECTED :
223 INTEL_UC_FIRMWARE_DISABLED :
224 INTEL_UC_FIRMWARE_NOT_SUPPORTED);
227 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, int e)
229 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915;
230 bool user = e == -EINVAL;
232 if (i915_inject_probe_error(i915, e)) {
233 /* non-existing blob */
234 uc_fw->path = "<invalid>";
235 uc_fw->user_overridden = user;
236 } else if (i915_inject_probe_error(i915, e)) {
237 /* require next major version */
238 uc_fw->major_ver_wanted += 1;
239 uc_fw->minor_ver_wanted = 0;
240 uc_fw->user_overridden = user;
241 } else if (i915_inject_probe_error(i915, e)) {
242 /* require next minor version */
243 uc_fw->minor_ver_wanted += 1;
244 uc_fw->user_overridden = user;
245 } else if (uc_fw->major_ver_wanted &&
246 i915_inject_probe_error(i915, e)) {
247 /* require prev major version */
248 uc_fw->major_ver_wanted -= 1;
249 uc_fw->minor_ver_wanted = 0;
250 uc_fw->user_overridden = user;
251 } else if (uc_fw->minor_ver_wanted &&
252 i915_inject_probe_error(i915, e)) {
253 /* require prev minor version - hey, this should work! */
254 uc_fw->minor_ver_wanted -= 1;
255 uc_fw->user_overridden = user;
256 } else if (user && i915_inject_probe_error(i915, e)) {
257 /* officially unsupported platform */
258 uc_fw->major_ver_wanted = 0;
259 uc_fw->minor_ver_wanted = 0;
260 uc_fw->user_overridden = true;
265 * intel_uc_fw_fetch - fetch uC firmware
266 * @uc_fw: uC firmware
268 * Fetch uC firmware into GEM obj.
270 * Return: 0 on success, a negative errno code on failure.
272 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw)
274 struct drm_i915_private *i915 = __uc_fw_to_gt(uc_fw)->i915;
275 struct device *dev = i915->drm.dev;
276 struct drm_i915_gem_object *obj;
277 const struct firmware *fw = NULL;
278 struct uc_css_header *css;
282 GEM_BUG_ON(!i915->wopcm.size);
283 GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw));
285 err = i915_inject_probe_error(i915, -ENXIO);
289 __force_fw_fetch_failures(uc_fw, -EINVAL);
290 __force_fw_fetch_failures(uc_fw, -ESTALE);
292 err = reject_firmware(&fw, uc_fw->path, dev);
296 /* Check the size of the blob before examining buffer contents */
297 if (unlikely(fw->size < sizeof(struct uc_css_header))) {
298 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n",
299 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
300 fw->size, sizeof(struct uc_css_header));
305 css = (struct uc_css_header *)fw->data;
307 /* Check integrity of size values inside CSS header */
308 size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw -
309 css->exponent_size_dw) * sizeof(u32);
310 if (unlikely(size != sizeof(struct uc_css_header))) {
312 "%s firmware %s: unexpected header size: %zu != %zu\n",
313 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
314 fw->size, sizeof(struct uc_css_header));
319 /* uCode size must calculated from other sizes */
320 uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32);
323 if (unlikely(css->key_size_dw != UOS_RSA_SCRATCH_COUNT)) {
324 drm_warn(&i915->drm, "%s firmware %s: unexpected key size: %u != %u\n",
325 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
326 css->key_size_dw, UOS_RSA_SCRATCH_COUNT);
330 uc_fw->rsa_size = css->key_size_dw * sizeof(u32);
332 /* At least, it should have header, uCode and RSA. Size of all three. */
333 size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size;
334 if (unlikely(fw->size < size)) {
335 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu < %zu\n",
336 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
342 /* Sanity check whether this fw is not larger than whole WOPCM memory */
343 size = __intel_uc_fw_get_upload_size(uc_fw);
344 if (unlikely(size >= i915->wopcm.size)) {
345 drm_warn(&i915->drm, "%s firmware %s: invalid size: %zu > %zu\n",
346 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
347 size, (size_t)i915->wopcm.size);
352 /* Get version numbers from the CSS header */
353 uc_fw->major_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MAJOR,
355 uc_fw->minor_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MINOR,
358 if (uc_fw->major_ver_found != uc_fw->major_ver_wanted ||
359 uc_fw->minor_ver_found < uc_fw->minor_ver_wanted) {
360 drm_notice(&i915->drm, "%s firmware %s: unexpected version: %u.%u != %u.%u\n",
361 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
362 uc_fw->major_ver_found, uc_fw->minor_ver_found,
363 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted);
364 if (!intel_uc_fw_is_overridden(uc_fw)) {
370 obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size);
377 uc_fw->size = fw->size;
378 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE);
380 release_firmware(fw);
384 intel_uc_fw_change_status(uc_fw, err == -ENOENT ?
385 INTEL_UC_FIRMWARE_MISSING :
386 INTEL_UC_FIRMWARE_ERROR);
388 drm_notice(&i915->drm, "%s firmware %s: fetch failed with error %d\n",
389 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, err);
390 drm_info(&i915->drm, "%s firmware(s) can be downloaded from %s\n",
391 intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL);
393 release_firmware(fw); /* OK even if fw is NULL */
397 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw)
399 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt;
400 struct drm_mm_node *node = &ggtt->uc_fw;
402 GEM_BUG_ON(!drm_mm_node_allocated(node));
403 GEM_BUG_ON(upper_32_bits(node->start));
404 GEM_BUG_ON(upper_32_bits(node->start + node->size - 1));
406 return lower_32_bits(node->start);
409 static void uc_fw_bind_ggtt(struct intel_uc_fw *uc_fw)
411 struct drm_i915_gem_object *obj = uc_fw->obj;
412 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt;
413 struct i915_vma dummy = {
414 .node.start = uc_fw_ggtt_offset(uc_fw),
415 .node.size = obj->base.size,
416 .pages = obj->mm.pages,
420 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
421 GEM_BUG_ON(dummy.node.size > ggtt->uc_fw.size);
423 /* uc_fw->obj cache domains were not controlled across suspend */
424 drm_clflush_sg(dummy.pages);
426 ggtt->vm.insert_entries(&ggtt->vm, &dummy, I915_CACHE_NONE, 0);
429 static void uc_fw_unbind_ggtt(struct intel_uc_fw *uc_fw)
431 struct drm_i915_gem_object *obj = uc_fw->obj;
432 struct i915_ggtt *ggtt = __uc_fw_to_gt(uc_fw)->ggtt;
433 u64 start = uc_fw_ggtt_offset(uc_fw);
435 ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size);
438 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags)
440 struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
441 struct intel_uncore *uncore = gt->uncore;
445 ret = i915_inject_probe_error(gt->i915, -ETIMEDOUT);
449 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
451 /* Set the source address for the uCode */
452 offset = uc_fw_ggtt_offset(uc_fw);
453 GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000);
454 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset));
455 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset));
457 /* Set the DMA destination */
458 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, dst_offset);
459 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM);
462 * Set the transfer size. The header plus uCode will be copied to WOPCM
463 * via DMA, excluding any other components
465 intel_uncore_write_fw(uncore, DMA_COPY_SIZE,
466 sizeof(struct uc_css_header) + uc_fw->ucode_size);
469 intel_uncore_write_fw(uncore, DMA_CTRL,
470 _MASKED_BIT_ENABLE(dma_flags | START_DMA));
472 /* Wait for DMA to finish */
473 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100);
475 drm_err(>->i915->drm, "DMA for %s fw failed, DMA_CTRL=%u\n",
476 intel_uc_fw_type_repr(uc_fw->type),
477 intel_uncore_read_fw(uncore, DMA_CTRL));
479 /* Disable the bits once DMA is over */
480 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags));
482 intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
488 * intel_uc_fw_upload - load uC firmware using custom loader
489 * @uc_fw: uC firmware
490 * @dst_offset: destination offset
491 * @dma_flags: flags for flags for dma ctrl
493 * Loads uC firmware and updates internal flags.
495 * Return: 0 on success, non-zero on failure.
497 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, u32 dst_offset, u32 dma_flags)
499 struct intel_gt *gt = __uc_fw_to_gt(uc_fw);
502 /* make sure the status was cleared the last time we reset the uc */
503 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw));
505 err = i915_inject_probe_error(gt->i915, -ENOEXEC);
509 if (!intel_uc_fw_is_loadable(uc_fw))
512 /* Call custom loader */
513 uc_fw_bind_ggtt(uc_fw);
514 err = uc_fw_xfer(uc_fw, dst_offset, dma_flags);
515 uc_fw_unbind_ggtt(uc_fw);
519 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED);
523 i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n",
524 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
526 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL);
530 int intel_uc_fw_init(struct intel_uc_fw *uc_fw)
534 /* this should happen before the load! */
535 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw));
537 if (!intel_uc_fw_is_available(uc_fw))
540 err = i915_gem_object_pin_pages(uc_fw->obj);
542 DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n",
543 intel_uc_fw_type_repr(uc_fw->type), err);
544 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL);
550 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw)
552 if (i915_gem_object_has_pinned_pages(uc_fw->obj))
553 i915_gem_object_unpin_pages(uc_fw->obj);
555 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE);
559 * intel_uc_fw_cleanup_fetch - cleanup uC firmware
560 * @uc_fw: uC firmware
562 * Cleans up uC firmware by releasing the firmware GEM obj.
564 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw)
566 if (!intel_uc_fw_is_available(uc_fw))
569 i915_gem_object_put(fetch_and_zero(&uc_fw->obj));
571 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED);
575 * intel_uc_fw_copy_rsa - copy fw RSA to buffer
577 * @uc_fw: uC firmware
579 * @max_len: max number of bytes to copy
581 * Return: number of copied bytes.
583 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len)
585 struct sg_table *pages = uc_fw->obj->mm.pages;
586 u32 size = min_t(u32, uc_fw->rsa_size, max_len);
587 u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size;
589 GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw));
591 return sg_pcopy_to_buffer(pages->sgl, pages->nents, dst, size, offset);
595 * intel_uc_fw_dump - dump information about uC firmware
596 * @uc_fw: uC firmware
597 * @p: the &drm_printer
599 * Pretty printer for uC firmware.
601 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p)
603 drm_printf(p, "%s firmware: %s\n",
604 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path);
605 drm_printf(p, "\tstatus: %s\n",
606 intel_uc_fw_status_repr(uc_fw->status));
607 drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n",
608 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted,
609 uc_fw->major_ver_found, uc_fw->minor_ver_found);
610 drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size);
611 drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size);