1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2009 Intel Corporation
6 * Eric Anholt <eric@anholt.net>
7 * Dave Airlie <airlied@linux.ie>
8 * Jesse Barnes <jesse.barnes@intel.com>
11 #include <linux/i2c.h>
12 #include <linux/pm_runtime.h>
14 #include <asm/intel-mid.h>
16 #include <drm/drm_simple_kms_helper.h>
18 #include "intel_bios.h"
21 #include "psb_intel_drv.h"
22 #include "psb_intel_reg.h"
24 /* The max/min PWM frequency in BPCR[31:17] - */
25 /* The smallest number is 1 (not 0) that can fit in the
26 * 15-bit field of the and then*/
27 /* shifts to the left by one bit to get the actual 16-bit
28 * value that the 15-bits correspond to.*/
29 #define MRST_BLC_MAX_PWM_REG_FREQ 0xFFFF
30 #define BRIGHTNESS_MAX_LEVEL 100
33 * Sets the power state for the panel.
35 static void oaktrail_lvds_set_power(struct drm_device *dev,
36 struct gma_encoder *gma_encoder,
40 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
42 if (!gma_power_begin(dev, true))
46 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
49 pp_status = REG_READ(PP_STATUS);
50 } while ((pp_status & (PP_ON | PP_READY)) == PP_READY);
51 dev_priv->is_lvds_on = true;
52 if (dev_priv->ops->lvds_bl_power)
53 dev_priv->ops->lvds_bl_power(dev, true);
55 if (dev_priv->ops->lvds_bl_power)
56 dev_priv->ops->lvds_bl_power(dev, false);
57 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
60 pp_status = REG_READ(PP_STATUS);
61 } while (pp_status & PP_ON);
62 dev_priv->is_lvds_on = false;
63 pm_request_idle(dev->dev);
68 static void oaktrail_lvds_dpms(struct drm_encoder *encoder, int mode)
70 struct drm_device *dev = encoder->dev;
71 struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
73 if (mode == DRM_MODE_DPMS_ON)
74 oaktrail_lvds_set_power(dev, gma_encoder, true);
76 oaktrail_lvds_set_power(dev, gma_encoder, false);
78 /* XXX: We never power down the LVDS pairs. */
81 static void oaktrail_lvds_mode_set(struct drm_encoder *encoder,
82 struct drm_display_mode *mode,
83 struct drm_display_mode *adjusted_mode)
85 struct drm_device *dev = encoder->dev;
86 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
87 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
88 struct drm_connector_list_iter conn_iter;
89 struct drm_connector *connector = NULL;
90 struct drm_crtc *crtc = encoder->crtc;
92 uint64_t v = DRM_MODE_SCALE_FULLSCREEN;
94 if (!gma_power_begin(dev, true))
98 * The LVDS pin pair will already have been turned on in the
99 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
102 lvds_port = (REG_READ(LVDS) &
103 (~LVDS_PIPEB_SELECT)) |
107 /* If the firmware says dither on Moorestown, or the BIOS does
108 on Oaktrail then enable dithering */
109 if (mode_dev->panel_wants_dither || dev_priv->lvds_dither)
110 lvds_port |= MRST_PANEL_8TO6_DITHER_ENABLE;
112 REG_WRITE(LVDS, lvds_port);
114 /* Find the connector we're trying to set up */
115 drm_connector_list_iter_begin(dev, &conn_iter);
116 drm_for_each_connector_iter(connector, &conn_iter) {
117 if (connector->encoder && connector->encoder->crtc == crtc)
122 drm_connector_list_iter_end(&conn_iter);
123 DRM_ERROR("Couldn't find connector when setting mode");
128 drm_object_property_get_value( &connector->base,
129 dev->mode_config.scaling_mode_property, &v);
130 drm_connector_list_iter_end(&conn_iter);
132 if (v == DRM_MODE_SCALE_NO_SCALE)
133 REG_WRITE(PFIT_CONTROL, 0);
134 else if (v == DRM_MODE_SCALE_ASPECT) {
135 if ((mode->vdisplay != adjusted_mode->crtc_vdisplay) ||
136 (mode->hdisplay != adjusted_mode->crtc_hdisplay)) {
137 if ((adjusted_mode->crtc_hdisplay * mode->vdisplay) ==
138 (mode->hdisplay * adjusted_mode->crtc_vdisplay))
139 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
140 else if ((adjusted_mode->crtc_hdisplay *
141 mode->vdisplay) > (mode->hdisplay *
142 adjusted_mode->crtc_vdisplay))
143 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
144 PFIT_SCALING_MODE_PILLARBOX);
146 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE |
147 PFIT_SCALING_MODE_LETTERBOX);
149 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
150 } else /*(v == DRM_MODE_SCALE_FULLSCREEN)*/
151 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE);
156 static void oaktrail_lvds_prepare(struct drm_encoder *encoder)
158 struct drm_device *dev = encoder->dev;
159 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
160 struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
161 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
163 if (!gma_power_begin(dev, true))
166 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
167 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
168 BACKLIGHT_DUTY_CYCLE_MASK);
169 oaktrail_lvds_set_power(dev, gma_encoder, false);
173 static u32 oaktrail_lvds_get_max_backlight(struct drm_device *dev)
175 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
178 if (gma_power_begin(dev, false)) {
179 ret = ((REG_READ(BLC_PWM_CTL) &
180 BACKLIGHT_MODULATION_FREQ_MASK) >>
181 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
185 ret = ((dev_priv->regs.saveBLC_PWM_CTL &
186 BACKLIGHT_MODULATION_FREQ_MASK) >>
187 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
192 static void oaktrail_lvds_commit(struct drm_encoder *encoder)
194 struct drm_device *dev = encoder->dev;
195 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
196 struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
197 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
199 if (mode_dev->backlight_duty_cycle == 0)
200 mode_dev->backlight_duty_cycle =
201 oaktrail_lvds_get_max_backlight(dev);
202 oaktrail_lvds_set_power(dev, gma_encoder, true);
205 static const struct drm_encoder_helper_funcs oaktrail_lvds_helper_funcs = {
206 .dpms = oaktrail_lvds_dpms,
207 .mode_fixup = psb_intel_lvds_mode_fixup,
208 .prepare = oaktrail_lvds_prepare,
209 .mode_set = oaktrail_lvds_mode_set,
210 .commit = oaktrail_lvds_commit,
213 /* Returns the panel fixed mode from configuration. */
215 static void oaktrail_lvds_get_configuration_mode(struct drm_device *dev,
216 struct psb_intel_mode_device *mode_dev)
218 struct drm_display_mode *mode = NULL;
219 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
220 struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD;
222 mode_dev->panel_fixed_mode = NULL;
224 /* Use the firmware provided data on Moorestown */
225 if (dev_priv->has_gct) {
226 mode = kzalloc(sizeof(*mode), GFP_KERNEL);
230 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo;
231 mode->vdisplay = (ti->vactive_hi << 8) | ti->vactive_lo;
232 mode->hsync_start = mode->hdisplay + \
233 ((ti->hsync_offset_hi << 8) | \
234 ti->hsync_offset_lo);
235 mode->hsync_end = mode->hsync_start + \
236 ((ti->hsync_pulse_width_hi << 8) | \
237 ti->hsync_pulse_width_lo);
238 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \
240 mode->vsync_start = \
241 mode->vdisplay + ((ti->vsync_offset_hi << 4) | \
242 ti->vsync_offset_lo);
244 mode->vsync_start + ((ti->vsync_pulse_width_hi << 4) | \
245 ti->vsync_pulse_width_lo);
246 mode->vtotal = mode->vdisplay + \
247 ((ti->vblank_hi << 8) | ti->vblank_lo);
248 mode->clock = ti->pixel_clock * 10;
250 pr_info("hdisplay is %d\n", mode->hdisplay);
251 pr_info("vdisplay is %d\n", mode->vdisplay);
252 pr_info("HSS is %d\n", mode->hsync_start);
253 pr_info("HSE is %d\n", mode->hsync_end);
254 pr_info("htotal is %d\n", mode->htotal);
255 pr_info("VSS is %d\n", mode->vsync_start);
256 pr_info("VSE is %d\n", mode->vsync_end);
257 pr_info("vtotal is %d\n", mode->vtotal);
258 pr_info("clock is %d\n", mode->clock);
260 mode_dev->panel_fixed_mode = mode;
263 /* Use the BIOS VBT mode if available */
264 if (mode_dev->panel_fixed_mode == NULL && mode_dev->vbt_mode)
265 mode_dev->panel_fixed_mode = drm_mode_duplicate(dev,
268 /* Then try the LVDS VBT mode */
269 if (mode_dev->panel_fixed_mode == NULL)
270 if (dev_priv->lfp_lvds_vbt_mode)
271 mode_dev->panel_fixed_mode =
272 drm_mode_duplicate(dev,
273 dev_priv->lfp_lvds_vbt_mode);
275 /* If we still got no mode then bail */
276 if (mode_dev->panel_fixed_mode == NULL)
279 drm_mode_set_name(mode_dev->panel_fixed_mode);
280 drm_mode_set_crtcinfo(mode_dev->panel_fixed_mode, 0);
284 * oaktrail_lvds_init - setup LVDS connectors on this device
286 * @mode_dev: PSB mode device
288 * Create the connector, register the LVDS DDC bus, and try to figure out what
289 * modes we can display on the LVDS panel (if present).
291 void oaktrail_lvds_init(struct drm_device *dev,
292 struct psb_intel_mode_device *mode_dev)
294 struct gma_encoder *gma_encoder;
295 struct gma_connector *gma_connector;
296 struct drm_connector *connector;
297 struct drm_encoder *encoder;
298 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
300 struct i2c_adapter *i2c_adap;
301 struct drm_display_mode *scan; /* *modes, *bios_mode; */
303 gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
307 gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
309 goto failed_connector;
311 connector = &gma_connector->base;
312 encoder = &gma_encoder->base;
313 dev_priv->is_lvds_on = true;
314 drm_connector_init(dev, connector,
315 &psb_intel_lvds_connector_funcs,
316 DRM_MODE_CONNECTOR_LVDS);
318 drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_LVDS);
320 gma_connector_attach_encoder(gma_connector, gma_encoder);
321 gma_encoder->type = INTEL_OUTPUT_LVDS;
323 drm_encoder_helper_add(encoder, &oaktrail_lvds_helper_funcs);
324 drm_connector_helper_add(connector,
325 &psb_intel_lvds_connector_helper_funcs);
326 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
327 connector->interlace_allowed = false;
328 connector->doublescan_allowed = false;
330 drm_object_attach_property(&connector->base,
331 dev->mode_config.scaling_mode_property,
332 DRM_MODE_SCALE_FULLSCREEN);
333 drm_object_attach_property(&connector->base,
334 dev_priv->backlight_property,
335 BRIGHTNESS_MAX_LEVEL);
337 mode_dev->panel_wants_dither = false;
338 if (dev_priv->has_gct)
339 mode_dev->panel_wants_dither = (dev_priv->gct_data.
340 Panel_Port_Control & MRST_PANEL_8TO6_DITHER_ENABLE);
341 if (dev_priv->lvds_dither)
342 mode_dev->panel_wants_dither = 1;
346 * 1) check for EDID on DDC
347 * 2) check for VBT data
348 * 3) check to see if LVDS is already on
349 * if none of the above, no panel
350 * 4) make sure lid is open
351 * if closed, act like it's not there for now
355 mutex_lock(&dev->mode_config.mutex);
356 i2c_adap = i2c_get_adapter(dev_priv->ops->i2c_bus);
358 edid = drm_get_edid(connector, i2c_adap);
359 if (edid == NULL && dev_priv->lpc_gpio_base) {
360 oaktrail_lvds_i2c_init(encoder);
361 if (gma_encoder->ddc_bus != NULL) {
362 i2c_adap = &gma_encoder->ddc_bus->adapter;
363 edid = drm_get_edid(connector, i2c_adap);
367 * Attempt to get the fixed panel mode from DDC. Assume that the
368 * preferred mode is the right one.
371 drm_connector_update_edid_property(connector, edid);
372 drm_add_edid_modes(connector, edid);
375 list_for_each_entry(scan, &connector->probed_modes, head) {
376 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
377 mode_dev->panel_fixed_mode =
378 drm_mode_duplicate(dev, scan);
379 goto out; /* FIXME: check for quirks */
383 dev_err(dev->dev, "No ddc adapter available!\n");
385 * If we didn't get EDID, try geting panel timing
386 * from configuration data
388 oaktrail_lvds_get_configuration_mode(dev, mode_dev);
390 if (mode_dev->panel_fixed_mode) {
391 mode_dev->panel_fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
392 goto out; /* FIXME: check for quirks */
395 /* If we still don't have a mode after all that, give up. */
396 if (!mode_dev->panel_fixed_mode) {
397 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
402 mutex_unlock(&dev->mode_config.mutex);
407 mutex_unlock(&dev->mode_config.mutex);
409 dev_dbg(dev->dev, "No LVDS modes found, disabling.\n");
410 if (gma_encoder->ddc_bus) {
411 psb_intel_i2c_destroy(gma_encoder->ddc_bus);
412 gma_encoder->ddc_bus = NULL;
417 drm_encoder_cleanup(encoder);
418 drm_connector_cleanup(connector);
419 kfree(gma_connector);