2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundationr
10 #include <linux/kernel.h>
11 #include <linux/clk.h>
12 #include <linux/err.h>
13 #include <linux/interrupt.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/slab.h>
18 #include <linux/workqueue.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-attrs.h>
24 #include <drm/exynos_drm.h>
25 #include "exynos_drm_drv.h"
26 #include "exynos_drm_g2d.h"
27 #include "exynos_drm_gem.h"
28 #include "exynos_drm_iommu.h"
30 #define G2D_HW_MAJOR_VER 4
31 #define G2D_HW_MINOR_VER 1
33 /* vaild register range set from user: 0x0104 ~ 0x0880 */
34 #define G2D_VALID_START 0x0104
35 #define G2D_VALID_END 0x0880
37 /* general registers */
38 #define G2D_SOFT_RESET 0x0000
39 #define G2D_INTEN 0x0004
40 #define G2D_INTC_PEND 0x000C
41 #define G2D_DMA_SFR_BASE_ADDR 0x0080
42 #define G2D_DMA_COMMAND 0x0084
43 #define G2D_DMA_STATUS 0x008C
44 #define G2D_DMA_HOLD_CMD 0x0090
46 /* command registers */
47 #define G2D_BITBLT_START 0x0100
49 /* registers for base address */
50 #define G2D_SRC_BASE_ADDR 0x0304
51 #define G2D_SRC_STRIDE_REG 0x0308
52 #define G2D_SRC_COLOR_MODE 0x030C
53 #define G2D_SRC_LEFT_TOP 0x0310
54 #define G2D_SRC_RIGHT_BOTTOM 0x0314
55 #define G2D_SRC_PLANE2_BASE_ADDR 0x0318
56 #define G2D_DST_BASE_ADDR 0x0404
57 #define G2D_DST_STRIDE_REG 0x0408
58 #define G2D_DST_COLOR_MODE 0x040C
59 #define G2D_DST_LEFT_TOP 0x0410
60 #define G2D_DST_RIGHT_BOTTOM 0x0414
61 #define G2D_DST_PLANE2_BASE_ADDR 0x0418
62 #define G2D_PAT_BASE_ADDR 0x0500
63 #define G2D_MSK_BASE_ADDR 0x0520
66 #define G2D_SFRCLEAR (1 << 1)
67 #define G2D_R (1 << 0)
70 #define G2D_INTEN_ACF (1 << 3)
71 #define G2D_INTEN_UCF (1 << 2)
72 #define G2D_INTEN_GCF (1 << 1)
73 #define G2D_INTEN_SCF (1 << 0)
76 #define G2D_INTP_ACMD_FIN (1 << 3)
77 #define G2D_INTP_UCMD_FIN (1 << 2)
78 #define G2D_INTP_GCMD_FIN (1 << 1)
79 #define G2D_INTP_SCMD_FIN (1 << 0)
82 #define G2D_DMA_HALT (1 << 2)
83 #define G2D_DMA_CONTINUE (1 << 1)
84 #define G2D_DMA_START (1 << 0)
87 #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17)
88 #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1)
89 #define G2D_DMA_DONE (1 << 0)
90 #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
92 /* G2D_DMA_HOLD_CMD */
93 #define G2D_USER_HOLD (1 << 2)
94 #define G2D_LIST_HOLD (1 << 1)
95 #define G2D_BITBLT_HOLD (1 << 0)
97 /* G2D_BITBLT_START */
98 #define G2D_START_CASESEL (1 << 2)
99 #define G2D_START_NHOLT (1 << 1)
100 #define G2D_START_BITBLT (1 << 0)
102 /* buffer color format */
103 #define G2D_FMT_XRGB8888 0
104 #define G2D_FMT_ARGB8888 1
105 #define G2D_FMT_RGB565 2
106 #define G2D_FMT_XRGB1555 3
107 #define G2D_FMT_ARGB1555 4
108 #define G2D_FMT_XRGB4444 5
109 #define G2D_FMT_ARGB4444 6
110 #define G2D_FMT_PACKED_RGB888 7
111 #define G2D_FMT_A8 11
112 #define G2D_FMT_L8 12
114 /* buffer valid length */
115 #define G2D_LEN_MIN 1
116 #define G2D_LEN_MAX 8000
118 #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
119 #define G2D_CMDLIST_NUM 64
120 #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
121 #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
123 /* maximum buffer pool size of userptr is 64MB as default */
124 #define MAX_POOL (64 * 1024 * 1024)
142 /* cmdlist data structure */
145 unsigned long data[G2D_CMDLIST_DATA_NUM];
146 u32 last; /* last data offset */
150 * A structure of buffer description
152 * @format: color format
153 * @stride: buffer stride/pitch in bytes
154 * @left_x: the x coordinates of left top corner
155 * @top_y: the y coordinates of left top corner
156 * @right_x: the x coordinates of right bottom corner
157 * @bottom_y: the y coordinates of right bottom corner
160 struct g2d_buf_desc {
165 unsigned int right_x;
166 unsigned int bottom_y;
170 * A structure of buffer information
172 * @map_nr: manages the number of mapped buffers
173 * @reg_types: stores regitster type in the order of requested command
174 * @handles: stores buffer handle in its reg_type position
175 * @types: stores buffer type in its reg_type position
176 * @descs: stores buffer description in its reg_type position
179 struct g2d_buf_info {
181 enum g2d_reg_type reg_types[MAX_REG_TYPE_NR];
182 unsigned long handles[MAX_REG_TYPE_NR];
183 unsigned int types[MAX_REG_TYPE_NR];
184 struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
187 struct drm_exynos_pending_g2d_event {
188 struct drm_pending_event base;
189 struct drm_exynos_g2d_event event;
192 struct g2d_cmdlist_userptr {
193 struct list_head list;
195 unsigned long userptr;
197 struct frame_vector *vec;
198 struct sg_table *sgt;
203 struct g2d_cmdlist_node {
204 struct list_head list;
205 struct g2d_cmdlist *cmdlist;
207 struct g2d_buf_info buf_info;
209 struct drm_exynos_pending_g2d_event *event;
212 struct g2d_runqueue_node {
213 struct list_head list;
214 struct list_head run_cmdlist;
215 struct list_head event_list;
216 struct drm_file *filp;
218 struct completion complete;
224 struct clk *gate_clk;
227 struct workqueue_struct *g2d_workq;
228 struct work_struct runqueue_work;
229 struct exynos_drm_subdrv subdrv;
233 struct g2d_cmdlist_node *cmdlist_node;
234 struct list_head free_cmdlist;
235 struct mutex cmdlist_mutex;
236 dma_addr_t cmdlist_pool;
237 void *cmdlist_pool_virt;
238 struct dma_attrs cmdlist_dma_attrs;
241 struct g2d_runqueue_node *runqueue_node;
242 struct list_head runqueue;
243 struct mutex runqueue_mutex;
244 struct kmem_cache *runqueue_slab;
246 unsigned long current_pool;
247 unsigned long max_pool;
250 static int g2d_init_cmdlist(struct g2d_data *g2d)
252 struct device *dev = g2d->dev;
253 struct g2d_cmdlist_node *node = g2d->cmdlist_node;
254 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
257 struct g2d_buf_info *buf_info;
259 init_dma_attrs(&g2d->cmdlist_dma_attrs);
260 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
262 g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev,
263 G2D_CMDLIST_POOL_SIZE,
264 &g2d->cmdlist_pool, GFP_KERNEL,
265 &g2d->cmdlist_dma_attrs);
266 if (!g2d->cmdlist_pool_virt) {
267 dev_err(dev, "failed to allocate dma memory\n");
271 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
273 dev_err(dev, "failed to allocate memory\n");
278 for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
282 g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
284 g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
286 buf_info = &node[nr].buf_info;
287 for (i = 0; i < MAX_REG_TYPE_NR; i++)
288 buf_info->reg_types[i] = REG_TYPE_NONE;
290 list_add_tail(&node[nr].list, &g2d->free_cmdlist);
296 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
297 g2d->cmdlist_pool_virt,
298 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
302 static void g2d_fini_cmdlist(struct g2d_data *g2d)
304 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
306 kfree(g2d->cmdlist_node);
308 if (g2d->cmdlist_pool_virt && g2d->cmdlist_pool) {
309 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
310 g2d->cmdlist_pool_virt,
311 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
315 static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
317 struct device *dev = g2d->dev;
318 struct g2d_cmdlist_node *node;
320 mutex_lock(&g2d->cmdlist_mutex);
321 if (list_empty(&g2d->free_cmdlist)) {
322 dev_err(dev, "there is no free cmdlist\n");
323 mutex_unlock(&g2d->cmdlist_mutex);
327 node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
329 list_del_init(&node->list);
330 mutex_unlock(&g2d->cmdlist_mutex);
335 static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
337 mutex_lock(&g2d->cmdlist_mutex);
338 list_move_tail(&node->list, &g2d->free_cmdlist);
339 mutex_unlock(&g2d->cmdlist_mutex);
342 static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
343 struct g2d_cmdlist_node *node)
345 struct g2d_cmdlist_node *lnode;
347 if (list_empty(&g2d_priv->inuse_cmdlist))
350 /* this links to base address of new cmdlist */
351 lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
352 struct g2d_cmdlist_node, list);
353 lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
356 list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
359 list_add_tail(&node->event->base.link, &g2d_priv->event_list);
362 static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
366 struct g2d_cmdlist_userptr *g2d_userptr =
367 (struct g2d_cmdlist_userptr *)obj;
376 atomic_dec(&g2d_userptr->refcount);
378 if (atomic_read(&g2d_userptr->refcount) > 0)
381 if (g2d_userptr->in_pool)
385 exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt,
388 pages = frame_vector_pages(g2d_userptr->vec);
389 if (!IS_ERR(pages)) {
392 for (i = 0; i < frame_vector_count(g2d_userptr->vec); i++)
393 set_page_dirty_lock(pages[i]);
395 put_vaddr_frames(g2d_userptr->vec);
396 frame_vector_destroy(g2d_userptr->vec);
398 if (!g2d_userptr->out_of_list)
399 list_del_init(&g2d_userptr->list);
401 sg_free_table(g2d_userptr->sgt);
402 kfree(g2d_userptr->sgt);
406 static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
407 unsigned long userptr,
409 struct drm_file *filp,
412 struct drm_exynos_file_private *file_priv = filp->driver_priv;
413 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
414 struct g2d_cmdlist_userptr *g2d_userptr;
415 struct g2d_data *g2d;
416 struct sg_table *sgt;
417 unsigned long start, end;
418 unsigned int npages, offset;
422 DRM_ERROR("invalid userptr size.\n");
423 return ERR_PTR(-EINVAL);
426 g2d = dev_get_drvdata(g2d_priv->dev);
428 /* check if userptr already exists in userptr_list. */
429 list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
430 if (g2d_userptr->userptr == userptr) {
432 * also check size because there could be same address
433 * and different size.
435 if (g2d_userptr->size == size) {
436 atomic_inc(&g2d_userptr->refcount);
437 *obj = (unsigned long)g2d_userptr;
439 return &g2d_userptr->dma_addr;
443 * at this moment, maybe g2d dma is accessing this
444 * g2d_userptr memory region so just remove this
445 * g2d_userptr object from userptr_list not to be
446 * referred again and also except it the userptr
447 * pool to be released after the dma access completion.
449 g2d_userptr->out_of_list = true;
450 g2d_userptr->in_pool = false;
451 list_del_init(&g2d_userptr->list);
457 g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
459 return ERR_PTR(-ENOMEM);
461 atomic_set(&g2d_userptr->refcount, 1);
462 g2d_userptr->size = size;
464 start = userptr & PAGE_MASK;
465 offset = userptr & ~PAGE_MASK;
466 end = PAGE_ALIGN(userptr + size);
467 npages = (end - start) >> PAGE_SHIFT;
468 g2d_userptr->vec = frame_vector_create(npages);
469 if (!g2d_userptr->vec) {
474 ret = get_vaddr_frames(start, npages, FOLL_FORCE | FOLL_WRITE,
477 DRM_ERROR("failed to get user pages from userptr.\n");
479 goto err_destroy_framevec;
481 goto err_put_framevec;
483 if (frame_vector_to_pages(g2d_userptr->vec) < 0) {
485 goto err_put_framevec;
488 sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
491 goto err_put_framevec;
494 ret = sg_alloc_table_from_pages(sgt,
495 frame_vector_pages(g2d_userptr->vec),
496 npages, offset, size, GFP_KERNEL);
498 DRM_ERROR("failed to get sgt from pages.\n");
502 g2d_userptr->sgt = sgt;
504 ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt,
507 DRM_ERROR("failed to map sgt with dma region.\n");
508 goto err_sg_free_table;
511 g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
512 g2d_userptr->userptr = userptr;
514 list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
516 if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
517 g2d->current_pool += npages << PAGE_SHIFT;
518 g2d_userptr->in_pool = true;
521 *obj = (unsigned long)g2d_userptr;
523 return &g2d_userptr->dma_addr;
532 put_vaddr_frames(g2d_userptr->vec);
534 err_destroy_framevec:
535 frame_vector_destroy(g2d_userptr->vec);
543 static void g2d_userptr_free_all(struct drm_device *drm_dev,
544 struct g2d_data *g2d,
545 struct drm_file *filp)
547 struct drm_exynos_file_private *file_priv = filp->driver_priv;
548 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
549 struct g2d_cmdlist_userptr *g2d_userptr, *n;
551 list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
552 if (g2d_userptr->in_pool)
553 g2d_userptr_put_dma_addr(drm_dev,
554 (unsigned long)g2d_userptr,
557 g2d->current_pool = 0;
560 static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
562 enum g2d_reg_type reg_type;
564 switch (reg_offset) {
565 case G2D_SRC_BASE_ADDR:
566 case G2D_SRC_STRIDE_REG:
567 case G2D_SRC_COLOR_MODE:
568 case G2D_SRC_LEFT_TOP:
569 case G2D_SRC_RIGHT_BOTTOM:
570 reg_type = REG_TYPE_SRC;
572 case G2D_SRC_PLANE2_BASE_ADDR:
573 reg_type = REG_TYPE_SRC_PLANE2;
575 case G2D_DST_BASE_ADDR:
576 case G2D_DST_STRIDE_REG:
577 case G2D_DST_COLOR_MODE:
578 case G2D_DST_LEFT_TOP:
579 case G2D_DST_RIGHT_BOTTOM:
580 reg_type = REG_TYPE_DST;
582 case G2D_DST_PLANE2_BASE_ADDR:
583 reg_type = REG_TYPE_DST_PLANE2;
585 case G2D_PAT_BASE_ADDR:
586 reg_type = REG_TYPE_PAT;
588 case G2D_MSK_BASE_ADDR:
589 reg_type = REG_TYPE_MSK;
592 reg_type = REG_TYPE_NONE;
593 DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
600 static unsigned long g2d_get_buf_bpp(unsigned int format)
605 case G2D_FMT_XRGB8888:
606 case G2D_FMT_ARGB8888:
610 case G2D_FMT_XRGB1555:
611 case G2D_FMT_ARGB1555:
612 case G2D_FMT_XRGB4444:
613 case G2D_FMT_ARGB4444:
616 case G2D_FMT_PACKED_RGB888:
627 static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
628 enum g2d_reg_type reg_type,
632 unsigned long bpp, last_pos;
635 * check source and destination buffers only.
636 * so the others are always valid.
638 if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
641 /* This check also makes sure that right_x > left_x. */
642 width = (int)buf_desc->right_x - (int)buf_desc->left_x;
643 if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
644 DRM_ERROR("width[%d] is out of range!\n", width);
648 /* This check also makes sure that bottom_y > top_y. */
649 height = (int)buf_desc->bottom_y - (int)buf_desc->top_y;
650 if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
651 DRM_ERROR("height[%d] is out of range!\n", height);
655 bpp = g2d_get_buf_bpp(buf_desc->format);
657 /* Compute the position of the last byte that the engine accesses. */
658 last_pos = ((unsigned long)buf_desc->bottom_y - 1) *
659 (unsigned long)buf_desc->stride +
660 (unsigned long)buf_desc->right_x * bpp - 1;
663 * Since right_x > left_x and bottom_y > top_y we already know
664 * that the first_pos < last_pos (first_pos being the position
665 * of the first byte the engine accesses), it just remains to
666 * check if last_pos is smaller then the buffer size.
669 if (last_pos >= size) {
670 DRM_ERROR("last engine access position [%lu] "
671 "is out of range [%lu]!\n", last_pos, size);
678 static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
679 struct g2d_cmdlist_node *node,
680 struct drm_device *drm_dev,
681 struct drm_file *file)
683 struct g2d_cmdlist *cmdlist = node->cmdlist;
684 struct g2d_buf_info *buf_info = &node->buf_info;
689 for (i = 0; i < buf_info->map_nr; i++) {
690 struct g2d_buf_desc *buf_desc;
691 enum g2d_reg_type reg_type;
693 unsigned long handle;
696 reg_pos = cmdlist->last - 2 * (i + 1);
698 offset = cmdlist->data[reg_pos];
699 handle = cmdlist->data[reg_pos + 1];
701 reg_type = g2d_get_reg_type(offset);
702 if (reg_type == REG_TYPE_NONE) {
707 buf_desc = &buf_info->descs[reg_type];
709 if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
712 size = exynos_drm_gem_get_size(drm_dev, handle, file);
718 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
724 addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
731 struct drm_exynos_g2d_userptr g2d_userptr;
733 if (copy_from_user(&g2d_userptr, (void __user *)handle,
734 sizeof(struct drm_exynos_g2d_userptr))) {
739 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
745 addr = g2d_userptr_get_dma_addr(drm_dev,
756 cmdlist->data[reg_pos + 1] = *addr;
757 buf_info->reg_types[i] = reg_type;
758 buf_info->handles[reg_type] = handle;
764 buf_info->map_nr = i;
768 static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
769 struct g2d_cmdlist_node *node,
770 struct drm_file *filp)
772 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
773 struct g2d_buf_info *buf_info = &node->buf_info;
776 for (i = 0; i < buf_info->map_nr; i++) {
777 struct g2d_buf_desc *buf_desc;
778 enum g2d_reg_type reg_type;
779 unsigned long handle;
781 reg_type = buf_info->reg_types[i];
783 buf_desc = &buf_info->descs[reg_type];
784 handle = buf_info->handles[reg_type];
786 if (buf_info->types[reg_type] == BUF_TYPE_GEM)
787 exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
790 g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
793 buf_info->reg_types[i] = REG_TYPE_NONE;
794 buf_info->handles[reg_type] = 0;
795 buf_info->types[reg_type] = 0;
796 memset(buf_desc, 0x00, sizeof(*buf_desc));
799 buf_info->map_nr = 0;
802 static void g2d_dma_start(struct g2d_data *g2d,
803 struct g2d_runqueue_node *runqueue_node)
805 struct g2d_cmdlist_node *node =
806 list_first_entry(&runqueue_node->run_cmdlist,
807 struct g2d_cmdlist_node, list);
810 ret = pm_runtime_get_sync(g2d->dev);
814 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
815 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
818 static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
820 struct g2d_runqueue_node *runqueue_node;
822 if (list_empty(&g2d->runqueue))
825 runqueue_node = list_first_entry(&g2d->runqueue,
826 struct g2d_runqueue_node, list);
827 list_del_init(&runqueue_node->list);
828 return runqueue_node;
831 static void g2d_free_runqueue_node(struct g2d_data *g2d,
832 struct g2d_runqueue_node *runqueue_node)
834 struct g2d_cmdlist_node *node;
839 mutex_lock(&g2d->cmdlist_mutex);
841 * commands in run_cmdlist have been completed so unmap all gem
842 * objects in each command node so that they are unreferenced.
844 list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
845 g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
846 list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
847 mutex_unlock(&g2d->cmdlist_mutex);
849 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
852 static void g2d_exec_runqueue(struct g2d_data *g2d)
854 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
855 if (g2d->runqueue_node)
856 g2d_dma_start(g2d, g2d->runqueue_node);
859 static void g2d_runqueue_worker(struct work_struct *work)
861 struct g2d_data *g2d = container_of(work, struct g2d_data,
864 mutex_lock(&g2d->runqueue_mutex);
865 pm_runtime_put_sync(g2d->dev);
867 complete(&g2d->runqueue_node->complete);
868 if (g2d->runqueue_node->async)
869 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
872 g2d->runqueue_node = NULL;
874 g2d_exec_runqueue(g2d);
875 mutex_unlock(&g2d->runqueue_mutex);
878 static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
880 struct drm_device *drm_dev = g2d->subdrv.drm_dev;
881 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
882 struct drm_exynos_pending_g2d_event *e;
886 if (list_empty(&runqueue_node->event_list))
889 e = list_first_entry(&runqueue_node->event_list,
890 struct drm_exynos_pending_g2d_event, base.link);
892 do_gettimeofday(&now);
893 e->event.tv_sec = now.tv_sec;
894 e->event.tv_usec = now.tv_usec;
895 e->event.cmdlist_no = cmdlist_no;
897 spin_lock_irqsave(&drm_dev->event_lock, flags);
898 list_move_tail(&e->base.link, &e->base.file_priv->event_list);
899 wake_up_interruptible(&e->base.file_priv->event_wait);
900 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
903 static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
905 struct g2d_data *g2d = dev_id;
908 pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
910 writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
912 if (pending & G2D_INTP_GCMD_FIN) {
913 u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
915 cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
916 G2D_DMA_LIST_DONE_COUNT_OFFSET;
918 g2d_finish_event(g2d, cmdlist_no);
920 writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
921 if (!(pending & G2D_INTP_ACMD_FIN)) {
922 writel_relaxed(G2D_DMA_CONTINUE,
923 g2d->regs + G2D_DMA_COMMAND);
927 if (pending & G2D_INTP_ACMD_FIN)
928 queue_work(g2d->g2d_workq, &g2d->runqueue_work);
933 static int g2d_check_reg_offset(struct device *dev,
934 struct g2d_cmdlist_node *node,
935 int nr, bool for_addr)
937 struct g2d_cmdlist *cmdlist = node->cmdlist;
942 for (i = 0; i < nr; i++) {
943 struct g2d_buf_info *buf_info = &node->buf_info;
944 struct g2d_buf_desc *buf_desc;
945 enum g2d_reg_type reg_type;
948 index = cmdlist->last - 2 * (i + 1);
950 reg_offset = cmdlist->data[index] & ~0xfffff000;
951 if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
956 switch (reg_offset) {
957 case G2D_SRC_BASE_ADDR:
958 case G2D_SRC_PLANE2_BASE_ADDR:
959 case G2D_DST_BASE_ADDR:
960 case G2D_DST_PLANE2_BASE_ADDR:
961 case G2D_PAT_BASE_ADDR:
962 case G2D_MSK_BASE_ADDR:
966 reg_type = g2d_get_reg_type(reg_offset);
968 /* check userptr buffer type. */
969 if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
970 buf_info->types[reg_type] = BUF_TYPE_USERPTR;
971 cmdlist->data[index] &= ~G2D_BUF_USERPTR;
973 buf_info->types[reg_type] = BUF_TYPE_GEM;
975 case G2D_SRC_STRIDE_REG:
976 case G2D_DST_STRIDE_REG:
980 reg_type = g2d_get_reg_type(reg_offset);
982 buf_desc = &buf_info->descs[reg_type];
983 buf_desc->stride = cmdlist->data[index + 1];
985 case G2D_SRC_COLOR_MODE:
986 case G2D_DST_COLOR_MODE:
990 reg_type = g2d_get_reg_type(reg_offset);
992 buf_desc = &buf_info->descs[reg_type];
993 value = cmdlist->data[index + 1];
995 buf_desc->format = value & 0xf;
997 case G2D_SRC_LEFT_TOP:
998 case G2D_DST_LEFT_TOP:
1002 reg_type = g2d_get_reg_type(reg_offset);
1004 buf_desc = &buf_info->descs[reg_type];
1005 value = cmdlist->data[index + 1];
1007 buf_desc->left_x = value & 0x1fff;
1008 buf_desc->top_y = (value & 0x1fff0000) >> 16;
1010 case G2D_SRC_RIGHT_BOTTOM:
1011 case G2D_DST_RIGHT_BOTTOM:
1015 reg_type = g2d_get_reg_type(reg_offset);
1017 buf_desc = &buf_info->descs[reg_type];
1018 value = cmdlist->data[index + 1];
1020 buf_desc->right_x = value & 0x1fff;
1021 buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
1033 dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
1037 /* ioctl functions */
1038 int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1039 struct drm_file *file)
1041 struct drm_exynos_file_private *file_priv = file->driver_priv;
1042 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1044 struct g2d_data *g2d;
1045 struct drm_exynos_g2d_get_ver *ver = data;
1050 dev = g2d_priv->dev;
1054 g2d = dev_get_drvdata(dev);
1058 ver->major = G2D_HW_MAJOR_VER;
1059 ver->minor = G2D_HW_MINOR_VER;
1064 int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1065 struct drm_file *file)
1067 struct drm_exynos_file_private *file_priv = file->driver_priv;
1068 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1070 struct g2d_data *g2d;
1071 struct drm_exynos_g2d_set_cmdlist *req = data;
1072 struct drm_exynos_g2d_cmd *cmd;
1073 struct drm_exynos_pending_g2d_event *e;
1074 struct g2d_cmdlist_node *node;
1075 struct g2d_cmdlist *cmdlist;
1076 unsigned long flags;
1083 dev = g2d_priv->dev;
1087 g2d = dev_get_drvdata(dev);
1091 node = g2d_get_cmdlist(g2d);
1097 if (req->event_type != G2D_EVENT_NOT) {
1098 spin_lock_irqsave(&drm_dev->event_lock, flags);
1099 if (file->event_space < sizeof(e->event)) {
1100 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1104 file->event_space -= sizeof(e->event);
1105 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1107 e = kzalloc(sizeof(*node->event), GFP_KERNEL);
1109 spin_lock_irqsave(&drm_dev->event_lock, flags);
1110 file->event_space += sizeof(e->event);
1111 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1117 e->event.base.type = DRM_EXYNOS_G2D_EVENT;
1118 e->event.base.length = sizeof(e->event);
1119 e->event.user_data = req->user_data;
1120 e->base.event = &e->event.base;
1121 e->base.file_priv = file;
1122 e->base.destroy = (void (*) (struct drm_pending_event *)) kfree;
1127 cmdlist = node->cmdlist;
1132 * If don't clear SFR registers, the cmdlist is affected by register
1133 * values of previous cmdlist. G2D hw executes SFR clear command and
1134 * a next command at the same time then the next command is ignored and
1135 * is executed rightly from next next command, so needs a dummy command
1136 * to next command of SFR clear command.
1138 cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
1139 cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
1140 cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
1141 cmdlist->data[cmdlist->last++] = 0;
1144 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1145 * and GCF bit should be set to INTEN register if user wants
1146 * G2D interrupt event once current command list execution is
1148 * Otherwise only ACF bit should be set to INTEN register so
1149 * that one interrupt is occurred after all command lists
1150 * have been completed.
1153 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1154 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
1155 cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
1156 cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
1158 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1159 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
1162 /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
1163 size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
1164 if (size > G2D_CMDLIST_DATA_NUM) {
1165 dev_err(dev, "cmdlist size is too big\n");
1167 goto err_free_event;
1170 cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd;
1172 if (copy_from_user(cmdlist->data + cmdlist->last,
1174 sizeof(*cmd) * req->cmd_nr)) {
1176 goto err_free_event;
1178 cmdlist->last += req->cmd_nr * 2;
1180 ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
1182 goto err_free_event;
1184 node->buf_info.map_nr = req->cmd_buf_nr;
1185 if (req->cmd_buf_nr) {
1186 struct drm_exynos_g2d_cmd *cmd_buf;
1188 cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf;
1190 if (copy_from_user(cmdlist->data + cmdlist->last,
1191 (void __user *)cmd_buf,
1192 sizeof(*cmd_buf) * req->cmd_buf_nr)) {
1194 goto err_free_event;
1196 cmdlist->last += req->cmd_buf_nr * 2;
1198 ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
1200 goto err_free_event;
1202 ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
1207 cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
1208 cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
1211 cmdlist->head = cmdlist->last / 2;
1214 cmdlist->data[cmdlist->last] = 0;
1216 g2d_add_cmdlist_to_inuse(g2d_priv, node);
1221 g2d_unmap_cmdlist_gem(g2d, node, file);
1224 spin_lock_irqsave(&drm_dev->event_lock, flags);
1225 file->event_space += sizeof(e->event);
1226 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
1230 g2d_put_cmdlist(g2d, node);
1234 int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1235 struct drm_file *file)
1237 struct drm_exynos_file_private *file_priv = file->driver_priv;
1238 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1240 struct g2d_data *g2d;
1241 struct drm_exynos_g2d_exec *req = data;
1242 struct g2d_runqueue_node *runqueue_node;
1243 struct list_head *run_cmdlist;
1244 struct list_head *event_list;
1249 dev = g2d_priv->dev;
1253 g2d = dev_get_drvdata(dev);
1257 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
1258 if (!runqueue_node) {
1259 dev_err(dev, "failed to allocate memory\n");
1262 run_cmdlist = &runqueue_node->run_cmdlist;
1263 event_list = &runqueue_node->event_list;
1264 INIT_LIST_HEAD(run_cmdlist);
1265 INIT_LIST_HEAD(event_list);
1266 init_completion(&runqueue_node->complete);
1267 runqueue_node->async = req->async;
1269 list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
1270 list_splice_init(&g2d_priv->event_list, event_list);
1272 if (list_empty(run_cmdlist)) {
1273 dev_err(dev, "there is no inuse cmdlist\n");
1274 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
1278 mutex_lock(&g2d->runqueue_mutex);
1279 runqueue_node->pid = current->pid;
1280 runqueue_node->filp = file;
1281 list_add_tail(&runqueue_node->list, &g2d->runqueue);
1282 if (!g2d->runqueue_node)
1283 g2d_exec_runqueue(g2d);
1284 mutex_unlock(&g2d->runqueue_mutex);
1286 if (runqueue_node->async)
1289 wait_for_completion(&runqueue_node->complete);
1290 g2d_free_runqueue_node(g2d, runqueue_node);
1296 static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1298 struct g2d_data *g2d;
1301 g2d = dev_get_drvdata(dev);
1305 /* allocate dma-aware cmdlist buffer. */
1306 ret = g2d_init_cmdlist(g2d);
1308 dev_err(dev, "cmdlist init failed\n");
1312 ret = drm_iommu_attach_device(drm_dev, dev);
1314 dev_err(dev, "failed to enable iommu.\n");
1315 g2d_fini_cmdlist(g2d);
1322 static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
1324 drm_iommu_detach_device(drm_dev, dev);
1327 static int g2d_open(struct drm_device *drm_dev, struct device *dev,
1328 struct drm_file *file)
1330 struct drm_exynos_file_private *file_priv = file->driver_priv;
1331 struct exynos_drm_g2d_private *g2d_priv;
1333 g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
1337 g2d_priv->dev = dev;
1338 file_priv->g2d_priv = g2d_priv;
1340 INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
1341 INIT_LIST_HEAD(&g2d_priv->event_list);
1342 INIT_LIST_HEAD(&g2d_priv->userptr_list);
1347 static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1348 struct drm_file *file)
1350 struct drm_exynos_file_private *file_priv = file->driver_priv;
1351 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1352 struct g2d_data *g2d;
1353 struct g2d_cmdlist_node *node, *n;
1358 g2d = dev_get_drvdata(dev);
1362 mutex_lock(&g2d->cmdlist_mutex);
1363 list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
1365 * unmap all gem objects not completed.
1367 * P.S. if current process was terminated forcely then
1368 * there may be some commands in inuse_cmdlist so unmap
1371 g2d_unmap_cmdlist_gem(g2d, node, file);
1372 list_move_tail(&node->list, &g2d->free_cmdlist);
1374 mutex_unlock(&g2d->cmdlist_mutex);
1376 /* release all g2d_userptr in pool. */
1377 g2d_userptr_free_all(drm_dev, g2d, file);
1379 kfree(file_priv->g2d_priv);
1382 static int g2d_probe(struct platform_device *pdev)
1384 struct device *dev = &pdev->dev;
1385 struct resource *res;
1386 struct g2d_data *g2d;
1387 struct exynos_drm_subdrv *subdrv;
1390 g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL);
1394 g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1395 sizeof(struct g2d_runqueue_node), 0, 0, NULL);
1396 if (!g2d->runqueue_slab)
1401 g2d->g2d_workq = create_singlethread_workqueue("g2d");
1402 if (!g2d->g2d_workq) {
1403 dev_err(dev, "failed to create workqueue\n");
1405 goto err_destroy_slab;
1408 INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1409 INIT_LIST_HEAD(&g2d->free_cmdlist);
1410 INIT_LIST_HEAD(&g2d->runqueue);
1412 mutex_init(&g2d->cmdlist_mutex);
1413 mutex_init(&g2d->runqueue_mutex);
1415 g2d->gate_clk = devm_clk_get(dev, "fimg2d");
1416 if (IS_ERR(g2d->gate_clk)) {
1417 dev_err(dev, "failed to get gate clock\n");
1418 ret = PTR_ERR(g2d->gate_clk);
1419 goto err_destroy_workqueue;
1422 pm_runtime_enable(dev);
1424 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1426 g2d->regs = devm_ioremap_resource(dev, res);
1427 if (IS_ERR(g2d->regs)) {
1428 ret = PTR_ERR(g2d->regs);
1432 g2d->irq = platform_get_irq(pdev, 0);
1434 dev_err(dev, "failed to get irq\n");
1439 ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0,
1442 dev_err(dev, "irq request failed\n");
1446 g2d->max_pool = MAX_POOL;
1448 platform_set_drvdata(pdev, g2d);
1450 subdrv = &g2d->subdrv;
1452 subdrv->probe = g2d_subdrv_probe;
1453 subdrv->remove = g2d_subdrv_remove;
1454 subdrv->open = g2d_open;
1455 subdrv->close = g2d_close;
1457 ret = exynos_drm_subdrv_register(subdrv);
1459 dev_err(dev, "failed to register drm g2d device\n");
1463 dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
1464 G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1469 pm_runtime_disable(dev);
1470 err_destroy_workqueue:
1471 destroy_workqueue(g2d->g2d_workq);
1473 kmem_cache_destroy(g2d->runqueue_slab);
1477 static int g2d_remove(struct platform_device *pdev)
1479 struct g2d_data *g2d = platform_get_drvdata(pdev);
1481 cancel_work_sync(&g2d->runqueue_work);
1482 exynos_drm_subdrv_unregister(&g2d->subdrv);
1484 while (g2d->runqueue_node) {
1485 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
1486 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
1489 pm_runtime_disable(&pdev->dev);
1491 g2d_fini_cmdlist(g2d);
1492 destroy_workqueue(g2d->g2d_workq);
1493 kmem_cache_destroy(g2d->runqueue_slab);
1498 #ifdef CONFIG_PM_SLEEP
1499 static int g2d_suspend(struct device *dev)
1501 struct g2d_data *g2d = dev_get_drvdata(dev);
1503 mutex_lock(&g2d->runqueue_mutex);
1504 g2d->suspended = true;
1505 mutex_unlock(&g2d->runqueue_mutex);
1507 while (g2d->runqueue_node)
1508 /* FIXME: good range? */
1509 usleep_range(500, 1000);
1511 flush_work(&g2d->runqueue_work);
1516 static int g2d_resume(struct device *dev)
1518 struct g2d_data *g2d = dev_get_drvdata(dev);
1520 g2d->suspended = false;
1521 g2d_exec_runqueue(g2d);
1528 static int g2d_runtime_suspend(struct device *dev)
1530 struct g2d_data *g2d = dev_get_drvdata(dev);
1532 clk_disable_unprepare(g2d->gate_clk);
1537 static int g2d_runtime_resume(struct device *dev)
1539 struct g2d_data *g2d = dev_get_drvdata(dev);
1542 ret = clk_prepare_enable(g2d->gate_clk);
1544 dev_warn(dev, "failed to enable clock.\n");
1550 static const struct dev_pm_ops g2d_pm_ops = {
1551 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume)
1552 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1555 static const struct of_device_id exynos_g2d_match[] = {
1556 { .compatible = "samsung,exynos5250-g2d" },
1557 { .compatible = "samsung,exynos4212-g2d" },
1560 MODULE_DEVICE_TABLE(of, exynos_g2d_match);
1562 struct platform_driver g2d_driver = {
1564 .remove = g2d_remove,
1567 .owner = THIS_MODULE,
1569 .of_match_table = exynos_g2d_match,