2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
35 #include <linux/vga_switcheroo.h>
37 #include <drm/drm_edid.h>
38 #include <drm/drm_displayid.h>
40 #define version_greater(edid, maj, min) \
41 (((edid)->version > (maj)) || \
42 ((edid)->version == (maj) && (edid)->revision > (min)))
44 #define EDID_EST_TIMINGS 16
45 #define EDID_STD_TIMINGS 8
46 #define EDID_DETAILED_TIMINGS 4
49 * EDID blocks out in the wild have a variety of bugs, try to collect
50 * them here (note that userspace may work around broken monitors first,
51 * but fixes should make their way here so that the kernel "just works"
52 * on as many displays as possible).
55 /* First detailed mode wrong, use largest 60Hz mode */
56 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
57 /* Reported 135MHz pixel clock is too high, needs adjustment */
58 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
59 /* Prefer the largest mode at 75 Hz */
60 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
61 /* Detail timing is in cm not mm */
62 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
63 /* Detailed timing descriptors have bogus size values, so just take the
64 * maximum size and use that.
66 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
67 /* Monitor forgot to set the first detailed is preferred bit. */
68 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
69 /* use +hsync +vsync for detailed mode */
70 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
71 /* Force reduced-blanking timings for detailed modes */
72 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
74 #define EDID_QUIRK_FORCE_8BPC (1 << 8)
76 #define EDID_QUIRK_FORCE_12BPC (1 << 9)
78 #define EDID_QUIRK_FORCE_6BPC (1 << 10)
80 #define EDID_QUIRK_FORCE_10BPC (1 << 11)
82 struct detailed_mode_closure {
83 struct drm_connector *connector;
95 static const struct edid_quirk {
99 } edid_quirk_list[] = {
101 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
103 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
105 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
107 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
108 { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
110 /* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */
111 { "BOE", 0x78b, EDID_QUIRK_FORCE_6BPC },
113 /* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */
114 { "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC },
116 /* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
117 { "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
119 /* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
120 { "BOE", 0x0771, EDID_QUIRK_FORCE_6BPC },
122 /* Belinea 10 15 55 */
123 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
124 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
126 /* Envision Peripherals, Inc. EN-7100e */
127 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
128 /* Envision EN2028 */
129 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
131 /* Funai Electronics PM36B */
132 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
133 EDID_QUIRK_DETAILED_IN_CM },
135 /* LGD panel of HP zBook 17 G2, eDP 10 bpc, but reports unknown bpc */
136 { "LGD", 764, EDID_QUIRK_FORCE_10BPC },
138 /* LG Philips LCD LP154W01-A5 */
139 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
140 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
142 /* Philips 107p5 CRT */
143 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
146 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
148 /* Samsung SyncMaster 205BW. Note: irony */
149 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
150 /* Samsung SyncMaster 22[5-6]BW */
151 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
152 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
154 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
155 { "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
157 /* ViewSonic VA2026w */
158 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
160 /* Medion MD 30217 PG */
161 { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
164 { "SDC", 18514, EDID_QUIRK_FORCE_6BPC },
166 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
167 { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
169 /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
170 { "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
174 * Autogenerated from the DMT spec.
175 * This table is copied from xfree86/modes/xf86EdidModes.c.
177 static const struct drm_display_mode drm_dmt_modes[] = {
178 /* 0x01 - 640x350@85Hz */
179 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
180 736, 832, 0, 350, 382, 385, 445, 0,
181 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
182 /* 0x02 - 640x400@85Hz */
183 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
184 736, 832, 0, 400, 401, 404, 445, 0,
185 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
186 /* 0x03 - 720x400@85Hz */
187 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
188 828, 936, 0, 400, 401, 404, 446, 0,
189 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
190 /* 0x04 - 640x480@60Hz */
191 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
192 752, 800, 0, 480, 490, 492, 525, 0,
193 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
194 /* 0x05 - 640x480@72Hz */
195 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
196 704, 832, 0, 480, 489, 492, 520, 0,
197 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
198 /* 0x06 - 640x480@75Hz */
199 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
200 720, 840, 0, 480, 481, 484, 500, 0,
201 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
202 /* 0x07 - 640x480@85Hz */
203 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
204 752, 832, 0, 480, 481, 484, 509, 0,
205 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
206 /* 0x08 - 800x600@56Hz */
207 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
208 896, 1024, 0, 600, 601, 603, 625, 0,
209 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
210 /* 0x09 - 800x600@60Hz */
211 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
212 968, 1056, 0, 600, 601, 605, 628, 0,
213 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
214 /* 0x0a - 800x600@72Hz */
215 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
216 976, 1040, 0, 600, 637, 643, 666, 0,
217 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
218 /* 0x0b - 800x600@75Hz */
219 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
220 896, 1056, 0, 600, 601, 604, 625, 0,
221 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
222 /* 0x0c - 800x600@85Hz */
223 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
224 896, 1048, 0, 600, 601, 604, 631, 0,
225 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
226 /* 0x0d - 800x600@120Hz RB */
227 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
228 880, 960, 0, 600, 603, 607, 636, 0,
229 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
230 /* 0x0e - 848x480@60Hz */
231 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
232 976, 1088, 0, 480, 486, 494, 517, 0,
233 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
234 /* 0x0f - 1024x768@43Hz, interlace */
235 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
236 1208, 1264, 0, 768, 768, 776, 817, 0,
237 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
238 DRM_MODE_FLAG_INTERLACE) },
239 /* 0x10 - 1024x768@60Hz */
240 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
241 1184, 1344, 0, 768, 771, 777, 806, 0,
242 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
243 /* 0x11 - 1024x768@70Hz */
244 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
245 1184, 1328, 0, 768, 771, 777, 806, 0,
246 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
247 /* 0x12 - 1024x768@75Hz */
248 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
249 1136, 1312, 0, 768, 769, 772, 800, 0,
250 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
251 /* 0x13 - 1024x768@85Hz */
252 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
253 1168, 1376, 0, 768, 769, 772, 808, 0,
254 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
255 /* 0x14 - 1024x768@120Hz RB */
256 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
257 1104, 1184, 0, 768, 771, 775, 813, 0,
258 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
259 /* 0x15 - 1152x864@75Hz */
260 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
261 1344, 1600, 0, 864, 865, 868, 900, 0,
262 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
263 /* 0x55 - 1280x720@60Hz */
264 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
265 1430, 1650, 0, 720, 725, 730, 750, 0,
266 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
267 /* 0x16 - 1280x768@60Hz RB */
268 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
269 1360, 1440, 0, 768, 771, 778, 790, 0,
270 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
271 /* 0x17 - 1280x768@60Hz */
272 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
273 1472, 1664, 0, 768, 771, 778, 798, 0,
274 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
275 /* 0x18 - 1280x768@75Hz */
276 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
277 1488, 1696, 0, 768, 771, 778, 805, 0,
278 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
279 /* 0x19 - 1280x768@85Hz */
280 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
281 1496, 1712, 0, 768, 771, 778, 809, 0,
282 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
283 /* 0x1a - 1280x768@120Hz RB */
284 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
285 1360, 1440, 0, 768, 771, 778, 813, 0,
286 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
287 /* 0x1b - 1280x800@60Hz RB */
288 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
289 1360, 1440, 0, 800, 803, 809, 823, 0,
290 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
291 /* 0x1c - 1280x800@60Hz */
292 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
293 1480, 1680, 0, 800, 803, 809, 831, 0,
294 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
295 /* 0x1d - 1280x800@75Hz */
296 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
297 1488, 1696, 0, 800, 803, 809, 838, 0,
298 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
299 /* 0x1e - 1280x800@85Hz */
300 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
301 1496, 1712, 0, 800, 803, 809, 843, 0,
302 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
303 /* 0x1f - 1280x800@120Hz RB */
304 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
305 1360, 1440, 0, 800, 803, 809, 847, 0,
306 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
307 /* 0x20 - 1280x960@60Hz */
308 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
309 1488, 1800, 0, 960, 961, 964, 1000, 0,
310 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
311 /* 0x21 - 1280x960@85Hz */
312 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
313 1504, 1728, 0, 960, 961, 964, 1011, 0,
314 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
315 /* 0x22 - 1280x960@120Hz RB */
316 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
317 1360, 1440, 0, 960, 963, 967, 1017, 0,
318 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
319 /* 0x23 - 1280x1024@60Hz */
320 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
321 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
323 /* 0x24 - 1280x1024@75Hz */
324 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
325 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
326 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
327 /* 0x25 - 1280x1024@85Hz */
328 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
329 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
330 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
331 /* 0x26 - 1280x1024@120Hz RB */
332 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
333 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
334 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
335 /* 0x27 - 1360x768@60Hz */
336 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
337 1536, 1792, 0, 768, 771, 777, 795, 0,
338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
339 /* 0x28 - 1360x768@120Hz RB */
340 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
341 1440, 1520, 0, 768, 771, 776, 813, 0,
342 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
343 /* 0x51 - 1366x768@60Hz */
344 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
345 1579, 1792, 0, 768, 771, 774, 798, 0,
346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
347 /* 0x56 - 1366x768@60Hz */
348 { DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
349 1436, 1500, 0, 768, 769, 772, 800, 0,
350 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
351 /* 0x29 - 1400x1050@60Hz RB */
352 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
353 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
354 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
355 /* 0x2a - 1400x1050@60Hz */
356 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
357 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
358 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
359 /* 0x2b - 1400x1050@75Hz */
360 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
361 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
362 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
363 /* 0x2c - 1400x1050@85Hz */
364 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
365 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
366 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
367 /* 0x2d - 1400x1050@120Hz RB */
368 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
369 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
370 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
371 /* 0x2e - 1440x900@60Hz RB */
372 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
373 1520, 1600, 0, 900, 903, 909, 926, 0,
374 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
375 /* 0x2f - 1440x900@60Hz */
376 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
377 1672, 1904, 0, 900, 903, 909, 934, 0,
378 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
379 /* 0x30 - 1440x900@75Hz */
380 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
381 1688, 1936, 0, 900, 903, 909, 942, 0,
382 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
383 /* 0x31 - 1440x900@85Hz */
384 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
385 1696, 1952, 0, 900, 903, 909, 948, 0,
386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
387 /* 0x32 - 1440x900@120Hz RB */
388 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
389 1520, 1600, 0, 900, 903, 909, 953, 0,
390 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
391 /* 0x53 - 1600x900@60Hz */
392 { DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
393 1704, 1800, 0, 900, 901, 904, 1000, 0,
394 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
395 /* 0x33 - 1600x1200@60Hz */
396 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
397 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
398 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
399 /* 0x34 - 1600x1200@65Hz */
400 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
401 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
402 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
403 /* 0x35 - 1600x1200@70Hz */
404 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
405 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
406 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
407 /* 0x36 - 1600x1200@75Hz */
408 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
409 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
411 /* 0x37 - 1600x1200@85Hz */
412 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
413 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
414 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
415 /* 0x38 - 1600x1200@120Hz RB */
416 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
417 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
418 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
419 /* 0x39 - 1680x1050@60Hz RB */
420 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
421 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
422 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
423 /* 0x3a - 1680x1050@60Hz */
424 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
425 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
426 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
427 /* 0x3b - 1680x1050@75Hz */
428 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
429 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
431 /* 0x3c - 1680x1050@85Hz */
432 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
433 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
435 /* 0x3d - 1680x1050@120Hz RB */
436 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
437 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
439 /* 0x3e - 1792x1344@60Hz */
440 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
441 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
442 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
443 /* 0x3f - 1792x1344@75Hz */
444 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
445 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
447 /* 0x40 - 1792x1344@120Hz RB */
448 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
449 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
450 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
451 /* 0x41 - 1856x1392@60Hz */
452 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
453 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
455 /* 0x42 - 1856x1392@75Hz */
456 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
457 2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
458 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
459 /* 0x43 - 1856x1392@120Hz RB */
460 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
461 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
462 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
463 /* 0x52 - 1920x1080@60Hz */
464 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
465 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
466 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
467 /* 0x44 - 1920x1200@60Hz RB */
468 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
469 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
471 /* 0x45 - 1920x1200@60Hz */
472 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
473 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
474 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
475 /* 0x46 - 1920x1200@75Hz */
476 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
477 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
478 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
479 /* 0x47 - 1920x1200@85Hz */
480 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
481 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
483 /* 0x48 - 1920x1200@120Hz RB */
484 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
485 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
486 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
487 /* 0x49 - 1920x1440@60Hz */
488 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
489 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
490 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
491 /* 0x4a - 1920x1440@75Hz */
492 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
493 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
495 /* 0x4b - 1920x1440@120Hz RB */
496 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
497 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
498 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
499 /* 0x54 - 2048x1152@60Hz */
500 { DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
501 2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
503 /* 0x4c - 2560x1600@60Hz RB */
504 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
505 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
507 /* 0x4d - 2560x1600@60Hz */
508 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
509 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
510 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
511 /* 0x4e - 2560x1600@75Hz */
512 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
513 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
514 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
515 /* 0x4f - 2560x1600@85Hz */
516 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
517 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
518 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
519 /* 0x50 - 2560x1600@120Hz RB */
520 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
521 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
522 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
523 /* 0x57 - 4096x2160@60Hz RB */
524 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
525 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
527 /* 0x58 - 4096x2160@59.94Hz RB */
528 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
529 4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
534 * These more or less come from the DMT spec. The 720x400 modes are
535 * inferred from historical 80x25 practice. The 640x480@67 and 832x624@75
536 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
537 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
540 * The DMT modes have been fact-checked; the rest are mild guesses.
542 static const struct drm_display_mode edid_est_modes[] = {
543 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
544 968, 1056, 0, 600, 601, 605, 628, 0,
545 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
546 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
547 896, 1024, 0, 600, 601, 603, 625, 0,
548 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
549 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
550 720, 840, 0, 480, 481, 484, 500, 0,
551 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
552 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
553 704, 832, 0, 480, 489, 492, 520, 0,
554 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
555 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
556 768, 864, 0, 480, 483, 486, 525, 0,
557 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
558 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
559 752, 800, 0, 480, 490, 492, 525, 0,
560 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
561 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
562 846, 900, 0, 400, 421, 423, 449, 0,
563 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
564 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
565 846, 900, 0, 400, 412, 414, 449, 0,
566 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
567 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
568 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
569 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
570 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
571 1136, 1312, 0, 768, 769, 772, 800, 0,
572 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
573 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
574 1184, 1328, 0, 768, 771, 777, 806, 0,
575 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
576 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
577 1184, 1344, 0, 768, 771, 777, 806, 0,
578 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
579 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
580 1208, 1264, 0, 768, 768, 776, 817, 0,
581 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
582 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
583 928, 1152, 0, 624, 625, 628, 667, 0,
584 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
585 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
586 896, 1056, 0, 600, 601, 604, 625, 0,
587 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
588 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
589 976, 1040, 0, 600, 637, 643, 666, 0,
590 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
591 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
592 1344, 1600, 0, 864, 865, 868, 900, 0,
593 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
603 static const struct minimode est3_modes[] = {
611 { 1024, 768, 85, 0 },
612 { 1152, 864, 75, 0 },
614 { 1280, 768, 60, 1 },
615 { 1280, 768, 60, 0 },
616 { 1280, 768, 75, 0 },
617 { 1280, 768, 85, 0 },
618 { 1280, 960, 60, 0 },
619 { 1280, 960, 85, 0 },
620 { 1280, 1024, 60, 0 },
621 { 1280, 1024, 85, 0 },
623 { 1360, 768, 60, 0 },
624 { 1440, 900, 60, 1 },
625 { 1440, 900, 60, 0 },
626 { 1440, 900, 75, 0 },
627 { 1440, 900, 85, 0 },
628 { 1400, 1050, 60, 1 },
629 { 1400, 1050, 60, 0 },
630 { 1400, 1050, 75, 0 },
632 { 1400, 1050, 85, 0 },
633 { 1680, 1050, 60, 1 },
634 { 1680, 1050, 60, 0 },
635 { 1680, 1050, 75, 0 },
636 { 1680, 1050, 85, 0 },
637 { 1600, 1200, 60, 0 },
638 { 1600, 1200, 65, 0 },
639 { 1600, 1200, 70, 0 },
641 { 1600, 1200, 75, 0 },
642 { 1600, 1200, 85, 0 },
643 { 1792, 1344, 60, 0 },
644 { 1792, 1344, 75, 0 },
645 { 1856, 1392, 60, 0 },
646 { 1856, 1392, 75, 0 },
647 { 1920, 1200, 60, 1 },
648 { 1920, 1200, 60, 0 },
650 { 1920, 1200, 75, 0 },
651 { 1920, 1200, 85, 0 },
652 { 1920, 1440, 60, 0 },
653 { 1920, 1440, 75, 0 },
656 static const struct minimode extra_modes[] = {
657 { 1024, 576, 60, 0 },
658 { 1366, 768, 60, 0 },
659 { 1600, 900, 60, 0 },
660 { 1680, 945, 60, 0 },
661 { 1920, 1080, 60, 0 },
662 { 2048, 1152, 60, 0 },
663 { 2048, 1536, 60, 0 },
667 * Probably taken from CEA-861 spec.
668 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
670 * Index using the VIC.
672 static const struct drm_display_mode edid_cea_modes[] = {
673 /* 0 - dummy, VICs start at 1 */
675 /* 1 - 640x480@60Hz */
676 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
677 752, 800, 0, 480, 490, 492, 525, 0,
678 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
679 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
680 /* 2 - 720x480@60Hz */
681 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
682 798, 858, 0, 480, 489, 495, 525, 0,
683 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
684 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
685 /* 3 - 720x480@60Hz */
686 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
687 798, 858, 0, 480, 489, 495, 525, 0,
688 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
689 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
690 /* 4 - 1280x720@60Hz */
691 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
692 1430, 1650, 0, 720, 725, 730, 750, 0,
693 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
694 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
695 /* 5 - 1920x1080i@60Hz */
696 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
697 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
698 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
699 DRM_MODE_FLAG_INTERLACE),
700 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
701 /* 6 - 720(1440)x480i@60Hz */
702 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
703 801, 858, 0, 480, 488, 494, 525, 0,
704 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
705 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
706 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
707 /* 7 - 720(1440)x480i@60Hz */
708 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
709 801, 858, 0, 480, 488, 494, 525, 0,
710 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
711 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
712 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
713 /* 8 - 720(1440)x240@60Hz */
714 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
715 801, 858, 0, 240, 244, 247, 262, 0,
716 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
717 DRM_MODE_FLAG_DBLCLK),
718 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
719 /* 9 - 720(1440)x240@60Hz */
720 { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
721 801, 858, 0, 240, 244, 247, 262, 0,
722 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
723 DRM_MODE_FLAG_DBLCLK),
724 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
725 /* 10 - 2880x480i@60Hz */
726 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
727 3204, 3432, 0, 480, 488, 494, 525, 0,
728 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
729 DRM_MODE_FLAG_INTERLACE),
730 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
731 /* 11 - 2880x480i@60Hz */
732 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
733 3204, 3432, 0, 480, 488, 494, 525, 0,
734 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
735 DRM_MODE_FLAG_INTERLACE),
736 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
737 /* 12 - 2880x240@60Hz */
738 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
739 3204, 3432, 0, 240, 244, 247, 262, 0,
740 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
741 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
742 /* 13 - 2880x240@60Hz */
743 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
744 3204, 3432, 0, 240, 244, 247, 262, 0,
745 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
746 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
747 /* 14 - 1440x480@60Hz */
748 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
749 1596, 1716, 0, 480, 489, 495, 525, 0,
750 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
751 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
752 /* 15 - 1440x480@60Hz */
753 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
754 1596, 1716, 0, 480, 489, 495, 525, 0,
755 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
756 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
757 /* 16 - 1920x1080@60Hz */
758 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
759 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
760 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
761 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
762 /* 17 - 720x576@50Hz */
763 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
764 796, 864, 0, 576, 581, 586, 625, 0,
765 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
766 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
767 /* 18 - 720x576@50Hz */
768 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
769 796, 864, 0, 576, 581, 586, 625, 0,
770 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
771 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
772 /* 19 - 1280x720@50Hz */
773 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
774 1760, 1980, 0, 720, 725, 730, 750, 0,
775 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
776 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
777 /* 20 - 1920x1080i@50Hz */
778 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
779 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
780 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
781 DRM_MODE_FLAG_INTERLACE),
782 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
783 /* 21 - 720(1440)x576i@50Hz */
784 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
785 795, 864, 0, 576, 580, 586, 625, 0,
786 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
787 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
788 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
789 /* 22 - 720(1440)x576i@50Hz */
790 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
791 795, 864, 0, 576, 580, 586, 625, 0,
792 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
793 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
794 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
795 /* 23 - 720(1440)x288@50Hz */
796 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
797 795, 864, 0, 288, 290, 293, 312, 0,
798 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
799 DRM_MODE_FLAG_DBLCLK),
800 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
801 /* 24 - 720(1440)x288@50Hz */
802 { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
803 795, 864, 0, 288, 290, 293, 312, 0,
804 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
805 DRM_MODE_FLAG_DBLCLK),
806 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
807 /* 25 - 2880x576i@50Hz */
808 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
809 3180, 3456, 0, 576, 580, 586, 625, 0,
810 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
811 DRM_MODE_FLAG_INTERLACE),
812 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
813 /* 26 - 2880x576i@50Hz */
814 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
815 3180, 3456, 0, 576, 580, 586, 625, 0,
816 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
817 DRM_MODE_FLAG_INTERLACE),
818 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
819 /* 27 - 2880x288@50Hz */
820 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
821 3180, 3456, 0, 288, 290, 293, 312, 0,
822 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
823 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
824 /* 28 - 2880x288@50Hz */
825 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
826 3180, 3456, 0, 288, 290, 293, 312, 0,
827 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
828 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
829 /* 29 - 1440x576@50Hz */
830 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
831 1592, 1728, 0, 576, 581, 586, 625, 0,
832 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
833 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
834 /* 30 - 1440x576@50Hz */
835 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
836 1592, 1728, 0, 576, 581, 586, 625, 0,
837 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
838 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
839 /* 31 - 1920x1080@50Hz */
840 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
841 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
842 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
843 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
844 /* 32 - 1920x1080@24Hz */
845 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
846 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
847 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
848 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
849 /* 33 - 1920x1080@25Hz */
850 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
851 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
852 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
853 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
854 /* 34 - 1920x1080@30Hz */
855 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
856 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
857 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
858 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
859 /* 35 - 2880x480@60Hz */
860 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
861 3192, 3432, 0, 480, 489, 495, 525, 0,
862 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
863 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
864 /* 36 - 2880x480@60Hz */
865 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
866 3192, 3432, 0, 480, 489, 495, 525, 0,
867 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
868 .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
869 /* 37 - 2880x576@50Hz */
870 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
871 3184, 3456, 0, 576, 581, 586, 625, 0,
872 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
873 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
874 /* 38 - 2880x576@50Hz */
875 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
876 3184, 3456, 0, 576, 581, 586, 625, 0,
877 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
878 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
879 /* 39 - 1920x1080i@50Hz */
880 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
881 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
882 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
883 DRM_MODE_FLAG_INTERLACE),
884 .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
885 /* 40 - 1920x1080i@100Hz */
886 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
887 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
888 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
889 DRM_MODE_FLAG_INTERLACE),
890 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
891 /* 41 - 1280x720@100Hz */
892 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
893 1760, 1980, 0, 720, 725, 730, 750, 0,
894 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
895 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
896 /* 42 - 720x576@100Hz */
897 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
898 796, 864, 0, 576, 581, 586, 625, 0,
899 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
900 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
901 /* 43 - 720x576@100Hz */
902 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
903 796, 864, 0, 576, 581, 586, 625, 0,
904 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
905 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
906 /* 44 - 720(1440)x576i@100Hz */
907 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
908 795, 864, 0, 576, 580, 586, 625, 0,
909 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
910 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
911 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
912 /* 45 - 720(1440)x576i@100Hz */
913 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
914 795, 864, 0, 576, 580, 586, 625, 0,
915 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
916 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
917 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
918 /* 46 - 1920x1080i@120Hz */
919 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
920 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
921 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
922 DRM_MODE_FLAG_INTERLACE),
923 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
924 /* 47 - 1280x720@120Hz */
925 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
926 1430, 1650, 0, 720, 725, 730, 750, 0,
927 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
928 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
929 /* 48 - 720x480@120Hz */
930 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
931 798, 858, 0, 480, 489, 495, 525, 0,
932 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
933 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
934 /* 49 - 720x480@120Hz */
935 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
936 798, 858, 0, 480, 489, 495, 525, 0,
937 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
938 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
939 /* 50 - 720(1440)x480i@120Hz */
940 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
941 801, 858, 0, 480, 488, 494, 525, 0,
942 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
943 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
944 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
945 /* 51 - 720(1440)x480i@120Hz */
946 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
947 801, 858, 0, 480, 488, 494, 525, 0,
948 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
949 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
950 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
951 /* 52 - 720x576@200Hz */
952 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
953 796, 864, 0, 576, 581, 586, 625, 0,
954 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
955 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
956 /* 53 - 720x576@200Hz */
957 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
958 796, 864, 0, 576, 581, 586, 625, 0,
959 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
960 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
961 /* 54 - 720(1440)x576i@200Hz */
962 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
963 795, 864, 0, 576, 580, 586, 625, 0,
964 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
965 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
966 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
967 /* 55 - 720(1440)x576i@200Hz */
968 { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
969 795, 864, 0, 576, 580, 586, 625, 0,
970 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
971 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
972 .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
973 /* 56 - 720x480@240Hz */
974 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
975 798, 858, 0, 480, 489, 495, 525, 0,
976 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
977 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
978 /* 57 - 720x480@240Hz */
979 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
980 798, 858, 0, 480, 489, 495, 525, 0,
981 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
982 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
983 /* 58 - 720(1440)x480i@240 */
984 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
985 801, 858, 0, 480, 488, 494, 525, 0,
986 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
987 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
988 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
989 /* 59 - 720(1440)x480i@240 */
990 { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
991 801, 858, 0, 480, 488, 494, 525, 0,
992 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
993 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
994 .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
995 /* 60 - 1280x720@24Hz */
996 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
997 3080, 3300, 0, 720, 725, 730, 750, 0,
998 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
999 .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1000 /* 61 - 1280x720@25Hz */
1001 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1002 3740, 3960, 0, 720, 725, 730, 750, 0,
1003 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1004 .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1005 /* 62 - 1280x720@30Hz */
1006 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1007 3080, 3300, 0, 720, 725, 730, 750, 0,
1008 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1009 .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1010 /* 63 - 1920x1080@120Hz */
1011 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1012 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1013 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1014 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1015 /* 64 - 1920x1080@100Hz */
1016 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1017 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1018 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1019 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1023 * HDMI 1.4 4k modes. Index using the VIC.
1025 static const struct drm_display_mode edid_4k_modes[] = {
1026 /* 0 - dummy, VICs start at 1 */
1028 /* 1 - 3840x2160@30Hz */
1029 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1030 3840, 4016, 4104, 4400, 0,
1031 2160, 2168, 2178, 2250, 0,
1032 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1034 /* 2 - 3840x2160@25Hz */
1035 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1036 3840, 4896, 4984, 5280, 0,
1037 2160, 2168, 2178, 2250, 0,
1038 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1040 /* 3 - 3840x2160@24Hz */
1041 { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1042 3840, 5116, 5204, 5500, 0,
1043 2160, 2168, 2178, 2250, 0,
1044 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1046 /* 4 - 4096x2160@24Hz (SMPTE) */
1047 { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1048 4096, 5116, 5204, 5500, 0,
1049 2160, 2168, 2178, 2250, 0,
1050 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1054 /*** DDC fetch and block validation ***/
1056 static const u8 edid_header[] = {
1057 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1061 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1062 * @raw_edid: pointer to raw base EDID block
1064 * Sanity check the header of the base EDID block.
1066 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1068 int drm_edid_header_is_valid(const u8 *raw_edid)
1072 for (i = 0; i < sizeof(edid_header); i++)
1073 if (raw_edid[i] == edid_header[i])
1078 EXPORT_SYMBOL(drm_edid_header_is_valid);
1080 static int edid_fixup __read_mostly = 6;
1081 module_param_named(edid_fixup, edid_fixup, int, 0400);
1082 MODULE_PARM_DESC(edid_fixup,
1083 "Minimum number of valid EDID header bytes (0-8, default 6)");
1085 static void drm_get_displayid(struct drm_connector *connector,
1088 static int drm_edid_block_checksum(const u8 *raw_edid)
1092 for (i = 0; i < EDID_LENGTH; i++)
1093 csum += raw_edid[i];
1098 static bool drm_edid_is_zero(const u8 *in_edid, int length)
1100 if (memchr_inv(in_edid, 0, length))
1107 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1108 * @raw_edid: pointer to raw EDID block
1109 * @block: type of block to validate (0 for base, extension otherwise)
1110 * @print_bad_edid: if true, dump bad EDID blocks to the console
1111 * @edid_corrupt: if true, the header or checksum is invalid
1113 * Validate a base or extension EDID block and optionally dump bad blocks to
1116 * Return: True if the block is valid, false otherwise.
1118 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1122 struct edid *edid = (struct edid *)raw_edid;
1124 if (WARN_ON(!raw_edid))
1127 if (edid_fixup > 8 || edid_fixup < 0)
1131 int score = drm_edid_header_is_valid(raw_edid);
1134 *edid_corrupt = false;
1135 } else if (score >= edid_fixup) {
1136 /* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1137 * The corrupt flag needs to be set here otherwise, the
1138 * fix-up code here will correct the problem, the
1139 * checksum is correct and the test fails
1142 *edid_corrupt = true;
1143 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1144 memcpy(raw_edid, edid_header, sizeof(edid_header));
1147 *edid_corrupt = true;
1152 csum = drm_edid_block_checksum(raw_edid);
1154 if (print_bad_edid) {
1155 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1159 *edid_corrupt = true;
1161 /* allow CEA to slide through, switches mangle this */
1162 if (raw_edid[0] != 0x02)
1166 /* per-block-type checks */
1167 switch (raw_edid[0]) {
1169 if (edid->version != 1) {
1170 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1174 if (edid->revision > 4)
1175 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1185 if (print_bad_edid) {
1186 if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1187 printk(KERN_ERR "EDID block is all zeroes\n");
1189 printk(KERN_ERR "Raw EDID:\n");
1190 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1191 raw_edid, EDID_LENGTH, false);
1196 EXPORT_SYMBOL(drm_edid_block_valid);
1199 * drm_edid_is_valid - sanity check EDID data
1202 * Sanity-check an entire EDID record (including extensions)
1204 * Return: True if the EDID data is valid, false otherwise.
1206 bool drm_edid_is_valid(struct edid *edid)
1209 u8 *raw = (u8 *)edid;
1214 for (i = 0; i <= edid->extensions; i++)
1215 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1220 EXPORT_SYMBOL(drm_edid_is_valid);
1222 #define DDC_SEGMENT_ADDR 0x30
1224 * drm_do_probe_ddc_edid() - get EDID information via I2C
1225 * @data: I2C device adapter
1226 * @buf: EDID data buffer to be filled
1227 * @block: 128 byte EDID block to start fetching from
1228 * @len: EDID data buffer length to fetch
1230 * Try to fetch EDID information by calling I2C driver functions.
1232 * Return: 0 on success or -1 on failure.
1235 drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
1237 struct i2c_adapter *adapter = data;
1238 unsigned char start = block * EDID_LENGTH;
1239 unsigned char segment = block >> 1;
1240 unsigned char xfers = segment ? 3 : 2;
1241 int ret, retries = 5;
1244 * The core I2C driver will automatically retry the transfer if the
1245 * adapter reports EAGAIN. However, we find that bit-banging transfers
1246 * are susceptible to errors under a heavily loaded machine and
1247 * generate spurious NAKs and timeouts. Retrying the transfer
1248 * of the individual block a few times seems to overcome this.
1251 struct i2c_msg msgs[] = {
1253 .addr = DDC_SEGMENT_ADDR,
1271 * Avoid sending the segment addr to not upset non-compliant
1274 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1276 if (ret == -ENXIO) {
1277 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1281 } while (ret != xfers && --retries);
1283 return ret == xfers ? 0 : -1;
1287 * drm_do_get_edid - get EDID data using a custom EDID block read function
1288 * @connector: connector we're probing
1289 * @get_edid_block: EDID block read function
1290 * @data: private data passed to the block read function
1292 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1293 * exposes a different interface to read EDID blocks this function can be used
1294 * to get EDID data using a custom block read function.
1296 * As in the general case the DDC bus is accessible by the kernel at the I2C
1297 * level, drivers must make all reasonable efforts to expose it as an I2C
1298 * adapter and use drm_get_edid() instead of abusing this function.
1300 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1302 struct edid *drm_do_get_edid(struct drm_connector *connector,
1303 int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1307 int i, j = 0, valid_extensions = 0;
1309 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1311 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1314 /* base block fetch */
1315 for (i = 0; i < 4; i++) {
1316 if (get_edid_block(data, block, 0, EDID_LENGTH))
1318 if (drm_edid_block_valid(block, 0, print_bad_edid,
1319 &connector->edid_corrupt))
1321 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1322 connector->null_edid_counter++;
1329 /* if there's no extensions, we're done */
1330 if (block[0x7e] == 0)
1331 return (struct edid *)block;
1333 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1338 for (j = 1; j <= block[0x7e]; j++) {
1339 for (i = 0; i < 4; i++) {
1340 if (get_edid_block(data,
1341 block + (valid_extensions + 1) * EDID_LENGTH,
1344 if (drm_edid_block_valid(block + (valid_extensions + 1)
1353 if (i == 4 && print_bad_edid) {
1354 dev_warn(connector->dev->dev,
1355 "%s: Ignoring invalid EDID block %d.\n",
1356 connector->name, j);
1358 connector->bad_edid_counter++;
1362 if (valid_extensions != block[0x7e]) {
1363 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1364 block[0x7e] = valid_extensions;
1365 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1371 return (struct edid *)block;
1374 if (print_bad_edid) {
1375 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1376 connector->name, j);
1378 connector->bad_edid_counter++;
1384 EXPORT_SYMBOL_GPL(drm_do_get_edid);
1387 * drm_probe_ddc() - probe DDC presence
1388 * @adapter: I2C adapter to probe
1390 * Return: True on success, false on failure.
1393 drm_probe_ddc(struct i2c_adapter *adapter)
1397 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1399 EXPORT_SYMBOL(drm_probe_ddc);
1402 * drm_get_edid - get EDID data, if available
1403 * @connector: connector we're probing
1404 * @adapter: I2C adapter to use for DDC
1406 * Poke the given I2C channel to grab EDID data if possible. If found,
1407 * attach it to the connector.
1409 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1411 struct edid *drm_get_edid(struct drm_connector *connector,
1412 struct i2c_adapter *adapter)
1416 if (!drm_probe_ddc(adapter))
1419 edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1421 drm_get_displayid(connector, edid);
1424 EXPORT_SYMBOL(drm_get_edid);
1427 * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
1428 * @connector: connector we're probing
1429 * @adapter: I2C adapter to use for DDC
1431 * Wrapper around drm_get_edid() for laptops with dual GPUs using one set of
1432 * outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily
1433 * switch DDC to the GPU which is retrieving EDID.
1435 * Return: Pointer to valid EDID or %NULL if we couldn't find any.
1437 struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
1438 struct i2c_adapter *adapter)
1440 struct pci_dev *pdev = connector->dev->pdev;
1443 vga_switcheroo_lock_ddc(pdev);
1444 edid = drm_get_edid(connector, adapter);
1445 vga_switcheroo_unlock_ddc(pdev);
1449 EXPORT_SYMBOL(drm_get_edid_switcheroo);
1452 * drm_edid_duplicate - duplicate an EDID and the extensions
1453 * @edid: EDID to duplicate
1455 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1457 struct edid *drm_edid_duplicate(const struct edid *edid)
1459 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1461 EXPORT_SYMBOL(drm_edid_duplicate);
1463 /*** EDID parsing ***/
1466 * edid_vendor - match a string against EDID's obfuscated vendor field
1467 * @edid: EDID to match
1468 * @vendor: vendor string
1470 * Returns true if @vendor is in @edid, false otherwise
1472 static bool edid_vendor(struct edid *edid, const char *vendor)
1474 char edid_vendor[3];
1476 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1477 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1478 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1479 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1481 return !strncmp(edid_vendor, vendor, 3);
1485 * edid_get_quirks - return quirk flags for a given EDID
1486 * @edid: EDID to process
1488 * This tells subsequent routines what fixes they need to apply.
1490 static u32 edid_get_quirks(struct edid *edid)
1492 const struct edid_quirk *quirk;
1495 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1496 quirk = &edid_quirk_list[i];
1498 if (edid_vendor(edid, quirk->vendor) &&
1499 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1500 return quirk->quirks;
1506 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1507 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1510 * edid_fixup_preferred - set preferred modes based on quirk list
1511 * @connector: has mode list to fix up
1512 * @quirks: quirks list
1514 * Walk the mode list for @connector, clearing the preferred status
1515 * on existing modes and setting it anew for the right mode ala @quirks.
1517 static void edid_fixup_preferred(struct drm_connector *connector,
1520 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1521 int target_refresh = 0;
1522 int cur_vrefresh, preferred_vrefresh;
1524 if (list_empty(&connector->probed_modes))
1527 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1528 target_refresh = 60;
1529 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1530 target_refresh = 75;
1532 preferred_mode = list_first_entry(&connector->probed_modes,
1533 struct drm_display_mode, head);
1535 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1536 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1538 if (cur_mode == preferred_mode)
1541 /* Largest mode is preferred */
1542 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1543 preferred_mode = cur_mode;
1545 cur_vrefresh = cur_mode->vrefresh ?
1546 cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1547 preferred_vrefresh = preferred_mode->vrefresh ?
1548 preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1549 /* At a given size, try to get closest to target refresh */
1550 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1551 MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1552 MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1553 preferred_mode = cur_mode;
1557 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1561 mode_is_rb(const struct drm_display_mode *mode)
1563 return (mode->htotal - mode->hdisplay == 160) &&
1564 (mode->hsync_end - mode->hdisplay == 80) &&
1565 (mode->hsync_end - mode->hsync_start == 32) &&
1566 (mode->vsync_start - mode->vdisplay == 3);
1570 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1571 * @dev: Device to duplicate against
1572 * @hsize: Mode width
1573 * @vsize: Mode height
1574 * @fresh: Mode refresh rate
1575 * @rb: Mode reduced-blanking-ness
1577 * Walk the DMT mode list looking for a match for the given parameters.
1579 * Return: A newly allocated copy of the mode, or NULL if not found.
1581 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1582 int hsize, int vsize, int fresh,
1587 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1588 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1589 if (hsize != ptr->hdisplay)
1591 if (vsize != ptr->vdisplay)
1593 if (fresh != drm_mode_vrefresh(ptr))
1595 if (rb != mode_is_rb(ptr))
1598 return drm_mode_duplicate(dev, ptr);
1603 EXPORT_SYMBOL(drm_mode_find_dmt);
1605 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1608 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1612 u8 *det_base = ext + d;
1615 for (i = 0; i < n; i++)
1616 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1620 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1622 unsigned int i, n = min((int)ext[0x02], 6);
1623 u8 *det_base = ext + 5;
1626 return; /* unknown version */
1628 for (i = 0; i < n; i++)
1629 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1633 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1636 struct edid *edid = (struct edid *)raw_edid;
1641 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1642 cb(&(edid->detailed_timings[i]), closure);
1644 for (i = 1; i <= raw_edid[0x7e]; i++) {
1645 u8 *ext = raw_edid + (i * EDID_LENGTH);
1648 cea_for_each_detailed_block(ext, cb, closure);
1651 vtb_for_each_detailed_block(ext, cb, closure);
1660 is_rb(struct detailed_timing *t, void *data)
1663 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1665 *(bool *)data = true;
1668 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1670 drm_monitor_supports_rb(struct edid *edid)
1672 if (edid->revision >= 4) {
1674 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1678 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1682 find_gtf2(struct detailed_timing *t, void *data)
1685 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1689 /* Secondary GTF curve kicks in above some break frequency */
1691 drm_gtf2_hbreak(struct edid *edid)
1694 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1695 return r ? (r[12] * 2) : 0;
1699 drm_gtf2_2c(struct edid *edid)
1702 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1703 return r ? r[13] : 0;
1707 drm_gtf2_m(struct edid *edid)
1710 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1711 return r ? (r[15] << 8) + r[14] : 0;
1715 drm_gtf2_k(struct edid *edid)
1718 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1719 return r ? r[16] : 0;
1723 drm_gtf2_2j(struct edid *edid)
1726 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1727 return r ? r[17] : 0;
1731 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1732 * @edid: EDID block to scan
1734 static int standard_timing_level(struct edid *edid)
1736 if (edid->revision >= 2) {
1737 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1739 if (drm_gtf2_hbreak(edid))
1747 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1748 * monitors fill with ascii space (0x20) instead.
1751 bad_std_timing(u8 a, u8 b)
1753 return (a == 0x00 && b == 0x00) ||
1754 (a == 0x01 && b == 0x01) ||
1755 (a == 0x20 && b == 0x20);
1759 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1760 * @connector: connector of for the EDID block
1761 * @edid: EDID block to scan
1762 * @t: standard timing params
1764 * Take the standard timing params (in this case width, aspect, and refresh)
1765 * and convert them into a real mode using CVT/GTF/DMT.
1767 static struct drm_display_mode *
1768 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1769 struct std_timing *t)
1771 struct drm_device *dev = connector->dev;
1772 struct drm_display_mode *m, *mode = NULL;
1775 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1776 >> EDID_TIMING_ASPECT_SHIFT;
1777 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1778 >> EDID_TIMING_VFREQ_SHIFT;
1779 int timing_level = standard_timing_level(edid);
1781 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1784 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1785 hsize = t->hsize * 8 + 248;
1786 /* vrefresh_rate = vfreq + 60 */
1787 vrefresh_rate = vfreq + 60;
1788 /* the vdisplay is calculated based on the aspect ratio */
1789 if (aspect_ratio == 0) {
1790 if (edid->revision < 3)
1793 vsize = (hsize * 10) / 16;
1794 } else if (aspect_ratio == 1)
1795 vsize = (hsize * 3) / 4;
1796 else if (aspect_ratio == 2)
1797 vsize = (hsize * 4) / 5;
1799 vsize = (hsize * 9) / 16;
1801 /* HDTV hack, part 1 */
1802 if (vrefresh_rate == 60 &&
1803 ((hsize == 1360 && vsize == 765) ||
1804 (hsize == 1368 && vsize == 769))) {
1810 * If this connector already has a mode for this size and refresh
1811 * rate (because it came from detailed or CVT info), use that
1812 * instead. This way we don't have to guess at interlace or
1815 list_for_each_entry(m, &connector->probed_modes, head)
1816 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1817 drm_mode_vrefresh(m) == vrefresh_rate)
1820 /* HDTV hack, part 2 */
1821 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1822 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1824 mode->hdisplay = 1366;
1825 mode->hsync_start = mode->hsync_start - 1;
1826 mode->hsync_end = mode->hsync_end - 1;
1830 /* check whether it can be found in default mode table */
1831 if (drm_monitor_supports_rb(edid)) {
1832 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1837 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1841 /* okay, generate it */
1842 switch (timing_level) {
1846 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1850 * This is potentially wrong if there's ever a monitor with
1851 * more than one ranges section, each claiming a different
1852 * secondary GTF curve. Please don't do that.
1854 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1857 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1858 drm_mode_destroy(dev, mode);
1859 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1860 vrefresh_rate, 0, 0,
1868 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1876 * EDID is delightfully ambiguous about how interlaced modes are to be
1877 * encoded. Our internal representation is of frame height, but some
1878 * HDTV detailed timings are encoded as field height.
1880 * The format list here is from CEA, in frame size. Technically we
1881 * should be checking refresh rate too. Whatever.
1884 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1885 struct detailed_pixel_timing *pt)
1888 static const struct {
1890 } cea_interlaced[] = {
1900 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1903 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1904 if ((mode->hdisplay == cea_interlaced[i].w) &&
1905 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1906 mode->vdisplay *= 2;
1907 mode->vsync_start *= 2;
1908 mode->vsync_end *= 2;
1914 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1918 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1919 * @dev: DRM device (needed to create new mode)
1921 * @timing: EDID detailed timing info
1922 * @quirks: quirks to apply
1924 * An EDID detailed timing block contains enough info for us to create and
1925 * return a new struct drm_display_mode.
1927 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1929 struct detailed_timing *timing,
1932 struct drm_display_mode *mode;
1933 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1934 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1935 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1936 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1937 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1938 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1939 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1940 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1941 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1943 /* ignore tiny modes */
1944 if (hactive < 64 || vactive < 64)
1947 if (pt->misc & DRM_EDID_PT_STEREO) {
1948 DRM_DEBUG_KMS("stereo mode not supported\n");
1951 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1952 DRM_DEBUG_KMS("composite sync not supported\n");
1955 /* it is incorrect if hsync/vsync width is zero */
1956 if (!hsync_pulse_width || !vsync_pulse_width) {
1957 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1958 "Wrong Hsync/Vsync pulse width\n");
1962 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1963 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1970 mode = drm_mode_create(dev);
1974 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1975 timing->pixel_clock = cpu_to_le16(1088);
1977 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1979 mode->hdisplay = hactive;
1980 mode->hsync_start = mode->hdisplay + hsync_offset;
1981 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1982 mode->htotal = mode->hdisplay + hblank;
1984 mode->vdisplay = vactive;
1985 mode->vsync_start = mode->vdisplay + vsync_offset;
1986 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1987 mode->vtotal = mode->vdisplay + vblank;
1989 /* Some EDIDs have bogus h/vtotal values */
1990 if (mode->hsync_end > mode->htotal)
1991 mode->htotal = mode->hsync_end + 1;
1992 if (mode->vsync_end > mode->vtotal)
1993 mode->vtotal = mode->vsync_end + 1;
1995 drm_mode_do_interlace_quirk(mode, pt);
1997 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1998 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
2001 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
2002 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
2003 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
2004 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
2007 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
2008 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
2010 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
2011 mode->width_mm *= 10;
2012 mode->height_mm *= 10;
2015 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
2016 mode->width_mm = edid->width_cm * 10;
2017 mode->height_mm = edid->height_cm * 10;
2020 mode->type = DRM_MODE_TYPE_DRIVER;
2021 mode->vrefresh = drm_mode_vrefresh(mode);
2022 drm_mode_set_name(mode);
2028 mode_in_hsync_range(const struct drm_display_mode *mode,
2029 struct edid *edid, u8 *t)
2031 int hsync, hmin, hmax;
2034 if (edid->revision >= 4)
2035 hmin += ((t[4] & 0x04) ? 255 : 0);
2037 if (edid->revision >= 4)
2038 hmax += ((t[4] & 0x08) ? 255 : 0);
2039 hsync = drm_mode_hsync(mode);
2041 return (hsync <= hmax && hsync >= hmin);
2045 mode_in_vsync_range(const struct drm_display_mode *mode,
2046 struct edid *edid, u8 *t)
2048 int vsync, vmin, vmax;
2051 if (edid->revision >= 4)
2052 vmin += ((t[4] & 0x01) ? 255 : 0);
2054 if (edid->revision >= 4)
2055 vmax += ((t[4] & 0x02) ? 255 : 0);
2056 vsync = drm_mode_vrefresh(mode);
2058 return (vsync <= vmax && vsync >= vmin);
2062 range_pixel_clock(struct edid *edid, u8 *t)
2065 if (t[9] == 0 || t[9] == 255)
2068 /* 1.4 with CVT support gives us real precision, yay */
2069 if (edid->revision >= 4 && t[10] == 0x04)
2070 return (t[9] * 10000) - ((t[12] >> 2) * 250);
2072 /* 1.3 is pathetic, so fuzz up a bit */
2073 return t[9] * 10000 + 5001;
2077 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2078 struct detailed_timing *timing)
2081 u8 *t = (u8 *)timing;
2083 if (!mode_in_hsync_range(mode, edid, t))
2086 if (!mode_in_vsync_range(mode, edid, t))
2089 if ((max_clock = range_pixel_clock(edid, t)))
2090 if (mode->clock > max_clock)
2093 /* 1.4 max horizontal check */
2094 if (edid->revision >= 4 && t[10] == 0x04)
2095 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2098 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2104 static bool valid_inferred_mode(const struct drm_connector *connector,
2105 const struct drm_display_mode *mode)
2107 const struct drm_display_mode *m;
2110 list_for_each_entry(m, &connector->probed_modes, head) {
2111 if (mode->hdisplay == m->hdisplay &&
2112 mode->vdisplay == m->vdisplay &&
2113 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2114 return false; /* duplicated */
2115 if (mode->hdisplay <= m->hdisplay &&
2116 mode->vdisplay <= m->vdisplay)
2123 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2124 struct detailed_timing *timing)
2127 struct drm_display_mode *newmode;
2128 struct drm_device *dev = connector->dev;
2130 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2131 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2132 valid_inferred_mode(connector, drm_dmt_modes + i)) {
2133 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2135 drm_mode_probed_add(connector, newmode);
2144 /* fix up 1366x768 mode from 1368x768;
2145 * GFT/CVT can't express 1366 width which isn't dividable by 8
2147 static void fixup_mode_1366x768(struct drm_display_mode *mode)
2149 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2150 mode->hdisplay = 1366;
2151 mode->hsync_start--;
2153 drm_mode_set_name(mode);
2158 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2159 struct detailed_timing *timing)
2162 struct drm_display_mode *newmode;
2163 struct drm_device *dev = connector->dev;
2165 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2166 const struct minimode *m = &extra_modes[i];
2167 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2171 fixup_mode_1366x768(newmode);
2172 if (!mode_in_range(newmode, edid, timing) ||
2173 !valid_inferred_mode(connector, newmode)) {
2174 drm_mode_destroy(dev, newmode);
2178 drm_mode_probed_add(connector, newmode);
2186 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2187 struct detailed_timing *timing)
2190 struct drm_display_mode *newmode;
2191 struct drm_device *dev = connector->dev;
2192 bool rb = drm_monitor_supports_rb(edid);
2194 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2195 const struct minimode *m = &extra_modes[i];
2196 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2200 fixup_mode_1366x768(newmode);
2201 if (!mode_in_range(newmode, edid, timing) ||
2202 !valid_inferred_mode(connector, newmode)) {
2203 drm_mode_destroy(dev, newmode);
2207 drm_mode_probed_add(connector, newmode);
2215 do_inferred_modes(struct detailed_timing *timing, void *c)
2217 struct detailed_mode_closure *closure = c;
2218 struct detailed_non_pixel *data = &timing->data.other_data;
2219 struct detailed_data_monitor_range *range = &data->data.range;
2221 if (data->type != EDID_DETAIL_MONITOR_RANGE)
2224 closure->modes += drm_dmt_modes_for_range(closure->connector,
2228 if (!version_greater(closure->edid, 1, 1))
2229 return; /* GTF not defined yet */
2231 switch (range->flags) {
2232 case 0x02: /* secondary gtf, XXX could do more */
2233 case 0x00: /* default gtf */
2234 closure->modes += drm_gtf_modes_for_range(closure->connector,
2238 case 0x04: /* cvt, only in 1.4+ */
2239 if (!version_greater(closure->edid, 1, 3))
2242 closure->modes += drm_cvt_modes_for_range(closure->connector,
2246 case 0x01: /* just the ranges, no formula */
2253 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2255 struct detailed_mode_closure closure = {
2256 .connector = connector,
2260 if (version_greater(edid, 1, 0))
2261 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2264 return closure.modes;
2268 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2270 int i, j, m, modes = 0;
2271 struct drm_display_mode *mode;
2272 u8 *est = ((u8 *)timing) + 6;
2274 for (i = 0; i < 6; i++) {
2275 for (j = 7; j >= 0; j--) {
2276 m = (i * 8) + (7 - j);
2277 if (m >= ARRAY_SIZE(est3_modes))
2279 if (est[i] & (1 << j)) {
2280 mode = drm_mode_find_dmt(connector->dev,
2286 drm_mode_probed_add(connector, mode);
2297 do_established_modes(struct detailed_timing *timing, void *c)
2299 struct detailed_mode_closure *closure = c;
2300 struct detailed_non_pixel *data = &timing->data.other_data;
2302 if (data->type == EDID_DETAIL_EST_TIMINGS)
2303 closure->modes += drm_est3_modes(closure->connector, timing);
2307 * add_established_modes - get est. modes from EDID and add them
2308 * @connector: connector to add mode(s) to
2309 * @edid: EDID block to scan
2311 * Each EDID block contains a bitmap of the supported "established modes" list
2312 * (defined above). Tease them out and add them to the global modes list.
2315 add_established_modes(struct drm_connector *connector, struct edid *edid)
2317 struct drm_device *dev = connector->dev;
2318 unsigned long est_bits = edid->established_timings.t1 |
2319 (edid->established_timings.t2 << 8) |
2320 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2322 struct detailed_mode_closure closure = {
2323 .connector = connector,
2327 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2328 if (est_bits & (1<<i)) {
2329 struct drm_display_mode *newmode;
2330 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2332 drm_mode_probed_add(connector, newmode);
2338 if (version_greater(edid, 1, 0))
2339 drm_for_each_detailed_block((u8 *)edid,
2340 do_established_modes, &closure);
2342 return modes + closure.modes;
2346 do_standard_modes(struct detailed_timing *timing, void *c)
2348 struct detailed_mode_closure *closure = c;
2349 struct detailed_non_pixel *data = &timing->data.other_data;
2350 struct drm_connector *connector = closure->connector;
2351 struct edid *edid = closure->edid;
2353 if (data->type == EDID_DETAIL_STD_MODES) {
2355 for (i = 0; i < 6; i++) {
2356 struct std_timing *std;
2357 struct drm_display_mode *newmode;
2359 std = &data->data.timings[i];
2360 newmode = drm_mode_std(connector, edid, std);
2362 drm_mode_probed_add(connector, newmode);
2370 * add_standard_modes - get std. modes from EDID and add them
2371 * @connector: connector to add mode(s) to
2372 * @edid: EDID block to scan
2374 * Standard modes can be calculated using the appropriate standard (DMT,
2375 * GTF or CVT. Grab them from @edid and add them to the list.
2378 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2381 struct detailed_mode_closure closure = {
2382 .connector = connector,
2386 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2387 struct drm_display_mode *newmode;
2389 newmode = drm_mode_std(connector, edid,
2390 &edid->standard_timings[i]);
2392 drm_mode_probed_add(connector, newmode);
2397 if (version_greater(edid, 1, 0))
2398 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2401 /* XXX should also look for standard codes in VTB blocks */
2403 return modes + closure.modes;
2406 static int drm_cvt_modes(struct drm_connector *connector,
2407 struct detailed_timing *timing)
2409 int i, j, modes = 0;
2410 struct drm_display_mode *newmode;
2411 struct drm_device *dev = connector->dev;
2412 struct cvt_timing *cvt;
2413 const int rates[] = { 60, 85, 75, 60, 50 };
2414 const u8 empty[3] = { 0, 0, 0 };
2416 for (i = 0; i < 4; i++) {
2417 int uninitialized_var(width), height;
2418 cvt = &(timing->data.other_data.data.cvt[i]);
2420 if (!memcmp(cvt->code, empty, 3))
2423 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2424 switch (cvt->code[1] & 0x0c) {
2426 width = height * 4 / 3;
2429 width = height * 16 / 9;
2432 width = height * 16 / 10;
2435 width = height * 15 / 9;
2439 for (j = 1; j < 5; j++) {
2440 if (cvt->code[2] & (1 << j)) {
2441 newmode = drm_cvt_mode(dev, width, height,
2445 drm_mode_probed_add(connector, newmode);
2456 do_cvt_mode(struct detailed_timing *timing, void *c)
2458 struct detailed_mode_closure *closure = c;
2459 struct detailed_non_pixel *data = &timing->data.other_data;
2461 if (data->type == EDID_DETAIL_CVT_3BYTE)
2462 closure->modes += drm_cvt_modes(closure->connector, timing);
2466 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2468 struct detailed_mode_closure closure = {
2469 .connector = connector,
2473 if (version_greater(edid, 1, 2))
2474 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2476 /* XXX should also look for CVT codes in VTB blocks */
2478 return closure.modes;
2481 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2484 do_detailed_mode(struct detailed_timing *timing, void *c)
2486 struct detailed_mode_closure *closure = c;
2487 struct drm_display_mode *newmode;
2489 if (timing->pixel_clock) {
2490 newmode = drm_mode_detailed(closure->connector->dev,
2491 closure->edid, timing,
2496 if (closure->preferred)
2497 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2500 * Detailed modes are limited to 10kHz pixel clock resolution,
2501 * so fix up anything that looks like CEA/HDMI mode, but the clock
2502 * is just slightly off.
2504 fixup_detailed_cea_mode_clock(newmode);
2506 drm_mode_probed_add(closure->connector, newmode);
2508 closure->preferred = 0;
2513 * add_detailed_modes - Add modes from detailed timings
2514 * @connector: attached connector
2515 * @edid: EDID block to scan
2516 * @quirks: quirks to apply
2519 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2522 struct detailed_mode_closure closure = {
2523 .connector = connector,
2529 if (closure.preferred && !version_greater(edid, 1, 3))
2531 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2533 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2535 return closure.modes;
2538 #define AUDIO_BLOCK 0x01
2539 #define VIDEO_BLOCK 0x02
2540 #define VENDOR_BLOCK 0x03
2541 #define SPEAKER_BLOCK 0x04
2542 #define VIDEO_CAPABILITY_BLOCK 0x07
2543 #define EDID_BASIC_AUDIO (1 << 6)
2544 #define EDID_CEA_YCRCB444 (1 << 5)
2545 #define EDID_CEA_YCRCB422 (1 << 4)
2546 #define EDID_CEA_VCDB_QS (1 << 6)
2549 * Search EDID for CEA extension block.
2551 static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2553 u8 *edid_ext = NULL;
2556 /* No EDID or EDID extensions */
2557 if (edid == NULL || edid->extensions == 0)
2560 /* Find CEA extension */
2561 for (i = 0; i < edid->extensions; i++) {
2562 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2563 if (edid_ext[0] == ext_id)
2567 if (i == edid->extensions)
2573 static u8 *drm_find_cea_extension(struct edid *edid)
2575 return drm_find_edid_extension(edid, CEA_EXT);
2578 static u8 *drm_find_displayid_extension(struct edid *edid)
2580 return drm_find_edid_extension(edid, DISPLAYID_EXT);
2584 * Calculate the alternate clock for the CEA mode
2585 * (60Hz vs. 59.94Hz etc.)
2588 cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2590 unsigned int clock = cea_mode->clock;
2592 if (cea_mode->vrefresh % 6 != 0)
2596 * edid_cea_modes contains the 59.94Hz
2597 * variant for 240 and 480 line modes,
2598 * and the 60Hz variant otherwise.
2600 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2601 clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2603 clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2608 static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
2609 unsigned int clock_tolerance)
2613 if (!to_match->clock)
2616 for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2617 const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
2618 unsigned int clock1, clock2;
2620 /* Check both 60Hz and 59.94Hz */
2621 clock1 = cea_mode->clock;
2622 clock2 = cea_mode_alternate_clock(cea_mode);
2624 if (abs(to_match->clock - clock1) > clock_tolerance &&
2625 abs(to_match->clock - clock2) > clock_tolerance)
2628 if (drm_mode_equal_no_clocks(to_match, cea_mode))
2636 * drm_match_cea_mode - look for a CEA mode matching given mode
2637 * @to_match: display mode
2639 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2642 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2646 if (!to_match->clock)
2649 for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2650 const struct drm_display_mode *cea_mode = &edid_cea_modes[vic];
2651 unsigned int clock1, clock2;
2653 /* Check both 60Hz and 59.94Hz */
2654 clock1 = cea_mode->clock;
2655 clock2 = cea_mode_alternate_clock(cea_mode);
2657 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2658 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2659 drm_mode_equal_no_clocks_no_stereo(to_match, cea_mode))
2664 EXPORT_SYMBOL(drm_match_cea_mode);
2666 static bool drm_valid_cea_vic(u8 vic)
2668 return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
2672 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2673 * the input VIC from the CEA mode list
2674 * @video_code: ID given to each of the CEA modes
2676 * Returns picture aspect ratio
2678 enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2680 return edid_cea_modes[video_code].picture_aspect_ratio;
2682 EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2685 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2688 * It's almost like cea_mode_alternate_clock(), we just need to add an
2689 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2693 hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2695 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2696 return hdmi_mode->clock;
2698 return cea_mode_alternate_clock(hdmi_mode);
2701 static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
2702 unsigned int clock_tolerance)
2706 if (!to_match->clock)
2709 for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2710 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
2711 unsigned int clock1, clock2;
2713 /* Make sure to also match alternate clocks */
2714 clock1 = hdmi_mode->clock;
2715 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2717 if (abs(to_match->clock - clock1) > clock_tolerance &&
2718 abs(to_match->clock - clock2) > clock_tolerance)
2721 if (drm_mode_equal_no_clocks(to_match, hdmi_mode))
2729 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2730 * @to_match: display mode
2732 * An HDMI mode is one defined in the HDMI vendor specific block.
2734 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2736 static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2740 if (!to_match->clock)
2743 for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2744 const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
2745 unsigned int clock1, clock2;
2747 /* Make sure to also match alternate clocks */
2748 clock1 = hdmi_mode->clock;
2749 clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2751 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2752 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2753 drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2759 static bool drm_valid_hdmi_vic(u8 vic)
2761 return vic > 0 && vic < ARRAY_SIZE(edid_4k_modes);
2765 add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2767 struct drm_device *dev = connector->dev;
2768 struct drm_display_mode *mode, *tmp;
2772 /* Don't add CEA modes if the CEA extension block is missing */
2773 if (!drm_find_cea_extension(edid))
2777 * Go through all probed modes and create a new mode
2778 * with the alternate clock for certain CEA modes.
2780 list_for_each_entry(mode, &connector->probed_modes, head) {
2781 const struct drm_display_mode *cea_mode = NULL;
2782 struct drm_display_mode *newmode;
2783 u8 vic = drm_match_cea_mode(mode);
2784 unsigned int clock1, clock2;
2786 if (drm_valid_cea_vic(vic)) {
2787 cea_mode = &edid_cea_modes[vic];
2788 clock2 = cea_mode_alternate_clock(cea_mode);
2790 vic = drm_match_hdmi_mode(mode);
2791 if (drm_valid_hdmi_vic(vic)) {
2792 cea_mode = &edid_4k_modes[vic];
2793 clock2 = hdmi_mode_alternate_clock(cea_mode);
2800 clock1 = cea_mode->clock;
2802 if (clock1 == clock2)
2805 if (mode->clock != clock1 && mode->clock != clock2)
2808 newmode = drm_mode_duplicate(dev, cea_mode);
2812 /* Carry over the stereo flags */
2813 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2816 * The current mode could be either variant. Make
2817 * sure to pick the "other" clock for the new mode.
2819 if (mode->clock != clock1)
2820 newmode->clock = clock1;
2822 newmode->clock = clock2;
2824 list_add_tail(&newmode->head, &list);
2827 list_for_each_entry_safe(mode, tmp, &list, head) {
2828 list_del(&mode->head);
2829 drm_mode_probed_add(connector, mode);
2836 static struct drm_display_mode *
2837 drm_display_mode_from_vic_index(struct drm_connector *connector,
2838 const u8 *video_db, u8 video_len,
2841 struct drm_device *dev = connector->dev;
2842 struct drm_display_mode *newmode;
2845 if (video_db == NULL || video_index >= video_len)
2848 /* CEA modes are numbered 1..127 */
2849 vic = (video_db[video_index] & 127);
2850 if (!drm_valid_cea_vic(vic))
2853 newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
2857 newmode->vrefresh = 0;
2863 do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2867 for (i = 0; i < len; i++) {
2868 struct drm_display_mode *mode;
2869 mode = drm_display_mode_from_vic_index(connector, db, len, i);
2871 drm_mode_probed_add(connector, mode);
2879 struct stereo_mandatory_mode {
2880 int width, height, vrefresh;
2884 static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2885 { 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2886 { 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2888 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2890 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2891 { 1280, 720, 50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2892 { 1280, 720, 50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2893 { 1280, 720, 60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2894 { 1280, 720, 60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2898 stereo_match_mandatory(const struct drm_display_mode *mode,
2899 const struct stereo_mandatory_mode *stereo_mode)
2901 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2903 return mode->hdisplay == stereo_mode->width &&
2904 mode->vdisplay == stereo_mode->height &&
2905 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2906 drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2909 static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2911 struct drm_device *dev = connector->dev;
2912 const struct drm_display_mode *mode;
2913 struct list_head stereo_modes;
2916 INIT_LIST_HEAD(&stereo_modes);
2918 list_for_each_entry(mode, &connector->probed_modes, head) {
2919 for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2920 const struct stereo_mandatory_mode *mandatory;
2921 struct drm_display_mode *new_mode;
2923 if (!stereo_match_mandatory(mode,
2924 &stereo_mandatory_modes[i]))
2927 mandatory = &stereo_mandatory_modes[i];
2928 new_mode = drm_mode_duplicate(dev, mode);
2932 new_mode->flags |= mandatory->flags;
2933 list_add_tail(&new_mode->head, &stereo_modes);
2938 list_splice_tail(&stereo_modes, &connector->probed_modes);
2943 static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2945 struct drm_device *dev = connector->dev;
2946 struct drm_display_mode *newmode;
2948 if (!drm_valid_hdmi_vic(vic)) {
2949 DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
2953 newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
2957 drm_mode_probed_add(connector, newmode);
2962 static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
2963 const u8 *video_db, u8 video_len, u8 video_index)
2965 struct drm_display_mode *newmode;
2968 if (structure & (1 << 0)) {
2969 newmode = drm_display_mode_from_vic_index(connector, video_db,
2973 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
2974 drm_mode_probed_add(connector, newmode);
2978 if (structure & (1 << 6)) {
2979 newmode = drm_display_mode_from_vic_index(connector, video_db,
2983 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
2984 drm_mode_probed_add(connector, newmode);
2988 if (structure & (1 << 8)) {
2989 newmode = drm_display_mode_from_vic_index(connector, video_db,
2993 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
2994 drm_mode_probed_add(connector, newmode);
3003 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
3004 * @connector: connector corresponding to the HDMI sink
3005 * @db: start of the CEA vendor specific block
3006 * @len: length of the CEA block payload, ie. one can access up to db[len]
3008 * Parses the HDMI VSDB looking for modes to add to @connector. This function
3009 * also adds the stereo 3d modes when applicable.
3012 do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
3013 const u8 *video_db, u8 video_len)
3015 int modes = 0, offset = 0, i, multi_present = 0, multi_len;
3016 u8 vic_len, hdmi_3d_len = 0;
3023 /* no HDMI_Video_Present */
3024 if (!(db[8] & (1 << 5)))
3027 /* Latency_Fields_Present */
3028 if (db[8] & (1 << 7))
3031 /* I_Latency_Fields_Present */
3032 if (db[8] & (1 << 6))
3035 /* the declared length is not long enough for the 2 first bytes
3036 * of additional video format capabilities */
3037 if (len < (8 + offset + 2))
3042 if (db[8 + offset] & (1 << 7)) {
3043 modes += add_hdmi_mandatory_stereo_modes(connector);
3045 /* 3D_Multi_present */
3046 multi_present = (db[8 + offset] & 0x60) >> 5;
3050 vic_len = db[8 + offset] >> 5;
3051 hdmi_3d_len = db[8 + offset] & 0x1f;
3053 for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
3056 vic = db[9 + offset + i];
3057 modes += add_hdmi_mode(connector, vic);
3059 offset += 1 + vic_len;
3061 if (multi_present == 1)
3063 else if (multi_present == 2)
3068 if (len < (8 + offset + hdmi_3d_len - 1))
3071 if (hdmi_3d_len < multi_len)
3074 if (multi_present == 1 || multi_present == 2) {
3075 /* 3D_Structure_ALL */
3076 structure_all = (db[8 + offset] << 8) | db[9 + offset];
3078 /* check if 3D_MASK is present */
3079 if (multi_present == 2)
3080 mask = (db[10 + offset] << 8) | db[11 + offset];
3084 for (i = 0; i < 16; i++) {
3085 if (mask & (1 << i))
3086 modes += add_3d_struct_modes(connector,
3093 offset += multi_len;
3095 for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
3097 struct drm_display_mode *newmode = NULL;
3098 unsigned int newflag = 0;
3099 bool detail_present;
3101 detail_present = ((db[8 + offset + i] & 0x0f) > 7);
3103 if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
3106 /* 2D_VIC_order_X */
3107 vic_index = db[8 + offset + i] >> 4;
3109 /* 3D_Structure_X */
3110 switch (db[8 + offset + i] & 0x0f) {
3112 newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
3115 newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
3119 if ((db[9 + offset + i] >> 4) == 1)
3120 newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
3125 newmode = drm_display_mode_from_vic_index(connector,
3131 newmode->flags |= newflag;
3132 drm_mode_probed_add(connector, newmode);
3146 cea_db_payload_len(const u8 *db)
3148 return db[0] & 0x1f;
3152 cea_db_tag(const u8 *db)
3158 cea_revision(const u8 *cea)
3164 cea_db_offsets(const u8 *cea, int *start, int *end)
3166 /* Data block offset in CEA extension block */
3171 if (*end < 4 || *end > 127)
3176 static bool cea_db_is_hdmi_vsdb(const u8 *db)
3180 if (cea_db_tag(db) != VENDOR_BLOCK)
3183 if (cea_db_payload_len(db) < 5)
3186 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
3188 return hdmi_id == HDMI_IEEE_OUI;
3191 #define for_each_cea_db(cea, i, start, end) \
3192 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3195 add_cea_modes(struct drm_connector *connector, struct edid *edid)
3197 const u8 *cea = drm_find_cea_extension(edid);
3198 const u8 *db, *hdmi = NULL, *video = NULL;
3199 u8 dbl, hdmi_len, video_len = 0;
3202 if (cea && cea_revision(cea) >= 3) {
3205 if (cea_db_offsets(cea, &start, &end))
3208 for_each_cea_db(cea, i, start, end) {
3210 dbl = cea_db_payload_len(db);
3212 if (cea_db_tag(db) == VIDEO_BLOCK) {
3215 modes += do_cea_modes(connector, video, dbl);
3217 else if (cea_db_is_hdmi_vsdb(db)) {
3225 * We parse the HDMI VSDB after having added the cea modes as we will
3226 * be patching their flags when the sink supports stereo 3D.
3229 modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3235 static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
3237 const struct drm_display_mode *cea_mode;
3238 int clock1, clock2, clock;
3243 * allow 5kHz clock difference either way to account for
3244 * the 10kHz clock resolution limit of detailed timings.
3246 vic = drm_match_cea_mode_clock_tolerance(mode, 5);
3247 if (drm_valid_cea_vic(vic)) {
3249 cea_mode = &edid_cea_modes[vic];
3250 clock1 = cea_mode->clock;
3251 clock2 = cea_mode_alternate_clock(cea_mode);
3253 vic = drm_match_hdmi_mode_clock_tolerance(mode, 5);
3254 if (drm_valid_hdmi_vic(vic)) {
3256 cea_mode = &edid_4k_modes[vic];
3257 clock1 = cea_mode->clock;
3258 clock2 = hdmi_mode_alternate_clock(cea_mode);
3264 /* pick whichever is closest */
3265 if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
3270 if (mode->clock == clock)
3273 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
3274 type, vic, mode->clock, clock);
3275 mode->clock = clock;
3279 drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db)
3281 u8 len = cea_db_payload_len(db);
3284 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
3286 connector->latency_present[0] = db[8] >> 7;
3287 connector->latency_present[1] = (db[8] >> 6) & 1;
3290 connector->video_latency[0] = db[9];
3292 connector->audio_latency[0] = db[10];
3294 connector->video_latency[1] = db[11];
3296 connector->audio_latency[1] = db[12];
3298 DRM_DEBUG_KMS("HDMI: latency present %d %d, "
3299 "video latency %d %d, "
3300 "audio latency %d %d\n",
3301 connector->latency_present[0],
3302 connector->latency_present[1],
3303 connector->video_latency[0],
3304 connector->video_latency[1],
3305 connector->audio_latency[0],
3306 connector->audio_latency[1]);
3310 monitor_name(struct detailed_timing *t, void *data)
3312 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3313 *(u8 **)data = t->data.other_data.data.str.str;
3316 static int get_monitor_name(struct edid *edid, char name[13])
3318 char *edid_name = NULL;
3324 drm_for_each_detailed_block((u8 *)edid, monitor_name, &edid_name);
3325 for (mnl = 0; edid_name && mnl < 13; mnl++) {
3326 if (edid_name[mnl] == 0x0a)
3329 name[mnl] = edid_name[mnl];
3336 * drm_edid_get_monitor_name - fetch the monitor name from the edid
3337 * @edid: monitor EDID information
3338 * @name: pointer to a character array to hold the name of the monitor
3339 * @bufsize: The size of the name buffer (should be at least 14 chars.)
3342 void drm_edid_get_monitor_name(struct edid *edid, char *name, int bufsize)
3350 name_length = min(get_monitor_name(edid, buf), bufsize - 1);
3351 memcpy(name, buf, name_length);
3352 name[name_length] = '\0';
3354 EXPORT_SYMBOL(drm_edid_get_monitor_name);
3357 * drm_edid_to_eld - build ELD from EDID
3358 * @connector: connector corresponding to the HDMI/DP sink
3359 * @edid: EDID to parse
3361 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3362 * HDCP and Port_ID ELD fields are left for the graphics driver to fill in.
3364 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3366 uint8_t *eld = connector->eld;
3369 int total_sad_count = 0;
3373 memset(eld, 0, sizeof(connector->eld));
3375 connector->latency_present[0] = false;
3376 connector->latency_present[1] = false;
3377 connector->video_latency[0] = 0;
3378 connector->audio_latency[0] = 0;
3379 connector->video_latency[1] = 0;
3380 connector->audio_latency[1] = 0;
3382 cea = drm_find_cea_extension(edid);
3384 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3388 mnl = get_monitor_name(edid, eld + 20);
3390 eld[4] = (cea[1] << 5) | mnl;
3391 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3393 eld[0] = 2 << 3; /* ELD version: 2 */
3395 eld[16] = edid->mfg_id[0];
3396 eld[17] = edid->mfg_id[1];
3397 eld[18] = edid->prod_code[0];
3398 eld[19] = edid->prod_code[1];
3400 if (cea_revision(cea) >= 3) {
3403 if (cea_db_offsets(cea, &start, &end)) {
3408 for_each_cea_db(cea, i, start, end) {
3410 dbl = cea_db_payload_len(db);
3412 switch (cea_db_tag(db)) {
3416 /* Audio Data Block, contains SADs */
3417 sad_count = min(dbl / 3, 15 - total_sad_count);
3419 memcpy(eld + 20 + mnl + total_sad_count * 3,
3420 &db[1], sad_count * 3);
3421 total_sad_count += sad_count;
3424 /* Speaker Allocation Data Block */
3429 /* HDMI Vendor-Specific Data Block */
3430 if (cea_db_is_hdmi_vsdb(db))
3431 drm_parse_hdmi_vsdb_audio(connector, db);
3438 eld[5] |= total_sad_count << 4;
3440 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
3441 connector->connector_type == DRM_MODE_CONNECTOR_eDP)
3442 eld[DRM_ELD_SAD_COUNT_CONN_TYPE] |= DRM_ELD_CONN_TYPE_DP;
3444 eld[DRM_ELD_SAD_COUNT_CONN_TYPE] |= DRM_ELD_CONN_TYPE_HDMI;
3446 eld[DRM_ELD_BASELINE_ELD_LEN] =
3447 DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3449 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
3450 drm_eld_size(eld), total_sad_count);
3452 EXPORT_SYMBOL(drm_edid_to_eld);
3455 * drm_edid_to_sad - extracts SADs from EDID
3456 * @edid: EDID to parse
3457 * @sads: pointer that will be set to the extracted SADs
3459 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3461 * Note: The returned pointer needs to be freed using kfree().
3463 * Return: The number of found SADs or negative number on error.
3465 int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3468 int i, start, end, dbl;
3471 cea = drm_find_cea_extension(edid);
3473 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3477 if (cea_revision(cea) < 3) {
3478 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3482 if (cea_db_offsets(cea, &start, &end)) {
3483 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3487 for_each_cea_db(cea, i, start, end) {
3490 if (cea_db_tag(db) == AUDIO_BLOCK) {
3492 dbl = cea_db_payload_len(db);
3494 count = dbl / 3; /* SAD is 3B */
3495 *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3498 for (j = 0; j < count; j++) {
3499 u8 *sad = &db[1 + j * 3];
3501 (*sads)[j].format = (sad[0] & 0x78) >> 3;
3502 (*sads)[j].channels = sad[0] & 0x7;
3503 (*sads)[j].freq = sad[1] & 0x7F;
3504 (*sads)[j].byte2 = sad[2];
3512 EXPORT_SYMBOL(drm_edid_to_sad);
3515 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3516 * @edid: EDID to parse
3517 * @sadb: pointer to the speaker block
3519 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3521 * Note: The returned pointer needs to be freed using kfree().
3523 * Return: The number of found Speaker Allocation Blocks or negative number on
3526 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3529 int i, start, end, dbl;
3532 cea = drm_find_cea_extension(edid);
3534 DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3538 if (cea_revision(cea) < 3) {
3539 DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3543 if (cea_db_offsets(cea, &start, &end)) {
3544 DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3548 for_each_cea_db(cea, i, start, end) {
3549 const u8 *db = &cea[i];
3551 if (cea_db_tag(db) == SPEAKER_BLOCK) {
3552 dbl = cea_db_payload_len(db);
3554 /* Speaker Allocation Data Block */
3556 *sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3567 EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3570 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3571 * @connector: connector associated with the HDMI/DP sink
3572 * @mode: the display mode
3574 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3575 * the sink doesn't support audio or video.
3577 int drm_av_sync_delay(struct drm_connector *connector,
3578 const struct drm_display_mode *mode)
3580 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3583 if (!connector->latency_present[0])
3585 if (!connector->latency_present[1])
3588 a = connector->audio_latency[i];
3589 v = connector->video_latency[i];
3592 * HDMI/DP sink doesn't support audio or video?
3594 if (a == 255 || v == 255)
3598 * Convert raw EDID values to millisecond.
3599 * Treat unknown latency as 0ms.
3602 a = min(2 * (a - 1), 500);
3604 v = min(2 * (v - 1), 500);
3606 return max(v - a, 0);
3608 EXPORT_SYMBOL(drm_av_sync_delay);
3611 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
3612 * @encoder: the encoder just changed display mode
3614 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
3615 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
3617 * Return: The connector associated with the first HDMI/DP sink that has ELD
3620 struct drm_connector *drm_select_eld(struct drm_encoder *encoder)
3622 struct drm_connector *connector;
3623 struct drm_device *dev = encoder->dev;
3625 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
3626 WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex));
3628 drm_for_each_connector(connector, dev)
3629 if (connector->encoder == encoder && connector->eld[0])
3634 EXPORT_SYMBOL(drm_select_eld);
3637 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3638 * @edid: monitor EDID information
3640 * Parse the CEA extension according to CEA-861-B.
3642 * Return: True if the monitor is HDMI, false if not or unknown.
3644 bool drm_detect_hdmi_monitor(struct edid *edid)
3648 int start_offset, end_offset;
3650 edid_ext = drm_find_cea_extension(edid);
3654 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3658 * Because HDMI identifier is in Vendor Specific Block,
3659 * search it from all data blocks of CEA extension.
3661 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3662 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3668 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3671 * drm_detect_monitor_audio - check monitor audio capability
3672 * @edid: EDID block to scan
3674 * Monitor should have CEA extension block.
3675 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3676 * audio' only. If there is any audio extension block and supported
3677 * audio format, assume at least 'basic audio' support, even if 'basic
3678 * audio' is not defined in EDID.
3680 * Return: True if the monitor supports audio, false otherwise.
3682 bool drm_detect_monitor_audio(struct edid *edid)
3686 bool has_audio = false;
3687 int start_offset, end_offset;
3689 edid_ext = drm_find_cea_extension(edid);
3693 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3696 DRM_DEBUG_KMS("Monitor has basic audio support\n");
3700 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3703 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3704 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
3706 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3707 DRM_DEBUG_KMS("CEA audio format %d\n",
3708 (edid_ext[i + j] >> 3) & 0xf);
3715 EXPORT_SYMBOL(drm_detect_monitor_audio);
3718 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3719 * @edid: EDID block to scan
3721 * Check whether the monitor reports the RGB quantization range selection
3722 * as supported. The AVI infoframe can then be used to inform the monitor
3723 * which quantization range (full or limited) is used.
3725 * Return: True if the RGB quantization range is selectable, false otherwise.
3727 bool drm_rgb_quant_range_selectable(struct edid *edid)
3732 edid_ext = drm_find_cea_extension(edid);
3736 if (cea_db_offsets(edid_ext, &start, &end))
3739 for_each_cea_db(edid_ext, i, start, end) {
3740 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3741 cea_db_payload_len(&edid_ext[i]) == 2) {
3742 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3743 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3749 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3751 static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
3754 struct drm_display_info *info = &connector->display_info;
3755 unsigned int dc_bpc = 0;
3757 /* HDMI supports at least 8 bpc */
3760 if (cea_db_payload_len(hdmi) < 6)
3763 if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3765 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3766 DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3770 if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3772 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3773 DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3777 if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3779 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3780 DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3785 DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3790 DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3791 connector->name, dc_bpc);
3794 /* YCRCB444 is optional according to spec. */
3795 if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3796 DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3801 * Spec says that if any deep color mode is supported at all,
3802 * then deep color 36 bit must be supported.
3804 if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3805 DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3811 drm_parse_hdmi_vsdb_video(struct drm_connector *connector, const u8 *db)
3813 struct drm_display_info *info = &connector->display_info;
3814 u8 len = cea_db_payload_len(db);
3817 info->dvi_dual = db[6] & 1;
3819 info->max_tmds_clock = db[7] * 5000;
3821 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3822 "max TMDS clock %d kHz\n",
3824 info->max_tmds_clock);
3826 drm_parse_hdmi_deep_color_info(connector, db);
3829 static void drm_parse_cea_ext(struct drm_connector *connector,
3832 struct drm_display_info *info = &connector->display_info;
3836 edid_ext = drm_find_cea_extension(edid);
3840 info->cea_rev = edid_ext[1];
3842 /* The existence of a CEA block should imply RGB support */
3843 info->color_formats = DRM_COLOR_FORMAT_RGB444;
3844 if (edid_ext[3] & EDID_CEA_YCRCB444)
3845 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3846 if (edid_ext[3] & EDID_CEA_YCRCB422)
3847 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3849 if (cea_db_offsets(edid_ext, &start, &end))
3852 for_each_cea_db(edid_ext, i, start, end) {
3853 const u8 *db = &edid_ext[i];
3855 if (cea_db_is_hdmi_vsdb(db))
3856 drm_parse_hdmi_vsdb_video(connector, db);
3860 static void drm_add_display_info(struct drm_connector *connector,
3863 struct drm_display_info *info = &connector->display_info;
3865 info->width_mm = edid->width_cm * 10;
3866 info->height_mm = edid->height_cm * 10;
3868 /* driver figures it out in this case */
3870 info->color_formats = 0;
3872 info->max_tmds_clock = 0;
3873 info->dvi_dual = false;
3875 if (edid->revision < 3)
3878 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3881 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3882 drm_parse_cea_ext(connector, edid);
3885 * Digital sink with "DFP 1.x compliant TMDS" according to EDID 1.3?
3887 * For such displays, the DFP spec 1.0, section 3.10 "EDID support"
3888 * tells us to assume 8 bpc color depth if the EDID doesn't have
3889 * extensions which tell otherwise.
3891 if ((info->bpc == 0) && (edid->revision < 4) &&
3892 (edid->input & DRM_EDID_DIGITAL_TYPE_DVI)) {
3894 DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
3895 connector->name, info->bpc);
3898 /* Only defined for 1.4 with digital displays */
3899 if (edid->revision < 4)
3902 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3903 case DRM_EDID_DIGITAL_DEPTH_6:
3906 case DRM_EDID_DIGITAL_DEPTH_8:
3909 case DRM_EDID_DIGITAL_DEPTH_10:
3912 case DRM_EDID_DIGITAL_DEPTH_12:
3915 case DRM_EDID_DIGITAL_DEPTH_14:
3918 case DRM_EDID_DIGITAL_DEPTH_16:
3921 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3927 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3928 connector->name, info->bpc);
3930 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3931 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3932 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3933 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3936 static int validate_displayid(u8 *displayid, int length, int idx)
3940 struct displayid_hdr *base;
3942 base = (struct displayid_hdr *)&displayid[idx];
3944 DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
3945 base->rev, base->bytes, base->prod_id, base->ext_count);
3947 if (base->bytes + 5 > length - idx)
3949 for (i = idx; i <= base->bytes + 5; i++) {
3950 csum += displayid[i];
3953 DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
3959 static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *dev,
3960 struct displayid_detailed_timings_1 *timings)
3962 struct drm_display_mode *mode;
3963 unsigned pixel_clock = (timings->pixel_clock[0] |
3964 (timings->pixel_clock[1] << 8) |
3965 (timings->pixel_clock[2] << 16)) + 1;
3966 unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1;
3967 unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1;
3968 unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1;
3969 unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1;
3970 unsigned vactive = (timings->vactive[0] | timings->vactive[1] << 8) + 1;
3971 unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1;
3972 unsigned vsync = (timings->vsync[0] | (timings->vsync[1] & 0x7f) << 8) + 1;
3973 unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1;
3974 bool hsync_positive = (timings->hsync[1] >> 7) & 0x1;
3975 bool vsync_positive = (timings->vsync[1] >> 7) & 0x1;
3976 mode = drm_mode_create(dev);
3980 mode->clock = pixel_clock * 10;
3981 mode->hdisplay = hactive;
3982 mode->hsync_start = mode->hdisplay + hsync;
3983 mode->hsync_end = mode->hsync_start + hsync_width;
3984 mode->htotal = mode->hdisplay + hblank;
3986 mode->vdisplay = vactive;
3987 mode->vsync_start = mode->vdisplay + vsync;
3988 mode->vsync_end = mode->vsync_start + vsync_width;
3989 mode->vtotal = mode->vdisplay + vblank;
3992 mode->flags |= hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
3993 mode->flags |= vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
3994 mode->type = DRM_MODE_TYPE_DRIVER;
3996 if (timings->flags & 0x80)
3997 mode->type |= DRM_MODE_TYPE_PREFERRED;
3998 mode->vrefresh = drm_mode_vrefresh(mode);
3999 drm_mode_set_name(mode);
4004 static int add_displayid_detailed_1_modes(struct drm_connector *connector,
4005 struct displayid_block *block)
4007 struct displayid_detailed_timing_block *det = (struct displayid_detailed_timing_block *)block;
4010 struct drm_display_mode *newmode;
4012 /* blocks must be multiple of 20 bytes length */
4013 if (block->num_bytes % 20)
4016 num_timings = block->num_bytes / 20;
4017 for (i = 0; i < num_timings; i++) {
4018 struct displayid_detailed_timings_1 *timings = &det->timings[i];
4020 newmode = drm_mode_displayid_detailed(connector->dev, timings);
4024 drm_mode_probed_add(connector, newmode);
4030 static int add_displayid_detailed_modes(struct drm_connector *connector,
4036 int length = EDID_LENGTH;
4037 struct displayid_block *block;
4040 displayid = drm_find_displayid_extension(edid);
4044 ret = validate_displayid(displayid, length, idx);
4048 idx += sizeof(struct displayid_hdr);
4049 while (block = (struct displayid_block *)&displayid[idx],
4050 idx + sizeof(struct displayid_block) <= length &&
4051 idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
4052 block->num_bytes > 0) {
4053 idx += block->num_bytes + sizeof(struct displayid_block);
4054 switch (block->tag) {
4055 case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
4056 num_modes += add_displayid_detailed_1_modes(connector, block);
4064 * drm_add_edid_modes - add modes from EDID data, if available
4065 * @connector: connector we're probing
4068 * Add the specified modes to the connector's mode list. Also fills out the
4069 * &drm_display_info structure in @connector with any information which can be
4070 * derived from the edid.
4072 * Return: The number of modes added or 0 if we couldn't find any.
4074 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
4082 if (!drm_edid_is_valid(edid)) {
4083 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
4088 quirks = edid_get_quirks(edid);
4091 * EDID spec says modes should be preferred in this order:
4092 * - preferred detailed mode
4093 * - other detailed modes from base block
4094 * - detailed modes from extension blocks
4095 * - CVT 3-byte code modes
4096 * - standard timing codes
4097 * - established timing codes
4098 * - modes inferred from GTF or CVT range information
4100 * We get this pretty much right.
4102 * XXX order for additional mode types in extension blocks?
4104 num_modes += add_detailed_modes(connector, edid, quirks);
4105 num_modes += add_cvt_modes(connector, edid);
4106 num_modes += add_standard_modes(connector, edid);
4107 num_modes += add_established_modes(connector, edid);
4108 num_modes += add_cea_modes(connector, edid);
4109 num_modes += add_alternate_cea_modes(connector, edid);
4110 num_modes += add_displayid_detailed_modes(connector, edid);
4111 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
4112 num_modes += add_inferred_modes(connector, edid);
4114 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
4115 edid_fixup_preferred(connector, quirks);
4117 drm_add_display_info(connector, edid);
4119 if (quirks & EDID_QUIRK_FORCE_6BPC)
4120 connector->display_info.bpc = 6;
4122 if (quirks & EDID_QUIRK_FORCE_8BPC)
4123 connector->display_info.bpc = 8;
4125 if (quirks & EDID_QUIRK_FORCE_10BPC)
4126 connector->display_info.bpc = 10;
4128 if (quirks & EDID_QUIRK_FORCE_12BPC)
4129 connector->display_info.bpc = 12;
4133 EXPORT_SYMBOL(drm_add_edid_modes);
4136 * drm_add_modes_noedid - add modes for the connectors without EDID
4137 * @connector: connector we're probing
4138 * @hdisplay: the horizontal display limit
4139 * @vdisplay: the vertical display limit
4141 * Add the specified modes to the connector's mode list. Only when the
4142 * hdisplay/vdisplay is not beyond the given limit, it will be added.
4144 * Return: The number of modes added or 0 if we couldn't find any.
4146 int drm_add_modes_noedid(struct drm_connector *connector,
4147 int hdisplay, int vdisplay)
4149 int i, count, num_modes = 0;
4150 struct drm_display_mode *mode;
4151 struct drm_device *dev = connector->dev;
4153 count = ARRAY_SIZE(drm_dmt_modes);
4159 for (i = 0; i < count; i++) {
4160 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
4161 if (hdisplay && vdisplay) {
4163 * Only when two are valid, they will be used to check
4164 * whether the mode should be added to the mode list of
4167 if (ptr->hdisplay > hdisplay ||
4168 ptr->vdisplay > vdisplay)
4171 if (drm_mode_vrefresh(ptr) > 61)
4173 mode = drm_mode_duplicate(dev, ptr);
4175 drm_mode_probed_add(connector, mode);
4181 EXPORT_SYMBOL(drm_add_modes_noedid);
4184 * drm_set_preferred_mode - Sets the preferred mode of a connector
4185 * @connector: connector whose mode list should be processed
4186 * @hpref: horizontal resolution of preferred mode
4187 * @vpref: vertical resolution of preferred mode
4189 * Marks a mode as preferred if it matches the resolution specified by @hpref
4192 void drm_set_preferred_mode(struct drm_connector *connector,
4193 int hpref, int vpref)
4195 struct drm_display_mode *mode;
4197 list_for_each_entry(mode, &connector->probed_modes, head) {
4198 if (mode->hdisplay == hpref &&
4199 mode->vdisplay == vpref)
4200 mode->type |= DRM_MODE_TYPE_PREFERRED;
4203 EXPORT_SYMBOL(drm_set_preferred_mode);
4206 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
4207 * data from a DRM display mode
4208 * @frame: HDMI AVI infoframe
4209 * @mode: DRM display mode
4211 * Return: 0 on success or a negative error code on failure.
4214 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
4215 const struct drm_display_mode *mode)
4219 if (!frame || !mode)
4222 err = hdmi_avi_infoframe_init(frame);
4226 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
4227 frame->pixel_repeat = 1;
4229 frame->video_code = drm_match_cea_mode(mode);
4231 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
4234 * Populate picture aspect ratio from either
4235 * user input (if specified) or from the CEA mode list.
4237 if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
4238 mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
4239 frame->picture_aspect = mode->picture_aspect_ratio;
4240 else if (frame->video_code > 0)
4241 frame->picture_aspect = drm_get_cea_aspect_ratio(
4244 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
4245 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
4249 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
4251 static enum hdmi_3d_structure
4252 s3d_structure_from_display_mode(const struct drm_display_mode *mode)
4254 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
4257 case DRM_MODE_FLAG_3D_FRAME_PACKING:
4258 return HDMI_3D_STRUCTURE_FRAME_PACKING;
4259 case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
4260 return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
4261 case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
4262 return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
4263 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
4264 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
4265 case DRM_MODE_FLAG_3D_L_DEPTH:
4266 return HDMI_3D_STRUCTURE_L_DEPTH;
4267 case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
4268 return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
4269 case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
4270 return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
4271 case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
4272 return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
4274 return HDMI_3D_STRUCTURE_INVALID;
4279 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
4280 * data from a DRM display mode
4281 * @frame: HDMI vendor infoframe
4282 * @mode: DRM display mode
4284 * Note that there's is a need to send HDMI vendor infoframes only when using a
4285 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
4286 * function will return -EINVAL, error that can be safely ignored.
4288 * Return: 0 on success or a negative error code on failure.
4291 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
4292 const struct drm_display_mode *mode)
4298 if (!frame || !mode)
4301 vic = drm_match_hdmi_mode(mode);
4302 s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
4304 if (!vic && !s3d_flags)
4307 if (vic && s3d_flags)
4310 err = hdmi_vendor_infoframe_init(frame);
4317 frame->s3d_struct = s3d_structure_from_display_mode(mode);
4321 EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
4323 static int drm_parse_tiled_block(struct drm_connector *connector,
4324 struct displayid_block *block)
4326 struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
4328 u8 tile_v_loc, tile_h_loc;
4329 u8 num_v_tile, num_h_tile;
4330 struct drm_tile_group *tg;
4332 w = tile->tile_size[0] | tile->tile_size[1] << 8;
4333 h = tile->tile_size[2] | tile->tile_size[3] << 8;
4335 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
4336 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
4337 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
4338 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
4340 connector->has_tile = true;
4341 if (tile->tile_cap & 0x80)
4342 connector->tile_is_single_monitor = true;
4344 connector->num_h_tile = num_h_tile + 1;
4345 connector->num_v_tile = num_v_tile + 1;
4346 connector->tile_h_loc = tile_h_loc;
4347 connector->tile_v_loc = tile_v_loc;
4348 connector->tile_h_size = w + 1;
4349 connector->tile_v_size = h + 1;
4351 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
4352 DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
4353 DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
4354 num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
4355 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
4357 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
4359 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
4364 if (connector->tile_group != tg) {
4365 /* if we haven't got a pointer,
4366 take the reference, drop ref to old tile group */
4367 if (connector->tile_group) {
4368 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4370 connector->tile_group = tg;
4372 /* if same tile group, then release the ref we just took. */
4373 drm_mode_put_tile_group(connector->dev, tg);
4377 static int drm_parse_display_id(struct drm_connector *connector,
4378 u8 *displayid, int length,
4379 bool is_edid_extension)
4381 /* if this is an EDID extension the first byte will be 0x70 */
4383 struct displayid_block *block;
4386 if (is_edid_extension)
4389 ret = validate_displayid(displayid, length, idx);
4393 idx += sizeof(struct displayid_hdr);
4394 while (block = (struct displayid_block *)&displayid[idx],
4395 idx + sizeof(struct displayid_block) <= length &&
4396 idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
4397 block->num_bytes > 0) {
4398 idx += block->num_bytes + sizeof(struct displayid_block);
4399 DRM_DEBUG_KMS("block id 0x%x, rev %d, len %d\n",
4400 block->tag, block->rev, block->num_bytes);
4402 switch (block->tag) {
4403 case DATA_BLOCK_TILED_DISPLAY:
4404 ret = drm_parse_tiled_block(connector, block);
4408 case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
4409 /* handled in mode gathering code. */
4412 DRM_DEBUG_KMS("found DisplayID tag 0x%x, unhandled\n", block->tag);
4419 static void drm_get_displayid(struct drm_connector *connector,
4422 void *displayid = NULL;
4424 connector->has_tile = false;
4425 displayid = drm_find_displayid_extension(edid);
4427 /* drop reference to any tile group we had */
4431 ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4434 if (!connector->has_tile)
4438 if (connector->tile_group) {
4439 drm_mode_put_tile_group(connector->dev, connector->tile_group);
4440 connector->tile_group = NULL;
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