2 * Copyright (C) 2014 Traphandler
3 * Copyright (C) 2014 Free Electrons
5 * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published by
10 * the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program. If not, see <http://www.gnu.org/licenses/>.
21 #include <linux/clk.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/pinctrl/consumer.h>
26 #include <drm/drm_crtc.h>
27 #include <drm/drm_crtc_helper.h>
30 #include <video/videomode.h>
32 #include "atmel_hlcdc_dc.h"
35 * Atmel HLCDC CRTC structure
37 * @base: base DRM CRTC structure
38 * @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device
39 * @event: pointer to the current page flip event
40 * @id: CRTC id (returned by drm_crtc_index)
41 * @enabled: CRTC state
43 struct atmel_hlcdc_crtc {
45 struct atmel_hlcdc_dc *dc;
46 struct drm_pending_vblank_event *event;
51 static inline struct atmel_hlcdc_crtc *
52 drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc)
54 return container_of(crtc, struct atmel_hlcdc_crtc, base);
57 static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
59 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
60 struct regmap *regmap = crtc->dc->hlcdc->regmap;
61 struct drm_display_mode *adj = &c->state->adjusted_mode;
62 unsigned long mode_rate;
68 ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
72 vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
73 vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
74 vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
75 vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
76 vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
77 vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
79 regmap_write(regmap, ATMEL_HLCDC_CFG(1),
80 (vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
82 regmap_write(regmap, ATMEL_HLCDC_CFG(2),
83 (vm.vfront_porch - 1) | (vm.vback_porch << 16));
85 regmap_write(regmap, ATMEL_HLCDC_CFG(3),
86 (vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
88 regmap_write(regmap, ATMEL_HLCDC_CFG(4),
89 (adj->crtc_hdisplay - 1) |
90 ((adj->crtc_vdisplay - 1) << 16));
94 prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
95 mode_rate = adj->crtc_clock * 1000;
96 if ((prate / 2) < mode_rate) {
98 cfg |= ATMEL_HLCDC_CLKSEL;
101 div = DIV_ROUND_UP(prate, mode_rate);
105 cfg |= ATMEL_HLCDC_CLKDIV(div);
107 regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),
108 ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |
109 ATMEL_HLCDC_CLKPOL, cfg);
113 if (adj->flags & DRM_MODE_FLAG_NVSYNC)
114 cfg |= ATMEL_HLCDC_VSPOL;
116 if (adj->flags & DRM_MODE_FLAG_NHSYNC)
117 cfg |= ATMEL_HLCDC_HSPOL;
119 regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
120 ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
121 ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
122 ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
123 ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
124 ATMEL_HLCDC_GUARDTIME_MASK,
127 clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
130 static bool atmel_hlcdc_crtc_mode_fixup(struct drm_crtc *crtc,
131 const struct drm_display_mode *mode,
132 struct drm_display_mode *adjusted_mode)
137 static void atmel_hlcdc_crtc_disable(struct drm_crtc *c)
139 struct drm_device *dev = c->dev;
140 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
141 struct regmap *regmap = crtc->dc->hlcdc->regmap;
147 drm_crtc_vblank_off(c);
149 pm_runtime_get_sync(dev->dev);
151 regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP);
152 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
153 (status & ATMEL_HLCDC_DISP))
156 regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_SYNC);
157 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
158 (status & ATMEL_HLCDC_SYNC))
161 regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PIXEL_CLK);
162 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
163 (status & ATMEL_HLCDC_PIXEL_CLK))
166 clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
167 pinctrl_pm_select_sleep_state(dev->dev);
169 pm_runtime_allow(dev->dev);
171 pm_runtime_put_sync(dev->dev);
173 crtc->enabled = false;
176 static void atmel_hlcdc_crtc_enable(struct drm_crtc *c)
178 struct drm_device *dev = c->dev;
179 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
180 struct regmap *regmap = crtc->dc->hlcdc->regmap;
186 pm_runtime_get_sync(dev->dev);
188 pm_runtime_forbid(dev->dev);
190 pinctrl_pm_select_default_state(dev->dev);
191 clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
193 regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK);
194 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
195 !(status & ATMEL_HLCDC_PIXEL_CLK))
199 regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_SYNC);
200 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
201 !(status & ATMEL_HLCDC_SYNC))
204 regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_DISP);
205 while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
206 !(status & ATMEL_HLCDC_DISP))
209 pm_runtime_put_sync(dev->dev);
211 drm_crtc_vblank_on(c);
213 crtc->enabled = true;
216 void atmel_hlcdc_crtc_suspend(struct drm_crtc *c)
218 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
221 atmel_hlcdc_crtc_disable(c);
222 /* save enable state for resume */
223 crtc->enabled = true;
227 void atmel_hlcdc_crtc_resume(struct drm_crtc *c)
229 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
232 crtc->enabled = false;
233 atmel_hlcdc_crtc_enable(c);
237 static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c,
238 struct drm_crtc_state *s)
240 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
242 if (atmel_hlcdc_dc_mode_valid(crtc->dc, &s->adjusted_mode) != MODE_OK)
245 return atmel_hlcdc_plane_prepare_disc_area(s);
248 static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c,
249 struct drm_crtc_state *old_s)
251 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
253 if (c->state->event) {
254 c->state->event->pipe = drm_crtc_index(c);
256 WARN_ON(drm_crtc_vblank_get(c) != 0);
258 crtc->event = c->state->event;
259 c->state->event = NULL;
263 static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *crtc,
264 struct drm_crtc_state *old_s)
266 /* TODO: write common plane control register if available */
269 static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
270 .mode_fixup = atmel_hlcdc_crtc_mode_fixup,
271 .mode_set = drm_helper_crtc_mode_set,
272 .mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
273 .mode_set_base = drm_helper_crtc_mode_set_base,
274 .disable = atmel_hlcdc_crtc_disable,
275 .enable = atmel_hlcdc_crtc_enable,
276 .atomic_check = atmel_hlcdc_crtc_atomic_check,
277 .atomic_begin = atmel_hlcdc_crtc_atomic_begin,
278 .atomic_flush = atmel_hlcdc_crtc_atomic_flush,
281 static void atmel_hlcdc_crtc_destroy(struct drm_crtc *c)
283 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
289 void atmel_hlcdc_crtc_cancel_page_flip(struct drm_crtc *c,
290 struct drm_file *file)
292 struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
293 struct drm_pending_vblank_event *event;
294 struct drm_device *dev = c->dev;
297 spin_lock_irqsave(&dev->event_lock, flags);
299 if (event && event->base.file_priv == file) {
300 event->base.destroy(&event->base);
301 drm_vblank_put(dev, crtc->id);
304 spin_unlock_irqrestore(&dev->event_lock, flags);
307 static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc)
309 struct drm_device *dev = crtc->base.dev;
312 spin_lock_irqsave(&dev->event_lock, flags);
314 drm_send_vblank_event(dev, crtc->id, crtc->event);
315 drm_vblank_put(dev, crtc->id);
318 spin_unlock_irqrestore(&dev->event_lock, flags);
321 void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
323 drm_handle_vblank(c->dev, 0);
324 atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
327 static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
328 .page_flip = drm_atomic_helper_page_flip,
329 .set_config = drm_atomic_helper_set_config,
330 .destroy = atmel_hlcdc_crtc_destroy,
331 .reset = drm_atomic_helper_crtc_reset,
332 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
333 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
336 int atmel_hlcdc_crtc_create(struct drm_device *dev)
338 struct atmel_hlcdc_dc *dc = dev->dev_private;
339 struct atmel_hlcdc_planes *planes = dc->planes;
340 struct atmel_hlcdc_crtc *crtc;
344 crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
350 ret = drm_crtc_init_with_planes(dev, &crtc->base,
351 &planes->primary->base,
352 planes->cursor ? &planes->cursor->base : NULL,
353 &atmel_hlcdc_crtc_funcs);
357 crtc->id = drm_crtc_index(&crtc->base);
360 planes->cursor->base.possible_crtcs = 1 << crtc->id;
362 for (i = 0; i < planes->noverlays; i++)
363 planes->overlays[i]->base.possible_crtcs = 1 << crtc->id;
365 drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
366 drm_crtc_vblank_reset(&crtc->base);
368 dc->crtc = &crtc->base;
373 atmel_hlcdc_crtc_destroy(&crtc->base);