drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c

   1 /*
   2  * Copyright (C) 2014 Traphandler
   3  * Copyright (C) 2014 Free Electrons
   4  *
   5  * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
   6  * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License version 2 as published by
  10  * the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  15  * more details.
  16  *
  17  * You should have received a copy of the GNU General Public License along with
  18  * this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <linux/clk.h>
  22 #include <linux/pm.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/pinctrl/consumer.h>
  25
  26 #include <drm/drm_crtc.h>
  27 #include <drm/drm_crtc_helper.h>
  28 #include <drm/drmP.h>
  29
  30 #include <video/videomode.h>
  31
  32 #include "atmel_hlcdc_dc.h"
  33
  34 /**
  35  * Atmel HLCDC CRTC state structure
  36  *
  37  * @base: base CRTC state
  38  * @output_mode: RGBXXX output mode
  39  */
  40 struct atmel_hlcdc_crtc_state {
  41         struct drm_crtc_state base;
  42         unsigned int output_mode;
  43 };
  44
  45 static inline struct atmel_hlcdc_crtc_state *
  46 drm_crtc_state_to_atmel_hlcdc_crtc_state(struct drm_crtc_state *state)
  47 {
  48         return container_of(state, struct atmel_hlcdc_crtc_state, base);
  49 }
  50
  51 /**
  52  * Atmel HLCDC CRTC structure
  53  *
  54  * @base: base DRM CRTC structure
  55  * @hlcdc: pointer to the atmel_hlcdc structure provided by the MFD device
  56  * @event: pointer to the current page flip event
  57  * @id: CRTC id (returned by drm_crtc_index)
  58  */
  59 struct atmel_hlcdc_crtc {
  60         struct drm_crtc base;
  61         struct atmel_hlcdc_dc *dc;
  62         struct drm_pending_vblank_event *event;
  63         int id;
  64 };
  65
  66 static inline struct atmel_hlcdc_crtc *
  67 drm_crtc_to_atmel_hlcdc_crtc(struct drm_crtc *crtc)
  68 {
  69         return container_of(crtc, struct atmel_hlcdc_crtc, base);
  70 }
  71
  72 static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c)
  73 {
  74         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
  75         struct regmap *regmap = crtc->dc->hlcdc->regmap;
  76         struct drm_display_mode *adj = &c->state->adjusted_mode;
  77         struct atmel_hlcdc_crtc_state *state;
  78         unsigned long mode_rate;
  79         struct videomode vm;
  80         unsigned long prate;
  81         unsigned int cfg;
  82         int div, ret;
  83
  84         ret = clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
  85         if (ret)
  86                 return;
  87
  88         vm.vfront_porch = adj->crtc_vsync_start - adj->crtc_vdisplay;
  89         vm.vback_porch = adj->crtc_vtotal - adj->crtc_vsync_end;
  90         vm.vsync_len = adj->crtc_vsync_end - adj->crtc_vsync_start;
  91         vm.hfront_porch = adj->crtc_hsync_start - adj->crtc_hdisplay;
  92         vm.hback_porch = adj->crtc_htotal - adj->crtc_hsync_end;
  93         vm.hsync_len = adj->crtc_hsync_end - adj->crtc_hsync_start;
  94
  95         regmap_write(regmap, ATMEL_HLCDC_CFG(1),
  96                      (vm.hsync_len - 1) | ((vm.vsync_len - 1) << 16));
  97
  98         regmap_write(regmap, ATMEL_HLCDC_CFG(2),
  99                      (vm.vfront_porch - 1) | (vm.vback_porch << 16));
 100
 101         regmap_write(regmap, ATMEL_HLCDC_CFG(3),
 102                      (vm.hfront_porch - 1) | ((vm.hback_porch - 1) << 16));
 103
 104         regmap_write(regmap, ATMEL_HLCDC_CFG(4),
 105                      (adj->crtc_hdisplay - 1) |
 106                      ((adj->crtc_vdisplay - 1) << 16));
 107
 108         cfg = 0;
 109
 110         prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
 111         mode_rate = adj->crtc_clock * 1000;
 112         if ((prate / 2) < mode_rate) {
 113                 prate *= 2;
 114                 cfg |= ATMEL_HLCDC_CLKSEL;
 115         }
 116
 117         div = DIV_ROUND_UP(prate, mode_rate);
 118         if (div < 2)
 119                 div = 2;
 120
 121         cfg |= ATMEL_HLCDC_CLKDIV(div);
 122
 123         regmap_update_bits(regmap, ATMEL_HLCDC_CFG(0),
 124                            ATMEL_HLCDC_CLKSEL | ATMEL_HLCDC_CLKDIV_MASK |
 125                            ATMEL_HLCDC_CLKPOL, cfg);
 126
 127         cfg = 0;
 128
 129         if (adj->flags & DRM_MODE_FLAG_NVSYNC)
 130                 cfg |= ATMEL_HLCDC_VSPOL;
 131
 132         if (adj->flags & DRM_MODE_FLAG_NHSYNC)
 133                 cfg |= ATMEL_HLCDC_HSPOL;
 134
 135         state = drm_crtc_state_to_atmel_hlcdc_crtc_state(c->state);
 136         cfg |= state->output_mode << 8;
 137
 138         regmap_update_bits(regmap, ATMEL_HLCDC_CFG(5),
 139                            ATMEL_HLCDC_HSPOL | ATMEL_HLCDC_VSPOL |
 140                            ATMEL_HLCDC_VSPDLYS | ATMEL_HLCDC_VSPDLYE |
 141                            ATMEL_HLCDC_DISPPOL | ATMEL_HLCDC_DISPDLY |
 142                            ATMEL_HLCDC_VSPSU | ATMEL_HLCDC_VSPHO |
 143                            ATMEL_HLCDC_GUARDTIME_MASK | ATMEL_HLCDC_MODE_MASK,
 144                            cfg);
 145
 146         clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
 147 }
 148
 149 static enum drm_mode_status
 150 atmel_hlcdc_crtc_mode_valid(struct drm_crtc *c,
 151                             const struct drm_display_mode *mode)
 152 {
 153         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 154
 155         return atmel_hlcdc_dc_mode_valid(crtc->dc, mode);
 156 }
 157
 158 static void atmel_hlcdc_crtc_atomic_disable(struct drm_crtc *c,
 159                                             struct drm_crtc_state *old_state)
 160 {
 161         struct drm_device *dev = c->dev;
 162         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 163         struct regmap *regmap = crtc->dc->hlcdc->regmap;
 164         unsigned int status;
 165
 166         drm_crtc_vblank_off(c);
 167
 168         pm_runtime_get_sync(dev->dev);
 169
 170         regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_DISP);
 171         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 172                (status & ATMEL_HLCDC_DISP))
 173                 cpu_relax();
 174
 175         regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_SYNC);
 176         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 177                (status & ATMEL_HLCDC_SYNC))
 178                 cpu_relax();
 179
 180         regmap_write(regmap, ATMEL_HLCDC_DIS, ATMEL_HLCDC_PIXEL_CLK);
 181         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 182                (status & ATMEL_HLCDC_PIXEL_CLK))
 183                 cpu_relax();
 184
 185         clk_disable_unprepare(crtc->dc->hlcdc->sys_clk);
 186         pinctrl_pm_select_sleep_state(dev->dev);
 187
 188         pm_runtime_allow(dev->dev);
 189
 190         pm_runtime_put_sync(dev->dev);
 191 }
 192
 193 static void atmel_hlcdc_crtc_atomic_enable(struct drm_crtc *c,
 194                                            struct drm_crtc_state *old_state)
 195 {
 196         struct drm_device *dev = c->dev;
 197         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 198         struct regmap *regmap = crtc->dc->hlcdc->regmap;
 199         unsigned int status;
 200
 201         pm_runtime_get_sync(dev->dev);
 202
 203         pm_runtime_forbid(dev->dev);
 204
 205         pinctrl_pm_select_default_state(dev->dev);
 206         clk_prepare_enable(crtc->dc->hlcdc->sys_clk);
 207
 208         regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_PIXEL_CLK);
 209         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 210                !(status & ATMEL_HLCDC_PIXEL_CLK))
 211                 cpu_relax();
 212
 213
 214         regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_SYNC);
 215         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 216                !(status & ATMEL_HLCDC_SYNC))
 217                 cpu_relax();
 218
 219         regmap_write(regmap, ATMEL_HLCDC_EN, ATMEL_HLCDC_DISP);
 220         while (!regmap_read(regmap, ATMEL_HLCDC_SR, &status) &&
 221                !(status & ATMEL_HLCDC_DISP))
 222                 cpu_relax();
 223
 224         pm_runtime_put_sync(dev->dev);
 225
 226         drm_crtc_vblank_on(c);
 227 }
 228
 229 #define ATMEL_HLCDC_RGB444_OUTPUT       BIT(0)
 230 #define ATMEL_HLCDC_RGB565_OUTPUT       BIT(1)
 231 #define ATMEL_HLCDC_RGB666_OUTPUT       BIT(2)
 232 #define ATMEL_HLCDC_RGB888_OUTPUT       BIT(3)
 233 #define ATMEL_HLCDC_OUTPUT_MODE_MASK    GENMASK(3, 0)
 234
 235 static int atmel_hlcdc_crtc_select_output_mode(struct drm_crtc_state *state)
 236 {
 237         unsigned int output_fmts = ATMEL_HLCDC_OUTPUT_MODE_MASK;
 238         struct atmel_hlcdc_crtc_state *hstate;
 239         struct drm_connector_state *cstate;
 240         struct drm_connector *connector;
 241         struct atmel_hlcdc_crtc *crtc;
 242         int i;
 243
 244         crtc = drm_crtc_to_atmel_hlcdc_crtc(state->crtc);
 245
 246         for_each_new_connector_in_state(state->state, connector, cstate, i) {
 247                 struct drm_display_info *info = &connector->display_info;
 248                 unsigned int supported_fmts = 0;
 249                 int j;
 250
 251                 if (!cstate->crtc)
 252                         continue;
 253
 254                 for (j = 0; j < info->num_bus_formats; j++) {
 255                         switch (info->bus_formats[j]) {
 256                         case MEDIA_BUS_FMT_RGB444_1X12:
 257                                 supported_fmts |= ATMEL_HLCDC_RGB444_OUTPUT;
 258                                 break;
 259                         case MEDIA_BUS_FMT_RGB565_1X16:
 260                                 supported_fmts |= ATMEL_HLCDC_RGB565_OUTPUT;
 261                                 break;
 262                         case MEDIA_BUS_FMT_RGB666_1X18:
 263                                 supported_fmts |= ATMEL_HLCDC_RGB666_OUTPUT;
 264                                 break;
 265                         case MEDIA_BUS_FMT_RGB888_1X24:
 266                                 supported_fmts |= ATMEL_HLCDC_RGB888_OUTPUT;
 267                                 break;
 268                         default:
 269                                 break;
 270                         }
 271                 }
 272
 273                 if (crtc->dc->desc->conflicting_output_formats)
 274                         output_fmts &= supported_fmts;
 275                 else
 276                         output_fmts |= supported_fmts;
 277         }
 278
 279         if (!output_fmts)
 280                 return -EINVAL;
 281
 282         hstate = drm_crtc_state_to_atmel_hlcdc_crtc_state(state);
 283         hstate->output_mode = fls(output_fmts) - 1;
 284
 285         return 0;
 286 }
 287
 288 static int atmel_hlcdc_crtc_atomic_check(struct drm_crtc *c,
 289                                          struct drm_crtc_state *s)
 290 {
 291         int ret;
 292
 293         ret = atmel_hlcdc_crtc_select_output_mode(s);
 294         if (ret)
 295                 return ret;
 296
 297         ret = atmel_hlcdc_plane_prepare_disc_area(s);
 298         if (ret)
 299                 return ret;
 300
 301         return atmel_hlcdc_plane_prepare_ahb_routing(s);
 302 }
 303
 304 static void atmel_hlcdc_crtc_atomic_begin(struct drm_crtc *c,
 305                                           struct drm_crtc_state *old_s)
 306 {
 307         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 308
 309         if (c->state->event) {
 310                 c->state->event->pipe = drm_crtc_index(c);
 311
 312                 WARN_ON(drm_crtc_vblank_get(c) != 0);
 313
 314                 crtc->event = c->state->event;
 315                 c->state->event = NULL;
 316         }
 317 }
 318
 319 static void atmel_hlcdc_crtc_atomic_flush(struct drm_crtc *crtc,
 320                                           struct drm_crtc_state *old_s)
 321 {
 322         /* TODO: write common plane control register if available */
 323 }
 324
 325 static const struct drm_crtc_helper_funcs lcdc_crtc_helper_funcs = {
 326         .mode_valid = atmel_hlcdc_crtc_mode_valid,
 327         .mode_set = drm_helper_crtc_mode_set,
 328         .mode_set_nofb = atmel_hlcdc_crtc_mode_set_nofb,
 329         .mode_set_base = drm_helper_crtc_mode_set_base,
 330         .atomic_check = atmel_hlcdc_crtc_atomic_check,
 331         .atomic_begin = atmel_hlcdc_crtc_atomic_begin,
 332         .atomic_flush = atmel_hlcdc_crtc_atomic_flush,
 333         .atomic_enable = atmel_hlcdc_crtc_atomic_enable,
 334         .atomic_disable = atmel_hlcdc_crtc_atomic_disable,
 335 };
 336
 337 static void atmel_hlcdc_crtc_destroy(struct drm_crtc *c)
 338 {
 339         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 340
 341         drm_crtc_cleanup(c);
 342         kfree(crtc);
 343 }
 344
 345 static void atmel_hlcdc_crtc_finish_page_flip(struct atmel_hlcdc_crtc *crtc)
 346 {
 347         struct drm_device *dev = crtc->base.dev;
 348         unsigned long flags;
 349
 350         spin_lock_irqsave(&dev->event_lock, flags);
 351         if (crtc->event) {
 352                 drm_crtc_send_vblank_event(&crtc->base, crtc->event);
 353                 drm_crtc_vblank_put(&crtc->base);
 354                 crtc->event = NULL;
 355         }
 356         spin_unlock_irqrestore(&dev->event_lock, flags);
 357 }
 358
 359 void atmel_hlcdc_crtc_irq(struct drm_crtc *c)
 360 {
 361         drm_crtc_handle_vblank(c);
 362         atmel_hlcdc_crtc_finish_page_flip(drm_crtc_to_atmel_hlcdc_crtc(c));
 363 }
 364
 365 static void atmel_hlcdc_crtc_reset(struct drm_crtc *crtc)
 366 {
 367         struct atmel_hlcdc_crtc_state *state;
 368
 369         if (crtc->state) {
 370                 __drm_atomic_helper_crtc_destroy_state(crtc->state);
 371                 state = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
 372                 kfree(state);
 373                 crtc->state = NULL;
 374         }
 375
 376         state = kzalloc(sizeof(*state), GFP_KERNEL);
 377         if (state) {
 378                 crtc->state = &state->base;
 379                 crtc->state->crtc = crtc;
 380         }
 381 }
 382
 383 static struct drm_crtc_state *
 384 atmel_hlcdc_crtc_duplicate_state(struct drm_crtc *crtc)
 385 {
 386         struct atmel_hlcdc_crtc_state *state, *cur;
 387
 388         if (WARN_ON(!crtc->state))
 389                 return NULL;
 390
 391         state = kmalloc(sizeof(*state), GFP_KERNEL);
 392         if (!state)
 393                 return NULL;
 394         __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base);
 395
 396         cur = drm_crtc_state_to_atmel_hlcdc_crtc_state(crtc->state);
 397         state->output_mode = cur->output_mode;
 398
 399         return &state->base;
 400 }
 401
 402 static void atmel_hlcdc_crtc_destroy_state(struct drm_crtc *crtc,
 403                                            struct drm_crtc_state *s)
 404 {
 405         struct atmel_hlcdc_crtc_state *state;
 406
 407         state = drm_crtc_state_to_atmel_hlcdc_crtc_state(s);
 408         __drm_atomic_helper_crtc_destroy_state(s);
 409         kfree(state);
 410 }
 411
 412 static int atmel_hlcdc_crtc_enable_vblank(struct drm_crtc *c)
 413 {
 414         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 415         struct regmap *regmap = crtc->dc->hlcdc->regmap;
 416
 417         /* Enable SOF (Start Of Frame) interrupt for vblank counting */
 418         regmap_write(regmap, ATMEL_HLCDC_IER, ATMEL_HLCDC_SOF);
 419
 420         return 0;
 421 }
 422
 423 static void atmel_hlcdc_crtc_disable_vblank(struct drm_crtc *c)
 424 {
 425         struct atmel_hlcdc_crtc *crtc = drm_crtc_to_atmel_hlcdc_crtc(c);
 426         struct regmap *regmap = crtc->dc->hlcdc->regmap;
 427
 428         regmap_write(regmap, ATMEL_HLCDC_IDR, ATMEL_HLCDC_SOF);
 429 }
 430
 431 static const struct drm_crtc_funcs atmel_hlcdc_crtc_funcs = {
 432         .page_flip = drm_atomic_helper_page_flip,
 433         .set_config = drm_atomic_helper_set_config,
 434         .destroy = atmel_hlcdc_crtc_destroy,
 435         .reset = atmel_hlcdc_crtc_reset,
 436         .atomic_duplicate_state =  atmel_hlcdc_crtc_duplicate_state,
 437         .atomic_destroy_state = atmel_hlcdc_crtc_destroy_state,
 438         .enable_vblank = atmel_hlcdc_crtc_enable_vblank,
 439         .disable_vblank = atmel_hlcdc_crtc_disable_vblank,
 440         .gamma_set = drm_atomic_helper_legacy_gamma_set,
 441 };
 442
 443 int atmel_hlcdc_crtc_create(struct drm_device *dev)
 444 {
 445         struct atmel_hlcdc_plane *primary = NULL, *cursor = NULL;
 446         struct atmel_hlcdc_dc *dc = dev->dev_private;
 447         struct atmel_hlcdc_crtc *crtc;
 448         int ret;
 449         int i;
 450
 451         crtc = kzalloc(sizeof(*crtc), GFP_KERNEL);
 452         if (!crtc)
 453                 return -ENOMEM;
 454
 455         crtc->dc = dc;
 456
 457         for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
 458                 if (!dc->layers[i])
 459                         continue;
 460
 461                 switch (dc->layers[i]->desc->type) {
 462                 case ATMEL_HLCDC_BASE_LAYER:
 463                         primary = atmel_hlcdc_layer_to_plane(dc->layers[i]);
 464                         break;
 465
 466                 case ATMEL_HLCDC_CURSOR_LAYER:
 467                         cursor = atmel_hlcdc_layer_to_plane(dc->layers[i]);
 468                         break;
 469
 470                 default:
 471                         break;
 472                 }
 473         }
 474
 475         ret = drm_crtc_init_with_planes(dev, &crtc->base, &primary->base,
 476                                         &cursor->base, &atmel_hlcdc_crtc_funcs,
 477                                         NULL);
 478         if (ret < 0)
 479                 goto fail;
 480
 481         crtc->id = drm_crtc_index(&crtc->base);
 482
 483         for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
 484                 struct atmel_hlcdc_plane *overlay;
 485
 486                 if (dc->layers[i] &&
 487                     dc->layers[i]->desc->type == ATMEL_HLCDC_OVERLAY_LAYER) {
 488                         overlay = atmel_hlcdc_layer_to_plane(dc->layers[i]);
 489                         overlay->base.possible_crtcs = 1 << crtc->id;
 490                 }
 491         }
 492
 493         drm_crtc_helper_add(&crtc->base, &lcdc_crtc_helper_funcs);
 494         drm_crtc_vblank_reset(&crtc->base);
 495
 496         drm_mode_crtc_set_gamma_size(&crtc->base, ATMEL_HLCDC_CLUT_SIZE);
 497         drm_crtc_enable_color_mgmt(&crtc->base, 0, false,
 498                                    ATMEL_HLCDC_CLUT_SIZE);
 499
 500         dc->crtc = &crtc->base;
 501
 502         return 0;
 503
 504 fail:
 505         atmel_hlcdc_crtc_destroy(&crtc->base);
 506         return ret;
 507 }