GNU Linux-libre 4.14.324-gnu1
[releases.git] / drivers / gpu / drm / amd / scheduler / sched_fence.c
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  *
23  */
24 #include <linux/kthread.h>
25 #include <linux/wait.h>
26 #include <linux/sched.h>
27 #include <drm/drmP.h>
28 #include "gpu_scheduler.h"
29
30 static struct kmem_cache *sched_fence_slab;
31
32 int amd_sched_fence_slab_init(void)
33 {
34         sched_fence_slab = kmem_cache_create(
35                 "amd_sched_fence", sizeof(struct amd_sched_fence), 0,
36                 SLAB_HWCACHE_ALIGN, NULL);
37         if (!sched_fence_slab)
38                 return -ENOMEM;
39
40         return 0;
41 }
42
43 void amd_sched_fence_slab_fini(void)
44 {
45         rcu_barrier();
46         kmem_cache_destroy(sched_fence_slab);
47 }
48
49 struct amd_sched_fence *amd_sched_fence_create(struct amd_sched_entity *entity,
50                                                void *owner)
51 {
52         struct amd_sched_fence *fence = NULL;
53         unsigned seq;
54
55         fence = kmem_cache_zalloc(sched_fence_slab, GFP_KERNEL);
56         if (fence == NULL)
57                 return NULL;
58
59         fence->owner = owner;
60         fence->sched = entity->sched;
61         spin_lock_init(&fence->lock);
62
63         seq = atomic_inc_return(&entity->fence_seq);
64         dma_fence_init(&fence->scheduled, &amd_sched_fence_ops_scheduled,
65                        &fence->lock, entity->fence_context, seq);
66         dma_fence_init(&fence->finished, &amd_sched_fence_ops_finished,
67                        &fence->lock, entity->fence_context + 1, seq);
68
69         return fence;
70 }
71
72 void amd_sched_fence_scheduled(struct amd_sched_fence *fence)
73 {
74         int ret = dma_fence_signal(&fence->scheduled);
75
76         if (!ret)
77                 DMA_FENCE_TRACE(&fence->scheduled,
78                                 "signaled from irq context\n");
79         else
80                 DMA_FENCE_TRACE(&fence->scheduled,
81                                 "was already signaled\n");
82 }
83
84 void amd_sched_fence_finished(struct amd_sched_fence *fence)
85 {
86         int ret = dma_fence_signal(&fence->finished);
87
88         if (!ret)
89                 DMA_FENCE_TRACE(&fence->finished,
90                                 "signaled from irq context\n");
91         else
92                 DMA_FENCE_TRACE(&fence->finished,
93                                 "was already signaled\n");
94 }
95
96 static const char *amd_sched_fence_get_driver_name(struct dma_fence *fence)
97 {
98         return "amd_sched";
99 }
100
101 static const char *amd_sched_fence_get_timeline_name(struct dma_fence *f)
102 {
103         struct amd_sched_fence *fence = to_amd_sched_fence(f);
104         return (const char *)fence->sched->name;
105 }
106
107 static bool amd_sched_fence_enable_signaling(struct dma_fence *f)
108 {
109         return true;
110 }
111
112 /**
113  * amd_sched_fence_free - free up the fence memory
114  *
115  * @rcu: RCU callback head
116  *
117  * Free up the fence memory after the RCU grace period.
118  */
119 static void amd_sched_fence_free(struct rcu_head *rcu)
120 {
121         struct dma_fence *f = container_of(rcu, struct dma_fence, rcu);
122         struct amd_sched_fence *fence = to_amd_sched_fence(f);
123
124         dma_fence_put(fence->parent);
125         kmem_cache_free(sched_fence_slab, fence);
126 }
127
128 /**
129  * amd_sched_fence_release_scheduled - callback that fence can be freed
130  *
131  * @fence: fence
132  *
133  * This function is called when the reference count becomes zero.
134  * It just RCU schedules freeing up the fence.
135  */
136 static void amd_sched_fence_release_scheduled(struct dma_fence *f)
137 {
138         struct amd_sched_fence *fence = to_amd_sched_fence(f);
139
140         call_rcu(&fence->finished.rcu, amd_sched_fence_free);
141 }
142
143 /**
144  * amd_sched_fence_release_finished - drop extra reference
145  *
146  * @f: fence
147  *
148  * Drop the extra reference from the scheduled fence to the base fence.
149  */
150 static void amd_sched_fence_release_finished(struct dma_fence *f)
151 {
152         struct amd_sched_fence *fence = to_amd_sched_fence(f);
153
154         dma_fence_put(&fence->scheduled);
155 }
156
157 const struct dma_fence_ops amd_sched_fence_ops_scheduled = {
158         .get_driver_name = amd_sched_fence_get_driver_name,
159         .get_timeline_name = amd_sched_fence_get_timeline_name,
160         .enable_signaling = amd_sched_fence_enable_signaling,
161         .signaled = NULL,
162         .wait = dma_fence_default_wait,
163         .release = amd_sched_fence_release_scheduled,
164 };
165
166 const struct dma_fence_ops amd_sched_fence_ops_finished = {
167         .get_driver_name = amd_sched_fence_get_driver_name,
168         .get_timeline_name = amd_sched_fence_get_timeline_name,
169         .enable_signaling = amd_sched_fence_enable_signaling,
170         .signaled = NULL,
171         .wait = dma_fence_default_wait,
172         .release = amd_sched_fence_release_finished,
173 };