2 * Copyright 2015 Advanced Micro Devices, Inc.
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5 * copy of this software and associated documentation files (the "Software"),
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24 #ifndef _CZ_CLOCK_POWER_GATING_H_
25 #define _CZ_CLOCK_POWER_GATING_H_
28 #include "pp_asicblocks.h"
30 extern int cz_phm_set_asic_block_gating(struct pp_hwmgr *hwmgr, enum PHM_AsicBlock block, enum PHM_ClockGateSetting gating);
31 extern const struct phm_master_table_header cz_phm_enable_clock_power_gatings_master;
32 extern int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate);
33 extern int cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate);
34 extern int cz_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable);
35 extern int cz_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable);
36 #endif /* _CZ_CLOCK_POWER_GATING_H_ */