2 * Copyright (C) 2017 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 #ifndef _mmhub_9_1_DEFAULT_HEADER
22 #define _mmhub_9_1_DEFAULT_HEADER
25 // addressBlock: mmhub_dagbdec
26 #define mmDAGB0_RDCLI0_DEFAULT 0xfe5fe0f9
27 #define mmDAGB0_RDCLI1_DEFAULT 0xfe5fe0f9
28 #define mmDAGB0_RDCLI2_DEFAULT 0xfe5fe0f9
29 #define mmDAGB0_RDCLI3_DEFAULT 0xfe5fe0f9
30 #define mmDAGB0_RDCLI4_DEFAULT 0xfe5fe0f9
31 #define mmDAGB0_RDCLI5_DEFAULT 0xfe5fe0f9
32 #define mmDAGB0_RDCLI6_DEFAULT 0xfe5fe0f9
33 #define mmDAGB0_RDCLI7_DEFAULT 0xfe5fe0f9
34 #define mmDAGB0_RDCLI8_DEFAULT 0xfe5fe0f9
35 #define mmDAGB0_RDCLI9_DEFAULT 0xfe5fe0f9
36 #define mmDAGB0_RDCLI10_DEFAULT 0xfe5fe0f9
37 #define mmDAGB0_RDCLI11_DEFAULT 0xfe5fe0f9
38 #define mmDAGB0_RDCLI12_DEFAULT 0xfe5fe0f9
39 #define mmDAGB0_RDCLI13_DEFAULT 0xfe5fe0f9
40 #define mmDAGB0_RDCLI14_DEFAULT 0xfe5fe0f9
41 #define mmDAGB0_RDCLI15_DEFAULT 0xfe5fe0f9
42 #define mmDAGB0_RDCLI16_DEFAULT 0xfe5fe0f9
43 #define mmDAGB0_RDCLI17_DEFAULT 0xfe5fe0f9
44 #define mmDAGB0_RDCLI18_DEFAULT 0xfe5fe0f9
45 #define mmDAGB0_RDCLI19_DEFAULT 0xfe5fe0f9
46 #define mmDAGB0_RDCLI20_DEFAULT 0xfe5fe0f9
47 #define mmDAGB0_RDCLI21_DEFAULT 0xfe5fe0f9
48 #define mmDAGB0_RDCLI22_DEFAULT 0xfe5fe0f9
49 #define mmDAGB0_RDCLI23_DEFAULT 0xfe5fe0f9
50 #define mmDAGB0_RDCLI24_DEFAULT 0xfe5fe0f9
51 #define mmDAGB0_RDCLI25_DEFAULT 0xfe5fe0f9
52 #define mmDAGB0_RDCLI26_DEFAULT 0xfe5fe0f9
53 #define mmDAGB0_RDCLI27_DEFAULT 0xfe5fe0f9
54 #define mmDAGB0_RDCLI28_DEFAULT 0xfe5fe0f9
55 #define mmDAGB0_RDCLI29_DEFAULT 0xfe5fe0f9
56 #define mmDAGB0_RDCLI30_DEFAULT 0xfe5fe0f9
57 #define mmDAGB0_RDCLI31_DEFAULT 0xfe5fe0f9
58 #define mmDAGB0_RD_CNTL_DEFAULT 0x03527df8
59 #define mmDAGB0_RD_GMI_CNTL_DEFAULT 0x0000304f
60 #define mmDAGB0_RD_ADDR_DAGB_DEFAULT 0x00000039
61 #define mmDAGB0_RD_OUTPUT_DAGB_MAX_BURST_DEFAULT 0x88888888
62 #define mmDAGB0_RD_OUTPUT_DAGB_LAZY_TIMER_DEFAULT 0x11111111
63 #define mmDAGB0_RD_CGTT_CLK_CTRL_DEFAULT 0x00000100
64 #define mmDAGB0_L1TLB_RD_CGTT_CLK_CTRL_DEFAULT 0x00000100
65 #define mmDAGB0_ATCVM_RD_CGTT_CLK_CTRL_DEFAULT 0x00000100
66 #define mmDAGB0_RD_ADDR_DAGB_MAX_BURST0_DEFAULT 0x88888888
67 #define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER0_DEFAULT 0x11111111
68 #define mmDAGB0_RD_ADDR_DAGB_MAX_BURST1_DEFAULT 0x88888888
69 #define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER1_DEFAULT 0x11111111
70 #define mmDAGB0_RD_ADDR_DAGB_MAX_BURST2_DEFAULT 0x88888888
71 #define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER2_DEFAULT 0x11111111
72 #define mmDAGB0_RD_ADDR_DAGB_MAX_BURST3_DEFAULT 0x88888888
73 #define mmDAGB0_RD_ADDR_DAGB_LAZY_TIMER3_DEFAULT 0x11111111
74 #define mmDAGB0_RD_VC0_CNTL_DEFAULT 0xff2ff082
75 #define mmDAGB0_RD_VC1_CNTL_DEFAULT 0xff2ff082
76 #define mmDAGB0_RD_VC2_CNTL_DEFAULT 0xff2ff082
77 #define mmDAGB0_RD_VC3_CNTL_DEFAULT 0xff2ff082
78 #define mmDAGB0_RD_VC4_CNTL_DEFAULT 0xff2ff082
79 #define mmDAGB0_RD_VC5_CNTL_DEFAULT 0xff2ff082
80 #define mmDAGB0_RD_VC6_CNTL_DEFAULT 0xff2ff082
81 #define mmDAGB0_RD_VC7_CNTL_DEFAULT 0xff2ff082
82 #define mmDAGB0_RD_CNTL_MISC_DEFAULT 0x01a10408
83 #define mmDAGB0_RD_TLB_CREDIT_DEFAULT 0x2f7bdef7
84 #define mmDAGB0_RDCLI_ASK_PENDING_DEFAULT 0x00000000
85 #define mmDAGB0_RDCLI_GO_PENDING_DEFAULT 0x00000000
86 #define mmDAGB0_RDCLI_GBLSEND_PENDING_DEFAULT 0x00000000
87 #define mmDAGB0_RDCLI_TLB_PENDING_DEFAULT 0x00000000
88 #define mmDAGB0_RDCLI_OARB_PENDING_DEFAULT 0x00000000
89 #define mmDAGB0_RDCLI_OSD_PENDING_DEFAULT 0x00000000
90 #define mmDAGB0_WRCLI0_DEFAULT 0xfe5fe0f9
91 #define mmDAGB0_WRCLI1_DEFAULT 0xfe5fe0f9
92 #define mmDAGB0_WRCLI2_DEFAULT 0xfe5fe0f9
93 #define mmDAGB0_WRCLI3_DEFAULT 0xfe5fe0f9
94 #define mmDAGB0_WRCLI4_DEFAULT 0xfe5fe0f9
95 #define mmDAGB0_WRCLI5_DEFAULT 0xfe5fe0f9
96 #define mmDAGB0_WRCLI6_DEFAULT 0xfe5fe0f9
97 #define mmDAGB0_WRCLI7_DEFAULT 0xfe5fe0f9
98 #define mmDAGB0_WRCLI8_DEFAULT 0xfe5fe0f9
99 #define mmDAGB0_WRCLI9_DEFAULT 0xfe5fe0f9
100 #define mmDAGB0_WRCLI10_DEFAULT 0xfe5fe0f9
101 #define mmDAGB0_WRCLI11_DEFAULT 0xfe5fe0f9
102 #define mmDAGB0_WRCLI12_DEFAULT 0xfe5fe0f9
103 #define mmDAGB0_WRCLI13_DEFAULT 0xfe5fe0f9
104 #define mmDAGB0_WRCLI14_DEFAULT 0xfe5fe0f9
105 #define mmDAGB0_WRCLI15_DEFAULT 0xfe5fe0f9
106 #define mmDAGB0_WRCLI16_DEFAULT 0xfe5fe0f9
107 #define mmDAGB0_WRCLI17_DEFAULT 0xfe5fe0f9
108 #define mmDAGB0_WRCLI18_DEFAULT 0xfe5fe0f9
109 #define mmDAGB0_WRCLI19_DEFAULT 0xfe5fe0f9
110 #define mmDAGB0_WRCLI20_DEFAULT 0xfe5fe0f9
111 #define mmDAGB0_WRCLI21_DEFAULT 0xfe5fe0f9
112 #define mmDAGB0_WRCLI22_DEFAULT 0xfe5fe0f9
113 #define mmDAGB0_WRCLI23_DEFAULT 0xfe5fe0f9
114 #define mmDAGB0_WRCLI24_DEFAULT 0xfe5fe0f9
115 #define mmDAGB0_WRCLI25_DEFAULT 0xfe5fe0f9
116 #define mmDAGB0_WRCLI26_DEFAULT 0xfe5fe0f9
117 #define mmDAGB0_WRCLI27_DEFAULT 0xfe5fe0f9
118 #define mmDAGB0_WRCLI28_DEFAULT 0xfe5fe0f9
119 #define mmDAGB0_WRCLI29_DEFAULT 0xfe5fe0f9
120 #define mmDAGB0_WRCLI30_DEFAULT 0xfe5fe0f9
121 #define mmDAGB0_WRCLI31_DEFAULT 0xfe5fe0f9
122 #define mmDAGB0_WR_CNTL_DEFAULT 0x03527df8
123 #define mmDAGB0_WR_GMI_CNTL_DEFAULT 0x0000304f
124 #define mmDAGB0_WR_ADDR_DAGB_DEFAULT 0x00000039
125 #define mmDAGB0_WR_OUTPUT_DAGB_MAX_BURST_DEFAULT 0x88888888
126 #define mmDAGB0_WR_OUTPUT_DAGB_LAZY_TIMER_DEFAULT 0x11111111
127 #define mmDAGB0_WR_CGTT_CLK_CTRL_DEFAULT 0x00000100
128 #define mmDAGB0_L1TLB_WR_CGTT_CLK_CTRL_DEFAULT 0x00000100
129 #define mmDAGB0_ATCVM_WR_CGTT_CLK_CTRL_DEFAULT 0x00000100
130 #define mmDAGB0_WR_ADDR_DAGB_MAX_BURST0_DEFAULT 0x88888888
131 #define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER0_DEFAULT 0x11111111
132 #define mmDAGB0_WR_ADDR_DAGB_MAX_BURST1_DEFAULT 0x88888888
133 #define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER1_DEFAULT 0x11111111
134 #define mmDAGB0_WR_ADDR_DAGB_MAX_BURST2_DEFAULT 0x88888888
135 #define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER2_DEFAULT 0x11111111
136 #define mmDAGB0_WR_ADDR_DAGB_MAX_BURST3_DEFAULT 0x88888888
137 #define mmDAGB0_WR_ADDR_DAGB_LAZY_TIMER3_DEFAULT 0x11111111
138 #define mmDAGB0_WR_DATA_DAGB_DEFAULT 0x00000001
139 #define mmDAGB0_WR_DATA_DAGB_MAX_BURST0_DEFAULT 0x11111111
140 #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER0_DEFAULT 0x00000000
141 #define mmDAGB0_WR_DATA_DAGB_MAX_BURST1_DEFAULT 0x11111111
142 #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER1_DEFAULT 0x00000000
143 #define mmDAGB0_WR_DATA_DAGB_MAX_BURST2_DEFAULT 0x11111111
144 #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER2_DEFAULT 0x00000000
145 #define mmDAGB0_WR_DATA_DAGB_MAX_BURST3_DEFAULT 0x11111111
146 #define mmDAGB0_WR_DATA_DAGB_LAZY_TIMER3_DEFAULT 0x00000000
147 #define mmDAGB0_WR_VC0_CNTL_DEFAULT 0xff2ff082
148 #define mmDAGB0_WR_VC1_CNTL_DEFAULT 0xff2ff082
149 #define mmDAGB0_WR_VC2_CNTL_DEFAULT 0xff2ff082
150 #define mmDAGB0_WR_VC3_CNTL_DEFAULT 0xff2ff082
151 #define mmDAGB0_WR_VC4_CNTL_DEFAULT 0xff2ff082
152 #define mmDAGB0_WR_VC5_CNTL_DEFAULT 0xff2ff082
153 #define mmDAGB0_WR_VC6_CNTL_DEFAULT 0xff2ff082
154 #define mmDAGB0_WR_VC7_CNTL_DEFAULT 0xff2ff082
155 #define mmDAGB0_WR_CNTL_MISC_DEFAULT 0x01a10408
156 #define mmDAGB0_WR_TLB_CREDIT_DEFAULT 0x2f7bdef7
157 #define mmDAGB0_WR_DATA_CREDIT_DEFAULT 0x5c626870
158 #define mmDAGB0_WR_MISC_CREDIT_DEFAULT 0x0078dc88
159 #define mmDAGB0_WRCLI_ASK_PENDING_DEFAULT 0x00000000
160 #define mmDAGB0_WRCLI_GO_PENDING_DEFAULT 0x00000000
161 #define mmDAGB0_WRCLI_GBLSEND_PENDING_DEFAULT 0x00000000
162 #define mmDAGB0_WRCLI_TLB_PENDING_DEFAULT 0x00000000
163 #define mmDAGB0_WRCLI_OARB_PENDING_DEFAULT 0x00000000
164 #define mmDAGB0_WRCLI_OSD_PENDING_DEFAULT 0x00000000
165 #define mmDAGB0_WRCLI_DBUS_ASK_PENDING_DEFAULT 0x00000000
166 #define mmDAGB0_WRCLI_DBUS_GO_PENDING_DEFAULT 0x00000000
167 #define mmDAGB0_DAGB_DLY_DEFAULT 0x00000000
168 #define mmDAGB0_CNTL_MISC_DEFAULT 0xcf7c1ffa
169 #define mmDAGB0_CNTL_MISC2_DEFAULT 0x00000000
170 #define mmDAGB0_FIFO_EMPTY_DEFAULT 0x00ffffff
171 #define mmDAGB0_FIFO_FULL_DEFAULT 0x00000000
172 #define mmDAGB0_WR_CREDITS_FULL_DEFAULT 0x0007ffff
173 #define mmDAGB0_RD_CREDITS_FULL_DEFAULT 0x0003ffff
174 #define mmDAGB0_PERFCOUNTER_LO_DEFAULT 0x00000000
175 #define mmDAGB0_PERFCOUNTER_HI_DEFAULT 0x00000000
176 #define mmDAGB0_PERFCOUNTER0_CFG_DEFAULT 0x00000000
177 #define mmDAGB0_PERFCOUNTER1_CFG_DEFAULT 0x00000000
178 #define mmDAGB0_PERFCOUNTER2_CFG_DEFAULT 0x00000000
179 #define mmDAGB0_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000
180 #define mmDAGB0_RESERVE0_DEFAULT 0x00000000
181 #define mmDAGB0_RESERVE1_DEFAULT 0x00000000
182 #define mmDAGB0_RESERVE2_DEFAULT 0x00000000
183 #define mmDAGB0_RESERVE3_DEFAULT 0x00000000
184 #define mmDAGB0_RESERVE4_DEFAULT 0x00000000
185 #define mmDAGB0_RESERVE5_DEFAULT 0x00000000
186 #define mmDAGB0_RESERVE6_DEFAULT 0x00000000
187 #define mmDAGB0_RESERVE7_DEFAULT 0x00000000
188 #define mmDAGB0_RESERVE8_DEFAULT 0x00000000
189 #define mmDAGB0_RESERVE9_DEFAULT 0x00000000
190 #define mmDAGB0_RESERVE10_DEFAULT 0x00000000
191 #define mmDAGB0_RESERVE11_DEFAULT 0x00000000
192 #define mmDAGB0_RESERVE12_DEFAULT 0x00000000
193 #define mmDAGB0_RESERVE13_DEFAULT 0x00000000
194 #define mmDAGB0_RESERVE14_DEFAULT 0x00000000
195 #define mmDAGB0_RESERVE15_DEFAULT 0x00000000
196 #define mmDAGB0_RESERVE16_DEFAULT 0x00000000
197 #define mmDAGB0_RESERVE17_DEFAULT 0x00000000
198 #define mmDAGB0_RESERVE18_DEFAULT 0x00000000
199 #define mmDAGB0_RESERVE19_DEFAULT 0x00000000
200 #define mmDAGB0_RESERVE20_DEFAULT 0x00000000
201 #define mmDAGB0_RESERVE21_DEFAULT 0x00000000
202 #define mmDAGB0_RESERVE22_DEFAULT 0x00000000
203 #define mmDAGB0_RESERVE23_DEFAULT 0x00000000
204 #define mmDAGB0_RESERVE24_DEFAULT 0x00000000
205 #define mmDAGB0_RESERVE25_DEFAULT 0x00000000
206 #define mmDAGB0_RESERVE26_DEFAULT 0x00000000
207 #define mmDAGB0_RESERVE27_DEFAULT 0x00000000
208 #define mmDAGB0_RESERVE28_DEFAULT 0x00000000
209 #define mmDAGB0_RESERVE29_DEFAULT 0x00000000
210 #define mmDAGB0_RESERVE30_DEFAULT 0x00000000
211 #define mmDAGB0_RESERVE31_DEFAULT 0x00000000
212 #define mmDAGB0_RESERVE32_DEFAULT 0x00000000
213 #define mmDAGB0_RESERVE33_DEFAULT 0x00000000
214 #define mmDAGB0_RESERVE34_DEFAULT 0x00000000
215 #define mmDAGB0_RESERVE35_DEFAULT 0x00000000
216 #define mmDAGB0_RESERVE36_DEFAULT 0x00000000
217 #define mmDAGB0_RESERVE37_DEFAULT 0x00000000
218 #define mmDAGB0_RESERVE38_DEFAULT 0x00000000
219 #define mmDAGB0_RESERVE39_DEFAULT 0x00000000
220 #define mmDAGB0_RESERVE40_DEFAULT 0x00000000
221 #define mmDAGB0_RESERVE41_DEFAULT 0x00000000
222 #define mmDAGB0_RESERVE42_DEFAULT 0x00000000
223 #define mmDAGB0_RESERVE43_DEFAULT 0x00000000
224 #define mmDAGB0_RESERVE44_DEFAULT 0x00000000
225 #define mmDAGB0_RESERVE45_DEFAULT 0x00000000
226 #define mmDAGB0_RESERVE46_DEFAULT 0x00000000
227 #define mmDAGB0_RESERVE47_DEFAULT 0x00000000
228 #define mmDAGB0_RESERVE48_DEFAULT 0x00000000
229 #define mmDAGB0_RESERVE49_DEFAULT 0x00000000
230 #define mmDAGB0_RESERVE50_DEFAULT 0x00000000
231 #define mmDAGB0_RESERVE51_DEFAULT 0x00000000
232 #define mmDAGB0_RESERVE52_DEFAULT 0x00000000
233 #define mmDAGB0_RESERVE53_DEFAULT 0x00000000
234 #define mmDAGB0_RESERVE54_DEFAULT 0x00000000
235 #define mmDAGB0_RESERVE55_DEFAULT 0x00000000
236 #define mmDAGB0_RESERVE56_DEFAULT 0x00000000
237 #define mmDAGB0_RESERVE57_DEFAULT 0x00000000
238 #define mmDAGB0_RESERVE58_DEFAULT 0x00000000
239 #define mmDAGB0_RESERVE59_DEFAULT 0x00000000
240 #define mmDAGB0_RESERVE60_DEFAULT 0x00000000
241 #define mmDAGB0_RESERVE61_DEFAULT 0x00000000
242 #define mmDAGB0_RESERVE62_DEFAULT 0x00000000
243 #define mmDAGB0_RESERVE63_DEFAULT 0x00000000
244 #define mmDAGB0_RESERVE64_DEFAULT 0x00000000
245 #define mmDAGB0_RESERVE65_DEFAULT 0x00000000
246 #define mmDAGB0_RESERVE66_DEFAULT 0x00000000
247 #define mmDAGB0_RESERVE67_DEFAULT 0x00000000
248 #define mmDAGB0_RESERVE68_DEFAULT 0x00000000
249 #define mmDAGB0_RESERVE69_DEFAULT 0x00000000
250 #define mmDAGB0_RESERVE70_DEFAULT 0x00000000
251 #define mmDAGB0_RESERVE71_DEFAULT 0x00000000
252 #define mmDAGB0_RESERVE72_DEFAULT 0x00000000
253 #define mmDAGB0_RESERVE73_DEFAULT 0x00000000
254 #define mmDAGB0_RESERVE74_DEFAULT 0x00000000
255 #define mmDAGB0_RESERVE75_DEFAULT 0x00000000
256 #define mmDAGB0_RESERVE76_DEFAULT 0x00000000
257 #define mmDAGB0_RESERVE77_DEFAULT 0x00000000
258 #define mmDAGB0_RESERVE78_DEFAULT 0x00000000
259 #define mmDAGB0_RESERVE79_DEFAULT 0x00000000
260 #define mmDAGB0_RESERVE80_DEFAULT 0x00000000
261 #define mmDAGB0_RESERVE81_DEFAULT 0x00000000
262 #define mmDAGB0_RESERVE82_DEFAULT 0x00000000
263 #define mmDAGB0_RESERVE83_DEFAULT 0x00000000
264 #define mmDAGB0_RESERVE84_DEFAULT 0x00000000
265 #define mmDAGB0_RESERVE85_DEFAULT 0x00000000
266 #define mmDAGB0_RESERVE86_DEFAULT 0x00000000
267 #define mmDAGB0_RESERVE87_DEFAULT 0x00000000
268 #define mmDAGB0_RESERVE88_DEFAULT 0x00000000
269 #define mmDAGB0_RESERVE89_DEFAULT 0x00000000
270 #define mmDAGB0_RESERVE90_DEFAULT 0x00000000
271 #define mmDAGB0_RESERVE91_DEFAULT 0x00000000
272 #define mmDAGB0_RESERVE92_DEFAULT 0x00000000
273 #define mmDAGB0_RESERVE93_DEFAULT 0x00000000
274 #define mmDAGB0_RESERVE94_DEFAULT 0x00000000
275 #define mmDAGB0_RESERVE95_DEFAULT 0x00000000
276 #define mmDAGB0_RESERVE96_DEFAULT 0x00000000
277 #define mmDAGB0_RESERVE97_DEFAULT 0x00000000
278 #define mmDAGB0_RESERVE98_DEFAULT 0x00000000
279 #define mmDAGB0_RESERVE99_DEFAULT 0x00000000
280 #define mmDAGB0_RESERVE100_DEFAULT 0x00000000
281 #define mmDAGB0_RESERVE101_DEFAULT 0x00000000
284 // addressBlock: mmhub_ea_mmeadec
285 #define mmMMEA0_DRAM_RD_CLI2GRP_MAP0_DEFAULT 0x55555555
286 #define mmMMEA0_DRAM_RD_CLI2GRP_MAP1_DEFAULT 0x55555555
287 #define mmMMEA0_DRAM_WR_CLI2GRP_MAP0_DEFAULT 0x55555555
288 #define mmMMEA0_DRAM_WR_CLI2GRP_MAP1_DEFAULT 0x55555555
289 #define mmMMEA0_DRAM_RD_GRP2VC_MAP_DEFAULT 0x00000e25
290 #define mmMMEA0_DRAM_WR_GRP2VC_MAP_DEFAULT 0x00000e25
291 #define mmMMEA0_DRAM_RD_LAZY_DEFAULT 0x00000924
292 #define mmMMEA0_DRAM_WR_LAZY_DEFAULT 0x00000924
293 #define mmMMEA0_DRAM_RD_CAM_CNTL_DEFAULT 0x06db3333
294 #define mmMMEA0_DRAM_WR_CAM_CNTL_DEFAULT 0x06db3333
295 #define mmMMEA0_DRAM_PAGE_BURST_DEFAULT 0x20002000
296 #define mmMMEA0_DRAM_RD_PRI_AGE_DEFAULT 0x00db6249
297 #define mmMMEA0_DRAM_WR_PRI_AGE_DEFAULT 0x00db6249
298 #define mmMMEA0_DRAM_RD_PRI_QUEUING_DEFAULT 0x00000db6
299 #define mmMMEA0_DRAM_WR_PRI_QUEUING_DEFAULT 0x00000db6
300 #define mmMMEA0_DRAM_RD_PRI_FIXED_DEFAULT 0x00000924
301 #define mmMMEA0_DRAM_WR_PRI_FIXED_DEFAULT 0x00000924
302 #define mmMMEA0_DRAM_RD_PRI_URGENCY_DEFAULT 0x0000fdb6
303 #define mmMMEA0_DRAM_WR_PRI_URGENCY_DEFAULT 0x0000fdb6
304 #define mmMMEA0_DRAM_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f
305 #define mmMMEA0_DRAM_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f
306 #define mmMMEA0_DRAM_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff
307 #define mmMMEA0_DRAM_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f
308 #define mmMMEA0_DRAM_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f
309 #define mmMMEA0_DRAM_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff
310 #define mmMMEA0_ADDRNORM_BASE_ADDR0_DEFAULT 0x00000000
311 #define mmMMEA0_ADDRNORM_LIMIT_ADDR0_DEFAULT 0x00000000
312 #define mmMMEA0_ADDRNORM_BASE_ADDR1_DEFAULT 0x00000000
313 #define mmMMEA0_ADDRNORM_LIMIT_ADDR1_DEFAULT 0x00000000
314 #define mmMMEA0_ADDRNORM_OFFSET_ADDR1_DEFAULT 0x00000000
315 #define mmMMEA0_ADDRNORM_HOLE_CNTL_DEFAULT 0x00000000
316 #define mmMMEA0_ADDRDEC_BANK_CFG_DEFAULT 0x000001ef
317 #define mmMMEA0_ADDRDEC_MISC_CFG_DEFAULT 0x3ffff000
318 #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK0_DEFAULT 0x00000000
319 #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK1_DEFAULT 0x00000000
320 #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK2_DEFAULT 0x00000000
321 #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK3_DEFAULT 0x00000000
322 #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_BANK4_DEFAULT 0x00000000
323 #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_PC_DEFAULT 0x00000000
324 #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_PC2_DEFAULT 0x00000000
325 #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_CS0_DEFAULT 0x00000000
326 #define mmMMEA0_ADDRDECDRAM_ADDR_HASH_CS1_DEFAULT 0x00000000
327 #define mmMMEA0_ADDRDECDRAM_HARVEST_ENABLE_DEFAULT 0x00000000
328 #define mmMMEA0_ADDRDEC0_BASE_ADDR_CS0_DEFAULT 0x00000000
329 #define mmMMEA0_ADDRDEC0_BASE_ADDR_CS1_DEFAULT 0x00000000
330 #define mmMMEA0_ADDRDEC0_BASE_ADDR_CS2_DEFAULT 0x00000000
331 #define mmMMEA0_ADDRDEC0_BASE_ADDR_CS3_DEFAULT 0x00000000
332 #define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS0_DEFAULT 0x00000000
333 #define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS1_DEFAULT 0x00000000
334 #define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS2_DEFAULT 0x00000000
335 #define mmMMEA0_ADDRDEC0_BASE_ADDR_SECCS3_DEFAULT 0x00000000
336 #define mmMMEA0_ADDRDEC0_ADDR_MASK_CS01_DEFAULT 0xfffffffe
337 #define mmMMEA0_ADDRDEC0_ADDR_MASK_CS23_DEFAULT 0xfffffffe
338 #define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS01_DEFAULT 0xfffffffe
339 #define mmMMEA0_ADDRDEC0_ADDR_MASK_SECCS23_DEFAULT 0xfffffffe
340 #define mmMMEA0_ADDRDEC0_ADDR_CFG_CS01_DEFAULT 0x00050408
341 #define mmMMEA0_ADDRDEC0_ADDR_CFG_CS23_DEFAULT 0x00050408
342 #define mmMMEA0_ADDRDEC0_ADDR_SEL_CS01_DEFAULT 0x04076543
343 #define mmMMEA0_ADDRDEC0_ADDR_SEL_CS23_DEFAULT 0x04076543
344 #define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS01_DEFAULT 0x87654321
345 #define mmMMEA0_ADDRDEC0_COL_SEL_LO_CS23_DEFAULT 0x87654321
346 #define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS01_DEFAULT 0xa9876543
347 #define mmMMEA0_ADDRDEC0_COL_SEL_HI_CS23_DEFAULT 0xa9876543
348 #define mmMMEA0_ADDRDEC0_RM_SEL_CS01_DEFAULT 0x00000000
349 #define mmMMEA0_ADDRDEC0_RM_SEL_CS23_DEFAULT 0x00000000
350 #define mmMMEA0_ADDRDEC0_RM_SEL_SECCS01_DEFAULT 0x00000000
351 #define mmMMEA0_ADDRDEC0_RM_SEL_SECCS23_DEFAULT 0x00000000
352 #define mmMMEA0_ADDRDEC1_BASE_ADDR_CS0_DEFAULT 0x00000000
353 #define mmMMEA0_ADDRDEC1_BASE_ADDR_CS1_DEFAULT 0x00000000
354 #define mmMMEA0_ADDRDEC1_BASE_ADDR_CS2_DEFAULT 0x00000000
355 #define mmMMEA0_ADDRDEC1_BASE_ADDR_CS3_DEFAULT 0x00000000
356 #define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS0_DEFAULT 0x00000000
357 #define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS1_DEFAULT 0x00000000
358 #define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS2_DEFAULT 0x00000000
359 #define mmMMEA0_ADDRDEC1_BASE_ADDR_SECCS3_DEFAULT 0x00000000
360 #define mmMMEA0_ADDRDEC1_ADDR_MASK_CS01_DEFAULT 0xfffffffe
361 #define mmMMEA0_ADDRDEC1_ADDR_MASK_CS23_DEFAULT 0xfffffffe
362 #define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS01_DEFAULT 0xfffffffe
363 #define mmMMEA0_ADDRDEC1_ADDR_MASK_SECCS23_DEFAULT 0xfffffffe
364 #define mmMMEA0_ADDRDEC1_ADDR_CFG_CS01_DEFAULT 0x00050408
365 #define mmMMEA0_ADDRDEC1_ADDR_CFG_CS23_DEFAULT 0x00050408
366 #define mmMMEA0_ADDRDEC1_ADDR_SEL_CS01_DEFAULT 0x04076543
367 #define mmMMEA0_ADDRDEC1_ADDR_SEL_CS23_DEFAULT 0x04076543
368 #define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS01_DEFAULT 0x87654321
369 #define mmMMEA0_ADDRDEC1_COL_SEL_LO_CS23_DEFAULT 0x87654321
370 #define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS01_DEFAULT 0xa9876543
371 #define mmMMEA0_ADDRDEC1_COL_SEL_HI_CS23_DEFAULT 0xa9876543
372 #define mmMMEA0_ADDRDEC1_RM_SEL_CS01_DEFAULT 0x00000000
373 #define mmMMEA0_ADDRDEC1_RM_SEL_CS23_DEFAULT 0x00000000
374 #define mmMMEA0_ADDRDEC1_RM_SEL_SECCS01_DEFAULT 0x00000000
375 #define mmMMEA0_ADDRDEC1_RM_SEL_SECCS23_DEFAULT 0x00000000
376 #define mmMMEA0_IO_RD_CLI2GRP_MAP0_DEFAULT 0xe4e4e4e4
377 #define mmMMEA0_IO_RD_CLI2GRP_MAP1_DEFAULT 0xe4e4e4e4
378 #define mmMMEA0_IO_WR_CLI2GRP_MAP0_DEFAULT 0xe4e4e4e4
379 #define mmMMEA0_IO_WR_CLI2GRP_MAP1_DEFAULT 0xe4e4e4e4
380 #define mmMMEA0_IO_RD_COMBINE_FLUSH_DEFAULT 0x00007777
381 #define mmMMEA0_IO_WR_COMBINE_FLUSH_DEFAULT 0x00007777
382 #define mmMMEA0_IO_GROUP_BURST_DEFAULT 0x1f031f03
383 #define mmMMEA0_IO_RD_PRI_AGE_DEFAULT 0x00db6249
384 #define mmMMEA0_IO_WR_PRI_AGE_DEFAULT 0x00db6249
385 #define mmMMEA0_IO_RD_PRI_QUEUING_DEFAULT 0x00000db6
386 #define mmMMEA0_IO_WR_PRI_QUEUING_DEFAULT 0x00000db6
387 #define mmMMEA0_IO_RD_PRI_FIXED_DEFAULT 0x00000924
388 #define mmMMEA0_IO_WR_PRI_FIXED_DEFAULT 0x00000924
389 #define mmMMEA0_IO_RD_PRI_URGENCY_DEFAULT 0x00000492
390 #define mmMMEA0_IO_WR_PRI_URGENCY_DEFAULT 0x00000492
391 #define mmMMEA0_IO_RD_PRI_URGENCY_MASK_DEFAULT 0xffffffff
392 #define mmMMEA0_IO_WR_PRI_URGENCY_MASK_DEFAULT 0xffffffff
393 #define mmMMEA0_IO_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f
394 #define mmMMEA0_IO_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f
395 #define mmMMEA0_IO_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff
396 #define mmMMEA0_IO_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f
397 #define mmMMEA0_IO_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f
398 #define mmMMEA0_IO_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff
399 #define mmMMEA0_SDP_ARB_DRAM_DEFAULT 0x00102040
400 #define mmMMEA0_SDP_ARB_FINAL_DEFAULT 0x00007fff
401 #define mmMMEA0_SDP_DRAM_PRIORITY_DEFAULT 0x00000000
402 #define mmMMEA0_SDP_IO_PRIORITY_DEFAULT 0x00000000
403 #define mmMMEA0_SDP_CREDITS_DEFAULT 0x000100bf
404 #define mmMMEA0_SDP_TAG_RESERVE0_DEFAULT 0x00000000
405 #define mmMMEA0_SDP_TAG_RESERVE1_DEFAULT 0x00000000
406 #define mmMMEA0_SDP_VCC_RESERVE0_DEFAULT 0x00000000
407 #define mmMMEA0_SDP_VCC_RESERVE1_DEFAULT 0x00000000
408 #define mmMMEA0_SDP_VCD_RESERVE0_DEFAULT 0x00000000
409 #define mmMMEA0_SDP_VCD_RESERVE1_DEFAULT 0x00000000
410 #define mmMMEA0_SDP_REQ_CNTL_DEFAULT 0x0000000f
411 #define mmMMEA0_MISC_DEFAULT 0x00180130
412 #define mmMMEA0_LATENCY_SAMPLING_DEFAULT 0x00000000
413 #define mmMMEA0_PERFCOUNTER_LO_DEFAULT 0x00000000
414 #define mmMMEA0_PERFCOUNTER_HI_DEFAULT 0x00000000
415 #define mmMMEA0_PERFCOUNTER0_CFG_DEFAULT 0x00000000
416 #define mmMMEA0_PERFCOUNTER1_CFG_DEFAULT 0x00000000
417 #define mmMMEA0_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000
418 #define mmMMEA0_EDC_CNT_DEFAULT 0x00000000
419 #define mmMMEA0_EDC_CNT2_DEFAULT 0x00000000
420 #define mmMMEA0_DSM_CNTL_DEFAULT 0x00000000
421 #define mmMMEA0_DSM_CNTLA_DEFAULT 0x00000000
422 #define mmMMEA0_DSM_CNTLB_DEFAULT 0x00000000
423 #define mmMMEA0_DSM_CNTL2_DEFAULT 0x00000000
424 #define mmMMEA0_DSM_CNTL2A_DEFAULT 0x00000000
425 #define mmMMEA0_DSM_CNTL2B_DEFAULT 0x00000000
426 #define mmMMEA0_CGTT_CLK_CTRL_DEFAULT 0x00000100
427 #define mmMMEA0_EDC_MODE_DEFAULT 0x00000000
428 #define mmMMEA0_ERR_STATUS_DEFAULT 0x00000000
429 #define mmMMEA0_MISC2_DEFAULT 0x00000000
430 #define mmMMEA1_DRAM_RD_CLI2GRP_MAP0_DEFAULT 0x55555555
431 #define mmMMEA1_DRAM_RD_CLI2GRP_MAP1_DEFAULT 0x55555555
432 #define mmMMEA1_DRAM_WR_CLI2GRP_MAP0_DEFAULT 0x55555555
433 #define mmMMEA1_DRAM_WR_CLI2GRP_MAP1_DEFAULT 0x55555555
434 #define mmMMEA1_DRAM_RD_GRP2VC_MAP_DEFAULT 0x00000e25
435 #define mmMMEA1_DRAM_WR_GRP2VC_MAP_DEFAULT 0x00000e25
436 #define mmMMEA1_DRAM_RD_LAZY_DEFAULT 0x00000924
437 #define mmMMEA1_DRAM_WR_LAZY_DEFAULT 0x00000924
438 #define mmMMEA1_DRAM_RD_CAM_CNTL_DEFAULT 0x06db3333
439 #define mmMMEA1_DRAM_WR_CAM_CNTL_DEFAULT 0x06db3333
440 #define mmMMEA1_DRAM_PAGE_BURST_DEFAULT 0x20002000
441 #define mmMMEA1_DRAM_RD_PRI_AGE_DEFAULT 0x00db6249
442 #define mmMMEA1_DRAM_WR_PRI_AGE_DEFAULT 0x00db6249
443 #define mmMMEA1_DRAM_RD_PRI_QUEUING_DEFAULT 0x00000db6
444 #define mmMMEA1_DRAM_WR_PRI_QUEUING_DEFAULT 0x00000db6
445 #define mmMMEA1_DRAM_RD_PRI_FIXED_DEFAULT 0x00000924
446 #define mmMMEA1_DRAM_WR_PRI_FIXED_DEFAULT 0x00000924
447 #define mmMMEA1_DRAM_RD_PRI_URGENCY_DEFAULT 0x0000fdb6
448 #define mmMMEA1_DRAM_WR_PRI_URGENCY_DEFAULT 0x0000fdb6
449 #define mmMMEA1_DRAM_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f
450 #define mmMMEA1_DRAM_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f
451 #define mmMMEA1_DRAM_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff
452 #define mmMMEA1_DRAM_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f
453 #define mmMMEA1_DRAM_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f
454 #define mmMMEA1_DRAM_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff
455 #define mmMMEA1_ADDRNORM_BASE_ADDR0_DEFAULT 0x00000000
456 #define mmMMEA1_ADDRNORM_LIMIT_ADDR0_DEFAULT 0x00000000
457 #define mmMMEA1_ADDRNORM_BASE_ADDR1_DEFAULT 0x00000000
458 #define mmMMEA1_ADDRNORM_LIMIT_ADDR1_DEFAULT 0x00000000
459 #define mmMMEA1_ADDRNORM_OFFSET_ADDR1_DEFAULT 0x00000000
460 #define mmMMEA1_ADDRNORM_HOLE_CNTL_DEFAULT 0x00000000
461 #define mmMMEA1_ADDRDEC_BANK_CFG_DEFAULT 0x000001ef
462 #define mmMMEA1_ADDRDEC_MISC_CFG_DEFAULT 0x3ffff000
463 #define mmMMEA1_ADDRDECDRAM_ADDR_HASH_BANK0_DEFAULT 0x00000000
464 #define mmMMEA1_ADDRDECDRAM_ADDR_HASH_BANK1_DEFAULT 0x00000000
465 #define mmMMEA1_ADDRDECDRAM_ADDR_HASH_BANK2_DEFAULT 0x00000000
466 #define mmMMEA1_ADDRDECDRAM_ADDR_HASH_BANK3_DEFAULT 0x00000000
467 #define mmMMEA1_ADDRDECDRAM_ADDR_HASH_BANK4_DEFAULT 0x00000000
468 #define mmMMEA1_ADDRDECDRAM_ADDR_HASH_PC_DEFAULT 0x00000000
469 #define mmMMEA1_ADDRDECDRAM_ADDR_HASH_PC2_DEFAULT 0x00000000
470 #define mmMMEA1_ADDRDECDRAM_ADDR_HASH_CS0_DEFAULT 0x00000000
471 #define mmMMEA1_ADDRDECDRAM_ADDR_HASH_CS1_DEFAULT 0x00000000
472 #define mmMMEA1_ADDRDECDRAM_HARVEST_ENABLE_DEFAULT 0x00000000
473 #define mmMMEA1_ADDRDEC0_BASE_ADDR_CS0_DEFAULT 0x00000000
474 #define mmMMEA1_ADDRDEC0_BASE_ADDR_CS1_DEFAULT 0x00000000
475 #define mmMMEA1_ADDRDEC0_BASE_ADDR_CS2_DEFAULT 0x00000000
476 #define mmMMEA1_ADDRDEC0_BASE_ADDR_CS3_DEFAULT 0x00000000
477 #define mmMMEA1_ADDRDEC0_BASE_ADDR_SECCS0_DEFAULT 0x00000000
478 #define mmMMEA1_ADDRDEC0_BASE_ADDR_SECCS1_DEFAULT 0x00000000
479 #define mmMMEA1_ADDRDEC0_BASE_ADDR_SECCS2_DEFAULT 0x00000000
480 #define mmMMEA1_ADDRDEC0_BASE_ADDR_SECCS3_DEFAULT 0x00000000
481 #define mmMMEA1_ADDRDEC0_ADDR_MASK_CS01_DEFAULT 0xfffffffe
482 #define mmMMEA1_ADDRDEC0_ADDR_MASK_CS23_DEFAULT 0xfffffffe
483 #define mmMMEA1_ADDRDEC0_ADDR_MASK_SECCS01_DEFAULT 0xfffffffe
484 #define mmMMEA1_ADDRDEC0_ADDR_MASK_SECCS23_DEFAULT 0xfffffffe
485 #define mmMMEA1_ADDRDEC0_ADDR_CFG_CS01_DEFAULT 0x00050408
486 #define mmMMEA1_ADDRDEC0_ADDR_CFG_CS23_DEFAULT 0x00050408
487 #define mmMMEA1_ADDRDEC0_ADDR_SEL_CS01_DEFAULT 0x04076543
488 #define mmMMEA1_ADDRDEC0_ADDR_SEL_CS23_DEFAULT 0x04076543
489 #define mmMMEA1_ADDRDEC0_COL_SEL_LO_CS01_DEFAULT 0x87654321
490 #define mmMMEA1_ADDRDEC0_COL_SEL_LO_CS23_DEFAULT 0x87654321
491 #define mmMMEA1_ADDRDEC0_COL_SEL_HI_CS01_DEFAULT 0xa9876543
492 #define mmMMEA1_ADDRDEC0_COL_SEL_HI_CS23_DEFAULT 0xa9876543
493 #define mmMMEA1_ADDRDEC0_RM_SEL_CS01_DEFAULT 0x00000000
494 #define mmMMEA1_ADDRDEC0_RM_SEL_CS23_DEFAULT 0x00000000
495 #define mmMMEA1_ADDRDEC0_RM_SEL_SECCS01_DEFAULT 0x00000000
496 #define mmMMEA1_ADDRDEC0_RM_SEL_SECCS23_DEFAULT 0x00000000
497 #define mmMMEA1_ADDRDEC1_BASE_ADDR_CS0_DEFAULT 0x00000000
498 #define mmMMEA1_ADDRDEC1_BASE_ADDR_CS1_DEFAULT 0x00000000
499 #define mmMMEA1_ADDRDEC1_BASE_ADDR_CS2_DEFAULT 0x00000000
500 #define mmMMEA1_ADDRDEC1_BASE_ADDR_CS3_DEFAULT 0x00000000
501 #define mmMMEA1_ADDRDEC1_BASE_ADDR_SECCS0_DEFAULT 0x00000000
502 #define mmMMEA1_ADDRDEC1_BASE_ADDR_SECCS1_DEFAULT 0x00000000
503 #define mmMMEA1_ADDRDEC1_BASE_ADDR_SECCS2_DEFAULT 0x00000000
504 #define mmMMEA1_ADDRDEC1_BASE_ADDR_SECCS3_DEFAULT 0x00000000
505 #define mmMMEA1_ADDRDEC1_ADDR_MASK_CS01_DEFAULT 0xfffffffe
506 #define mmMMEA1_ADDRDEC1_ADDR_MASK_CS23_DEFAULT 0xfffffffe
507 #define mmMMEA1_ADDRDEC1_ADDR_MASK_SECCS01_DEFAULT 0xfffffffe
508 #define mmMMEA1_ADDRDEC1_ADDR_MASK_SECCS23_DEFAULT 0xfffffffe
509 #define mmMMEA1_ADDRDEC1_ADDR_CFG_CS01_DEFAULT 0x00050408
510 #define mmMMEA1_ADDRDEC1_ADDR_CFG_CS23_DEFAULT 0x00050408
511 #define mmMMEA1_ADDRDEC1_ADDR_SEL_CS01_DEFAULT 0x04076543
512 #define mmMMEA1_ADDRDEC1_ADDR_SEL_CS23_DEFAULT 0x04076543
513 #define mmMMEA1_ADDRDEC1_COL_SEL_LO_CS01_DEFAULT 0x87654321
514 #define mmMMEA1_ADDRDEC1_COL_SEL_LO_CS23_DEFAULT 0x87654321
515 #define mmMMEA1_ADDRDEC1_COL_SEL_HI_CS01_DEFAULT 0xa9876543
516 #define mmMMEA1_ADDRDEC1_COL_SEL_HI_CS23_DEFAULT 0xa9876543
517 #define mmMMEA1_ADDRDEC1_RM_SEL_CS01_DEFAULT 0x00000000
518 #define mmMMEA1_ADDRDEC1_RM_SEL_CS23_DEFAULT 0x00000000
519 #define mmMMEA1_ADDRDEC1_RM_SEL_SECCS01_DEFAULT 0x00000000
520 #define mmMMEA1_ADDRDEC1_RM_SEL_SECCS23_DEFAULT 0x00000000
521 #define mmMMEA1_IO_RD_CLI2GRP_MAP0_DEFAULT 0xe4e4e4e4
522 #define mmMMEA1_IO_RD_CLI2GRP_MAP1_DEFAULT 0xe4e4e4e4
523 #define mmMMEA1_IO_WR_CLI2GRP_MAP0_DEFAULT 0xe4e4e4e4
524 #define mmMMEA1_IO_WR_CLI2GRP_MAP1_DEFAULT 0xe4e4e4e4
525 #define mmMMEA1_IO_RD_COMBINE_FLUSH_DEFAULT 0x00007777
526 #define mmMMEA1_IO_WR_COMBINE_FLUSH_DEFAULT 0x00007777
527 #define mmMMEA1_IO_GROUP_BURST_DEFAULT 0x1f031f03
528 #define mmMMEA1_IO_RD_PRI_AGE_DEFAULT 0x00db6249
529 #define mmMMEA1_IO_WR_PRI_AGE_DEFAULT 0x00db6249
530 #define mmMMEA1_IO_RD_PRI_QUEUING_DEFAULT 0x00000db6
531 #define mmMMEA1_IO_WR_PRI_QUEUING_DEFAULT 0x00000db6
532 #define mmMMEA1_IO_RD_PRI_FIXED_DEFAULT 0x00000924
533 #define mmMMEA1_IO_WR_PRI_FIXED_DEFAULT 0x00000924
534 #define mmMMEA1_IO_RD_PRI_URGENCY_DEFAULT 0x00000492
535 #define mmMMEA1_IO_WR_PRI_URGENCY_DEFAULT 0x00000492
536 #define mmMMEA1_IO_RD_PRI_URGENCY_MASK_DEFAULT 0xffffffff
537 #define mmMMEA1_IO_WR_PRI_URGENCY_MASK_DEFAULT 0xffffffff
538 #define mmMMEA1_IO_RD_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f
539 #define mmMMEA1_IO_RD_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f
540 #define mmMMEA1_IO_RD_PRI_QUANT_PRI3_DEFAULT 0xffffffff
541 #define mmMMEA1_IO_WR_PRI_QUANT_PRI1_DEFAULT 0x3f3f3f3f
542 #define mmMMEA1_IO_WR_PRI_QUANT_PRI2_DEFAULT 0x7f7f7f7f
543 #define mmMMEA1_IO_WR_PRI_QUANT_PRI3_DEFAULT 0xffffffff
544 #define mmMMEA1_SDP_ARB_DRAM_DEFAULT 0x00102040
545 #define mmMMEA1_SDP_ARB_FINAL_DEFAULT 0x00007fff
546 #define mmMMEA1_SDP_DRAM_PRIORITY_DEFAULT 0x00000000
547 #define mmMMEA1_SDP_IO_PRIORITY_DEFAULT 0x00000000
548 #define mmMMEA1_SDP_CREDITS_DEFAULT 0x000100bf
549 #define mmMMEA1_SDP_TAG_RESERVE0_DEFAULT 0x00000000
550 #define mmMMEA1_SDP_TAG_RESERVE1_DEFAULT 0x00000000
551 #define mmMMEA1_SDP_VCC_RESERVE0_DEFAULT 0x00000000
552 #define mmMMEA1_SDP_VCC_RESERVE1_DEFAULT 0x00000000
553 #define mmMMEA1_SDP_VCD_RESERVE0_DEFAULT 0x00000000
554 #define mmMMEA1_SDP_VCD_RESERVE1_DEFAULT 0x00000000
555 #define mmMMEA1_SDP_REQ_CNTL_DEFAULT 0x0000000f
556 #define mmMMEA1_MISC_DEFAULT 0x00180130
557 #define mmMMEA1_LATENCY_SAMPLING_DEFAULT 0x00000000
558 #define mmMMEA1_PERFCOUNTER_LO_DEFAULT 0x00000000
559 #define mmMMEA1_PERFCOUNTER_HI_DEFAULT 0x00000000
560 #define mmMMEA1_PERFCOUNTER0_CFG_DEFAULT 0x00000000
561 #define mmMMEA1_PERFCOUNTER1_CFG_DEFAULT 0x00000000
562 #define mmMMEA1_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000
563 #define mmMMEA1_EDC_CNT_DEFAULT 0x00000000
564 #define mmMMEA1_EDC_CNT2_DEFAULT 0x00000000
565 #define mmMMEA1_DSM_CNTL_DEFAULT 0x00000000
566 #define mmMMEA1_DSM_CNTLA_DEFAULT 0x00000000
567 #define mmMMEA1_DSM_CNTLB_DEFAULT 0x00000000
568 #define mmMMEA1_DSM_CNTL2_DEFAULT 0x00000000
569 #define mmMMEA1_DSM_CNTL2A_DEFAULT 0x00000000
570 #define mmMMEA1_DSM_CNTL2B_DEFAULT 0x00000000
571 #define mmMMEA1_CGTT_CLK_CTRL_DEFAULT 0x00000100
572 #define mmMMEA1_EDC_MODE_DEFAULT 0x00000000
573 #define mmMMEA1_ERR_STATUS_DEFAULT 0x00000000
574 #define mmMMEA1_MISC2_DEFAULT 0x00000000
577 // addressBlock: mmhub_pctldec
578 #define mmPCTL_MISC_DEFAULT 0x00000889
579 #define mmPCTL_MMHUB_DEEPSLEEP_DEFAULT 0x00000000
580 #define mmPCTL_MMHUB_DEEPSLEEP_OVERRIDE_DEFAULT 0x00000000
581 #define mmPCTL_PG_IGNORE_DEEPSLEEP_DEFAULT 0x00000000
582 #define mmPCTL_PG_DAGB_DEFAULT 0x00000000
583 #define mmPCTL0_RENG_RAM_INDEX_DEFAULT 0x00000000
584 #define mmPCTL0_RENG_RAM_DATA_DEFAULT 0x00000000
585 #define mmPCTL0_RENG_EXECUTE_DEFAULT 0x00000000
586 #define mmPCTL0_MISC_DEFAULT 0x00001000
587 #define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT 0x00000000
588 #define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT 0x00000000
589 #define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT 0x00000000
590 #define mmPCTL0_STCTRL_REGISTER_SAVE_EXCL_SET_DEFAULT 0xffffffff
591 #define mmPCTL0_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT 0xffffffff
592 #define mmPCTL1_RENG_RAM_INDEX_DEFAULT 0x00000000
593 #define mmPCTL1_RENG_RAM_DATA_DEFAULT 0x00000000
594 #define mmPCTL1_RENG_EXECUTE_DEFAULT 0x00000000
595 #define mmPCTL1_MISC_DEFAULT 0x00000800
596 #define mmPCTL1_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT 0x061f05a0
597 #define mmPCTL1_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT 0x08590800
598 #define mmPCTL1_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT 0x00000000
599 #define mmPCTL1_STCTRL_REGISTER_SAVE_EXCL_SET_DEFAULT 0xffffffff
600 #define mmPCTL1_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT 0xffffffff
601 #define mmPCTL2_RENG_RAM_INDEX_DEFAULT 0x00000000
602 #define mmPCTL2_RENG_RAM_DATA_DEFAULT 0x00000000
603 #define mmPCTL2_RENG_EXECUTE_DEFAULT 0x00000000
604 #define mmPCTL2_MISC_DEFAULT 0x00000800
605 #define mmPCTL2_STCTRL_REGISTER_SAVE_RANGE0_DEFAULT 0x069f0620
606 #define mmPCTL2_STCTRL_REGISTER_SAVE_RANGE1_DEFAULT 0x08b3085a
607 #define mmPCTL2_STCTRL_REGISTER_SAVE_RANGE2_DEFAULT 0x00000000
608 #define mmPCTL2_STCTRL_REGISTER_SAVE_EXCL_SET_DEFAULT 0xffffffff
609 #define mmPCTL2_STCTRL_REGISTER_SAVE_EXCL_SET1_DEFAULT 0xffffffff
612 // addressBlock: mmhub_l1tlb_vml1dec
613 #define mmMC_VM_MX_L1_TLB0_STATUS_DEFAULT 0x00000000
614 #define mmMC_VM_MX_L1_TLB1_STATUS_DEFAULT 0x00000000
615 #define mmMC_VM_MX_L1_TLB2_STATUS_DEFAULT 0x00000000
616 #define mmMC_VM_MX_L1_TLB3_STATUS_DEFAULT 0x00000000
617 #define mmMC_VM_MX_L1_TLB4_STATUS_DEFAULT 0x00000000
618 #define mmMC_VM_MX_L1_TLB5_STATUS_DEFAULT 0x00000000
619 #define mmMC_VM_MX_L1_TLB6_STATUS_DEFAULT 0x00000000
620 #define mmMC_VM_MX_L1_TLB7_STATUS_DEFAULT 0x00000000
623 // addressBlock: mmhub_l1tlb_vml1pldec
624 #define mmMC_VM_MX_L1_PERFCOUNTER0_CFG_DEFAULT 0x00000000
625 #define mmMC_VM_MX_L1_PERFCOUNTER1_CFG_DEFAULT 0x00000000
626 #define mmMC_VM_MX_L1_PERFCOUNTER2_CFG_DEFAULT 0x00000000
627 #define mmMC_VM_MX_L1_PERFCOUNTER3_CFG_DEFAULT 0x00000000
628 #define mmMC_VM_MX_L1_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000
631 // addressBlock: mmhub_l1tlb_vml1prdec
632 #define mmMC_VM_MX_L1_PERFCOUNTER_LO_DEFAULT 0x00000000
633 #define mmMC_VM_MX_L1_PERFCOUNTER_HI_DEFAULT 0x00000000
636 // addressBlock: mmhub_l1tlb_vmtlspfdec
637 #define mmVM_L2_SAW_CNTL_DEFAULT 0x0c0b8602
638 #define mmVM_L2_SAW_CNTL2_DEFAULT 0x00000000
639 #define mmVM_L2_SAW_CNTL3_DEFAULT 0x80100004
640 #define mmVM_L2_SAW_CNTL4_DEFAULT 0x00000001
641 #define mmVM_L2_SAW_CONTEXT0_CNTL_DEFAULT 0x00fffed8
642 #define mmVM_L2_SAW_CONTEXT0_CNTL2_DEFAULT 0x00000000
643 #define mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
644 #define mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
645 #define mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
646 #define mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
647 #define mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
648 #define mmVM_L2_SAW_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
649 #define mmVM_L2_SAW_CONTEXTS_DISABLE_DEFAULT 0x00000000
650 #define mmVM_L2_SAW_PIPES_BUSY_DEFAULT 0x00000000
653 // addressBlock: mmhub_utcl2_atcl2dec
654 #define mmATC_L2_CNTL_DEFAULT 0x000001c9
655 #define mmATC_L2_CNTL2_DEFAULT 0x00000100
656 #define mmATC_L2_CACHE_DATA0_DEFAULT 0x00000000
657 #define mmATC_L2_CACHE_DATA1_DEFAULT 0x00000000
658 #define mmATC_L2_CACHE_DATA2_DEFAULT 0x00000000
659 #define mmATC_L2_CNTL3_DEFAULT 0x000001f8
660 #define mmATC_L2_STATUS_DEFAULT 0x00000000
661 #define mmATC_L2_STATUS2_DEFAULT 0x00000000
662 #define mmATC_L2_MISC_CG_DEFAULT 0x00000200
663 #define mmATC_L2_MEM_POWER_LS_DEFAULT 0x00000208
664 #define mmATC_L2_CGTT_CLK_CTRL_DEFAULT 0x00000080
667 // addressBlock: mmhub_utcl2_vml2pfdec
668 #define mmVM_L2_CNTL_DEFAULT 0x00080602
669 #define mmVM_L2_CNTL2_DEFAULT 0x00000000
670 #define mmVM_L2_CNTL3_DEFAULT 0x80100007
671 #define mmVM_L2_STATUS_DEFAULT 0x00000000
672 #define mmVM_DUMMY_PAGE_FAULT_CNTL_DEFAULT 0x00000090
673 #define mmVM_DUMMY_PAGE_FAULT_ADDR_LO32_DEFAULT 0x00000000
674 #define mmVM_DUMMY_PAGE_FAULT_ADDR_HI32_DEFAULT 0x00000000
675 #define mmVM_L2_PROTECTION_FAULT_CNTL_DEFAULT 0x3ffffffc
676 #define mmVM_L2_PROTECTION_FAULT_CNTL2_DEFAULT 0x000a0000
677 #define mmVM_L2_PROTECTION_FAULT_MM_CNTL3_DEFAULT 0xffffffff
678 #define mmVM_L2_PROTECTION_FAULT_MM_CNTL4_DEFAULT 0xffffffff
679 #define mmVM_L2_PROTECTION_FAULT_STATUS_DEFAULT 0x00000000
680 #define mmVM_L2_PROTECTION_FAULT_ADDR_LO32_DEFAULT 0x00000000
681 #define mmVM_L2_PROTECTION_FAULT_ADDR_HI32_DEFAULT 0x00000000
682 #define mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32_DEFAULT 0x00000000
683 #define mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32_DEFAULT 0x00000000
684 #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32_DEFAULT 0x00000000
685 #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32_DEFAULT 0x00000000
686 #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32_DEFAULT 0x00000000
687 #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32_DEFAULT 0x00000000
688 #define mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32_DEFAULT 0x00000000
689 #define mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32_DEFAULT 0x00000000
690 #define mmVM_L2_CNTL4_DEFAULT 0x000000c1
691 #define mmVM_L2_MM_GROUP_RT_CLASSES_DEFAULT 0x00000000
692 #define mmVM_L2_BANK_SELECT_RESERVED_CID_DEFAULT 0x00000000
693 #define mmVM_L2_BANK_SELECT_RESERVED_CID2_DEFAULT 0x00000000
694 #define mmVM_L2_CACHE_PARITY_CNTL_DEFAULT 0x00000000
695 #define mmVM_L2_CGTT_CLK_CTRL_DEFAULT 0x00000080
698 // addressBlock: mmhub_utcl2_vml2vcdec
699 #define mmVM_CONTEXT0_CNTL_DEFAULT 0x007ffe80
700 #define mmVM_CONTEXT1_CNTL_DEFAULT 0x007ffe80
701 #define mmVM_CONTEXT2_CNTL_DEFAULT 0x007ffe80
702 #define mmVM_CONTEXT3_CNTL_DEFAULT 0x007ffe80
703 #define mmVM_CONTEXT4_CNTL_DEFAULT 0x007ffe80
704 #define mmVM_CONTEXT5_CNTL_DEFAULT 0x007ffe80
705 #define mmVM_CONTEXT6_CNTL_DEFAULT 0x007ffe80
706 #define mmVM_CONTEXT7_CNTL_DEFAULT 0x007ffe80
707 #define mmVM_CONTEXT8_CNTL_DEFAULT 0x007ffe80
708 #define mmVM_CONTEXT9_CNTL_DEFAULT 0x007ffe80
709 #define mmVM_CONTEXT10_CNTL_DEFAULT 0x007ffe80
710 #define mmVM_CONTEXT11_CNTL_DEFAULT 0x007ffe80
711 #define mmVM_CONTEXT12_CNTL_DEFAULT 0x007ffe80
712 #define mmVM_CONTEXT13_CNTL_DEFAULT 0x007ffe80
713 #define mmVM_CONTEXT14_CNTL_DEFAULT 0x007ffe80
714 #define mmVM_CONTEXT15_CNTL_DEFAULT 0x007ffe80
715 #define mmVM_CONTEXTS_DISABLE_DEFAULT 0x00000000
716 #define mmVM_INVALIDATE_ENG0_SEM_DEFAULT 0x00000000
717 #define mmVM_INVALIDATE_ENG1_SEM_DEFAULT 0x00000000
718 #define mmVM_INVALIDATE_ENG2_SEM_DEFAULT 0x00000000
719 #define mmVM_INVALIDATE_ENG3_SEM_DEFAULT 0x00000000
720 #define mmVM_INVALIDATE_ENG4_SEM_DEFAULT 0x00000000
721 #define mmVM_INVALIDATE_ENG5_SEM_DEFAULT 0x00000000
722 #define mmVM_INVALIDATE_ENG6_SEM_DEFAULT 0x00000000
723 #define mmVM_INVALIDATE_ENG7_SEM_DEFAULT 0x00000000
724 #define mmVM_INVALIDATE_ENG8_SEM_DEFAULT 0x00000000
725 #define mmVM_INVALIDATE_ENG9_SEM_DEFAULT 0x00000000
726 #define mmVM_INVALIDATE_ENG10_SEM_DEFAULT 0x00000000
727 #define mmVM_INVALIDATE_ENG11_SEM_DEFAULT 0x00000000
728 #define mmVM_INVALIDATE_ENG12_SEM_DEFAULT 0x00000000
729 #define mmVM_INVALIDATE_ENG13_SEM_DEFAULT 0x00000000
730 #define mmVM_INVALIDATE_ENG14_SEM_DEFAULT 0x00000000
731 #define mmVM_INVALIDATE_ENG15_SEM_DEFAULT 0x00000000
732 #define mmVM_INVALIDATE_ENG16_SEM_DEFAULT 0x00000000
733 #define mmVM_INVALIDATE_ENG17_SEM_DEFAULT 0x00000000
734 #define mmVM_INVALIDATE_ENG0_REQ_DEFAULT 0x017c0000
735 #define mmVM_INVALIDATE_ENG1_REQ_DEFAULT 0x017c0000
736 #define mmVM_INVALIDATE_ENG2_REQ_DEFAULT 0x017c0000
737 #define mmVM_INVALIDATE_ENG3_REQ_DEFAULT 0x017c0000
738 #define mmVM_INVALIDATE_ENG4_REQ_DEFAULT 0x017c0000
739 #define mmVM_INVALIDATE_ENG5_REQ_DEFAULT 0x017c0000
740 #define mmVM_INVALIDATE_ENG6_REQ_DEFAULT 0x017c0000
741 #define mmVM_INVALIDATE_ENG7_REQ_DEFAULT 0x017c0000
742 #define mmVM_INVALIDATE_ENG8_REQ_DEFAULT 0x017c0000
743 #define mmVM_INVALIDATE_ENG9_REQ_DEFAULT 0x017c0000
744 #define mmVM_INVALIDATE_ENG10_REQ_DEFAULT 0x017c0000
745 #define mmVM_INVALIDATE_ENG11_REQ_DEFAULT 0x017c0000
746 #define mmVM_INVALIDATE_ENG12_REQ_DEFAULT 0x017c0000
747 #define mmVM_INVALIDATE_ENG13_REQ_DEFAULT 0x017c0000
748 #define mmVM_INVALIDATE_ENG14_REQ_DEFAULT 0x017c0000
749 #define mmVM_INVALIDATE_ENG15_REQ_DEFAULT 0x017c0000
750 #define mmVM_INVALIDATE_ENG16_REQ_DEFAULT 0x017c0000
751 #define mmVM_INVALIDATE_ENG17_REQ_DEFAULT 0x017c0000
752 #define mmVM_INVALIDATE_ENG0_ACK_DEFAULT 0x00000000
753 #define mmVM_INVALIDATE_ENG1_ACK_DEFAULT 0x00000000
754 #define mmVM_INVALIDATE_ENG2_ACK_DEFAULT 0x00000000
755 #define mmVM_INVALIDATE_ENG3_ACK_DEFAULT 0x00000000
756 #define mmVM_INVALIDATE_ENG4_ACK_DEFAULT 0x00000000
757 #define mmVM_INVALIDATE_ENG5_ACK_DEFAULT 0x00000000
758 #define mmVM_INVALIDATE_ENG6_ACK_DEFAULT 0x00000000
759 #define mmVM_INVALIDATE_ENG7_ACK_DEFAULT 0x00000000
760 #define mmVM_INVALIDATE_ENG8_ACK_DEFAULT 0x00000000
761 #define mmVM_INVALIDATE_ENG9_ACK_DEFAULT 0x00000000
762 #define mmVM_INVALIDATE_ENG10_ACK_DEFAULT 0x00000000
763 #define mmVM_INVALIDATE_ENG11_ACK_DEFAULT 0x00000000
764 #define mmVM_INVALIDATE_ENG12_ACK_DEFAULT 0x00000000
765 #define mmVM_INVALIDATE_ENG13_ACK_DEFAULT 0x00000000
766 #define mmVM_INVALIDATE_ENG14_ACK_DEFAULT 0x00000000
767 #define mmVM_INVALIDATE_ENG15_ACK_DEFAULT 0x00000000
768 #define mmVM_INVALIDATE_ENG16_ACK_DEFAULT 0x00000000
769 #define mmVM_INVALIDATE_ENG17_ACK_DEFAULT 0x00000000
770 #define mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32_DEFAULT 0x00000000
771 #define mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32_DEFAULT 0x00000000
772 #define mmVM_INVALIDATE_ENG1_ADDR_RANGE_LO32_DEFAULT 0x00000000
773 #define mmVM_INVALIDATE_ENG1_ADDR_RANGE_HI32_DEFAULT 0x00000000
774 #define mmVM_INVALIDATE_ENG2_ADDR_RANGE_LO32_DEFAULT 0x00000000
775 #define mmVM_INVALIDATE_ENG2_ADDR_RANGE_HI32_DEFAULT 0x00000000
776 #define mmVM_INVALIDATE_ENG3_ADDR_RANGE_LO32_DEFAULT 0x00000000
777 #define mmVM_INVALIDATE_ENG3_ADDR_RANGE_HI32_DEFAULT 0x00000000
778 #define mmVM_INVALIDATE_ENG4_ADDR_RANGE_LO32_DEFAULT 0x00000000
779 #define mmVM_INVALIDATE_ENG4_ADDR_RANGE_HI32_DEFAULT 0x00000000
780 #define mmVM_INVALIDATE_ENG5_ADDR_RANGE_LO32_DEFAULT 0x00000000
781 #define mmVM_INVALIDATE_ENG5_ADDR_RANGE_HI32_DEFAULT 0x00000000
782 #define mmVM_INVALIDATE_ENG6_ADDR_RANGE_LO32_DEFAULT 0x00000000
783 #define mmVM_INVALIDATE_ENG6_ADDR_RANGE_HI32_DEFAULT 0x00000000
784 #define mmVM_INVALIDATE_ENG7_ADDR_RANGE_LO32_DEFAULT 0x00000000
785 #define mmVM_INVALIDATE_ENG7_ADDR_RANGE_HI32_DEFAULT 0x00000000
786 #define mmVM_INVALIDATE_ENG8_ADDR_RANGE_LO32_DEFAULT 0x00000000
787 #define mmVM_INVALIDATE_ENG8_ADDR_RANGE_HI32_DEFAULT 0x00000000
788 #define mmVM_INVALIDATE_ENG9_ADDR_RANGE_LO32_DEFAULT 0x00000000
789 #define mmVM_INVALIDATE_ENG9_ADDR_RANGE_HI32_DEFAULT 0x00000000
790 #define mmVM_INVALIDATE_ENG10_ADDR_RANGE_LO32_DEFAULT 0x00000000
791 #define mmVM_INVALIDATE_ENG10_ADDR_RANGE_HI32_DEFAULT 0x00000000
792 #define mmVM_INVALIDATE_ENG11_ADDR_RANGE_LO32_DEFAULT 0x00000000
793 #define mmVM_INVALIDATE_ENG11_ADDR_RANGE_HI32_DEFAULT 0x00000000
794 #define mmVM_INVALIDATE_ENG12_ADDR_RANGE_LO32_DEFAULT 0x00000000
795 #define mmVM_INVALIDATE_ENG12_ADDR_RANGE_HI32_DEFAULT 0x00000000
796 #define mmVM_INVALIDATE_ENG13_ADDR_RANGE_LO32_DEFAULT 0x00000000
797 #define mmVM_INVALIDATE_ENG13_ADDR_RANGE_HI32_DEFAULT 0x00000000
798 #define mmVM_INVALIDATE_ENG14_ADDR_RANGE_LO32_DEFAULT 0x00000000
799 #define mmVM_INVALIDATE_ENG14_ADDR_RANGE_HI32_DEFAULT 0x00000000
800 #define mmVM_INVALIDATE_ENG15_ADDR_RANGE_LO32_DEFAULT 0x00000000
801 #define mmVM_INVALIDATE_ENG15_ADDR_RANGE_HI32_DEFAULT 0x00000000
802 #define mmVM_INVALIDATE_ENG16_ADDR_RANGE_LO32_DEFAULT 0x00000000
803 #define mmVM_INVALIDATE_ENG16_ADDR_RANGE_HI32_DEFAULT 0x00000000
804 #define mmVM_INVALIDATE_ENG17_ADDR_RANGE_LO32_DEFAULT 0x00000000
805 #define mmVM_INVALIDATE_ENG17_ADDR_RANGE_HI32_DEFAULT 0x00000000
806 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
807 #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
808 #define mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
809 #define mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
810 #define mmVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
811 #define mmVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
812 #define mmVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
813 #define mmVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
814 #define mmVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
815 #define mmVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
816 #define mmVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
817 #define mmVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
818 #define mmVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
819 #define mmVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
820 #define mmVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
821 #define mmVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
822 #define mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
823 #define mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
824 #define mmVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
825 #define mmVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
826 #define mmVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
827 #define mmVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
828 #define mmVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
829 #define mmVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
830 #define mmVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
831 #define mmVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
832 #define mmVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
833 #define mmVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
834 #define mmVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
835 #define mmVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
836 #define mmVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32_DEFAULT 0x00000000
837 #define mmVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32_DEFAULT 0x00000000
838 #define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
839 #define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
840 #define mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
841 #define mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
842 #define mmVM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
843 #define mmVM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
844 #define mmVM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
845 #define mmVM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
846 #define mmVM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
847 #define mmVM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
848 #define mmVM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
849 #define mmVM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
850 #define mmVM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
851 #define mmVM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
852 #define mmVM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
853 #define mmVM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
854 #define mmVM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
855 #define mmVM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
856 #define mmVM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
857 #define mmVM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
858 #define mmVM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
859 #define mmVM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
860 #define mmVM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
861 #define mmVM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
862 #define mmVM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
863 #define mmVM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
864 #define mmVM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
865 #define mmVM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
866 #define mmVM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
867 #define mmVM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
868 #define mmVM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32_DEFAULT 0x00000000
869 #define mmVM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32_DEFAULT 0x00000000
870 #define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
871 #define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
872 #define mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
873 #define mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
874 #define mmVM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
875 #define mmVM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
876 #define mmVM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
877 #define mmVM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
878 #define mmVM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
879 #define mmVM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
880 #define mmVM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
881 #define mmVM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
882 #define mmVM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
883 #define mmVM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
884 #define mmVM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
885 #define mmVM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
886 #define mmVM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
887 #define mmVM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
888 #define mmVM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
889 #define mmVM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
890 #define mmVM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
891 #define mmVM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
892 #define mmVM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
893 #define mmVM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
894 #define mmVM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
895 #define mmVM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
896 #define mmVM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
897 #define mmVM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
898 #define mmVM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
899 #define mmVM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
900 #define mmVM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32_DEFAULT 0x00000000
901 #define mmVM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32_DEFAULT 0x00000000
904 // addressBlock: mmhub_utcl2_vml2pldec
905 #define mmMC_VM_L2_PERFCOUNTER0_CFG_DEFAULT 0x00000000
906 #define mmMC_VM_L2_PERFCOUNTER1_CFG_DEFAULT 0x00000000
907 #define mmMC_VM_L2_PERFCOUNTER2_CFG_DEFAULT 0x00000000
908 #define mmMC_VM_L2_PERFCOUNTER3_CFG_DEFAULT 0x00000000
909 #define mmMC_VM_L2_PERFCOUNTER4_CFG_DEFAULT 0x00000000
910 #define mmMC_VM_L2_PERFCOUNTER5_CFG_DEFAULT 0x00000000
911 #define mmMC_VM_L2_PERFCOUNTER6_CFG_DEFAULT 0x00000000
912 #define mmMC_VM_L2_PERFCOUNTER7_CFG_DEFAULT 0x00000000
913 #define mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000
916 // addressBlock: mmhub_utcl2_vml2prdec
917 #define mmMC_VM_L2_PERFCOUNTER_LO_DEFAULT 0x00000000
918 #define mmMC_VM_L2_PERFCOUNTER_HI_DEFAULT 0x00000000
921 // addressBlock: mmhub_utcl2_vmsharedhvdec
922 #define mmMC_VM_FB_SIZE_OFFSET_VF0_DEFAULT 0x00000000
923 #define mmMC_VM_FB_SIZE_OFFSET_VF1_DEFAULT 0x00000000
924 #define mmMC_VM_FB_SIZE_OFFSET_VF2_DEFAULT 0x00000000
925 #define mmMC_VM_FB_SIZE_OFFSET_VF3_DEFAULT 0x00000000
926 #define mmMC_VM_FB_SIZE_OFFSET_VF4_DEFAULT 0x00000000
927 #define mmMC_VM_FB_SIZE_OFFSET_VF5_DEFAULT 0x00000000
928 #define mmMC_VM_FB_SIZE_OFFSET_VF6_DEFAULT 0x00000000
929 #define mmMC_VM_FB_SIZE_OFFSET_VF7_DEFAULT 0x00000000
930 #define mmMC_VM_FB_SIZE_OFFSET_VF8_DEFAULT 0x00000000
931 #define mmMC_VM_FB_SIZE_OFFSET_VF9_DEFAULT 0x00000000
932 #define mmMC_VM_FB_SIZE_OFFSET_VF10_DEFAULT 0x00000000
933 #define mmMC_VM_FB_SIZE_OFFSET_VF11_DEFAULT 0x00000000
934 #define mmMC_VM_FB_SIZE_OFFSET_VF12_DEFAULT 0x00000000
935 #define mmMC_VM_FB_SIZE_OFFSET_VF13_DEFAULT 0x00000000
936 #define mmMC_VM_FB_SIZE_OFFSET_VF14_DEFAULT 0x00000000
937 #define mmMC_VM_FB_SIZE_OFFSET_VF15_DEFAULT 0x00000000
938 #define mmVM_IOMMU_MMIO_CNTRL_1_DEFAULT 0x00000100
939 #define mmMC_VM_MARC_BASE_LO_0_DEFAULT 0x00000000
940 #define mmMC_VM_MARC_BASE_LO_1_DEFAULT 0x00000000
941 #define mmMC_VM_MARC_BASE_LO_2_DEFAULT 0x00000000
942 #define mmMC_VM_MARC_BASE_LO_3_DEFAULT 0x00000000
943 #define mmMC_VM_MARC_BASE_HI_0_DEFAULT 0x00000000
944 #define mmMC_VM_MARC_BASE_HI_1_DEFAULT 0x00000000
945 #define mmMC_VM_MARC_BASE_HI_2_DEFAULT 0x00000000
946 #define mmMC_VM_MARC_BASE_HI_3_DEFAULT 0x00000000
947 #define mmMC_VM_MARC_RELOC_LO_0_DEFAULT 0x00000000
948 #define mmMC_VM_MARC_RELOC_LO_1_DEFAULT 0x00000000
949 #define mmMC_VM_MARC_RELOC_LO_2_DEFAULT 0x00000000
950 #define mmMC_VM_MARC_RELOC_LO_3_DEFAULT 0x00000000
951 #define mmMC_VM_MARC_RELOC_HI_0_DEFAULT 0x00000000
952 #define mmMC_VM_MARC_RELOC_HI_1_DEFAULT 0x00000000
953 #define mmMC_VM_MARC_RELOC_HI_2_DEFAULT 0x00000000
954 #define mmMC_VM_MARC_RELOC_HI_3_DEFAULT 0x00000000
955 #define mmMC_VM_MARC_LEN_LO_0_DEFAULT 0x00000000
956 #define mmMC_VM_MARC_LEN_LO_1_DEFAULT 0x00000000
957 #define mmMC_VM_MARC_LEN_LO_2_DEFAULT 0x00000000
958 #define mmMC_VM_MARC_LEN_LO_3_DEFAULT 0x00000000
959 #define mmMC_VM_MARC_LEN_HI_0_DEFAULT 0x00000000
960 #define mmMC_VM_MARC_LEN_HI_1_DEFAULT 0x00000000
961 #define mmMC_VM_MARC_LEN_HI_2_DEFAULT 0x00000000
962 #define mmMC_VM_MARC_LEN_HI_3_DEFAULT 0x00000000
963 #define mmVM_IOMMU_CONTROL_REGISTER_DEFAULT 0x00000000
964 #define mmVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_DEFAULT 0x00000000
965 #define mmVM_PCIE_ATS_CNTL_DEFAULT 0x00000000
966 #define mmVM_PCIE_ATS_CNTL_VF_0_DEFAULT 0x00000000
967 #define mmVM_PCIE_ATS_CNTL_VF_1_DEFAULT 0x00000000
968 #define mmVM_PCIE_ATS_CNTL_VF_2_DEFAULT 0x00000000
969 #define mmVM_PCIE_ATS_CNTL_VF_3_DEFAULT 0x00000000
970 #define mmVM_PCIE_ATS_CNTL_VF_4_DEFAULT 0x00000000
971 #define mmVM_PCIE_ATS_CNTL_VF_5_DEFAULT 0x00000000
972 #define mmVM_PCIE_ATS_CNTL_VF_6_DEFAULT 0x00000000
973 #define mmVM_PCIE_ATS_CNTL_VF_7_DEFAULT 0x00000000
974 #define mmVM_PCIE_ATS_CNTL_VF_8_DEFAULT 0x00000000
975 #define mmVM_PCIE_ATS_CNTL_VF_9_DEFAULT 0x00000000
976 #define mmVM_PCIE_ATS_CNTL_VF_10_DEFAULT 0x00000000
977 #define mmVM_PCIE_ATS_CNTL_VF_11_DEFAULT 0x00000000
978 #define mmVM_PCIE_ATS_CNTL_VF_12_DEFAULT 0x00000000
979 #define mmVM_PCIE_ATS_CNTL_VF_13_DEFAULT 0x00000000
980 #define mmVM_PCIE_ATS_CNTL_VF_14_DEFAULT 0x00000000
981 #define mmVM_PCIE_ATS_CNTL_VF_15_DEFAULT 0x00000000
982 #define mmUTCL2_CGTT_CLK_CTRL_DEFAULT 0x00000080
985 // addressBlock: mmhub_utcl2_vmsharedpfdec
986 #define mmMC_VM_NB_MMIOBASE_DEFAULT 0x00000000
987 #define mmMC_VM_NB_MMIOLIMIT_DEFAULT 0x00000000
988 #define mmMC_VM_NB_PCI_CTRL_DEFAULT 0x00000000
989 #define mmMC_VM_NB_PCI_ARB_DEFAULT 0x00000008
990 #define mmMC_VM_NB_TOP_OF_DRAM_SLOT1_DEFAULT 0x00000000
991 #define mmMC_VM_NB_LOWER_TOP_OF_DRAM2_DEFAULT 0x00000000
992 #define mmMC_VM_NB_UPPER_TOP_OF_DRAM2_DEFAULT 0x00000000
993 #define mmMC_VM_FB_OFFSET_DEFAULT 0x00000000
994 #define mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_DEFAULT 0x00000000
995 #define mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_DEFAULT 0x00000000
996 #define mmMC_VM_STEERING_DEFAULT 0x00000001
997 #define mmMC_SHARED_VIRT_RESET_REQ_DEFAULT 0x00000000
998 #define mmMC_MEM_POWER_LS_DEFAULT 0x00000208
999 #define mmMC_VM_CACHEABLE_DRAM_ADDRESS_START_DEFAULT 0x00000000
1000 #define mmMC_VM_CACHEABLE_DRAM_ADDRESS_END_DEFAULT 0x00000000
1001 #define mmMC_VM_APT_CNTL_DEFAULT 0x00000000
1002 #define mmMC_VM_LOCAL_HBM_ADDRESS_START_DEFAULT 0x00000000
1003 #define mmMC_VM_LOCAL_HBM_ADDRESS_END_DEFAULT 0x000fffff
1004 #define mmMC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL_DEFAULT 0x00000000
1007 // addressBlock: mmhub_utcl2_vmsharedvcdec
1008 #define mmMC_VM_FB_LOCATION_BASE_DEFAULT 0x00000000
1009 #define mmMC_VM_FB_LOCATION_TOP_DEFAULT 0x00000000
1010 #define mmMC_VM_AGP_TOP_DEFAULT 0x00000000
1011 #define mmMC_VM_AGP_BOT_DEFAULT 0x00000000
1012 #define mmMC_VM_AGP_BASE_DEFAULT 0x00000000
1013 #define mmMC_VM_SYSTEM_APERTURE_LOW_ADDR_DEFAULT 0x00000000
1014 #define mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR_DEFAULT 0x00000000
1015 #define mmMC_VM_MX_L1_TLB_CNTL_DEFAULT 0x00002501
1018 // addressBlock: mmhub_utcl2_atcl2pfcntrdec
1019 #define mmATC_L2_PERFCOUNTER_LO_DEFAULT 0x00000000
1020 #define mmATC_L2_PERFCOUNTER_HI_DEFAULT 0x00000000
1023 // addressBlock: mmhub_utcl2_atcl2pfcntldec
1024 #define mmATC_L2_PERFCOUNTER0_CFG_DEFAULT 0x00000000
1025 #define mmATC_L2_PERFCOUNTER1_CFG_DEFAULT 0x00000000
1026 #define mmATC_L2_PERFCOUNTER_RSLT_CNTL_DEFAULT 0x04000000