2 * Copyright 2014 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef KFD_CRAT_H_INCLUDED
24 #define KFD_CRAT_H_INCLUDED
26 #include <linux/types.h>
31 * 4CC signature values for the CRAT and CDIT ACPI tables
34 #define CRAT_SIGNATURE "CRAT"
35 #define CDIT_SIGNATURE "CDIT"
38 * Component Resource Association Table (CRAT)
41 #define CRAT_OEMID_LENGTH 6
42 #define CRAT_OEMTABLEID_LENGTH 8
43 #define CRAT_RESERVED_LENGTH 6
45 #define CRAT_OEMID_64BIT_MASK ((1ULL << (CRAT_OEMID_LENGTH * 8)) - 1)
47 /* Compute Unit flags */
48 #define COMPUTE_UNIT_CPU (1 << 0) /* Create Virtual CRAT for CPU */
49 #define COMPUTE_UNIT_GPU (1 << 1) /* Create Virtual CRAT for GPU */
56 uint8_t oem_id[CRAT_OEMID_LENGTH];
57 uint8_t oem_table_id[CRAT_OEMTABLEID_LENGTH];
58 uint32_t oem_revision;
60 uint32_t creator_revision;
61 uint32_t total_entries;
63 uint8_t reserved[CRAT_RESERVED_LENGTH];
67 * The header structure is immediately followed by total_entries of the
72 * The currently defined subtype entries in the CRAT
74 #define CRAT_SUBTYPE_COMPUTEUNIT_AFFINITY 0
75 #define CRAT_SUBTYPE_MEMORY_AFFINITY 1
76 #define CRAT_SUBTYPE_CACHE_AFFINITY 2
77 #define CRAT_SUBTYPE_TLB_AFFINITY 3
78 #define CRAT_SUBTYPE_CCOMPUTE_AFFINITY 4
79 #define CRAT_SUBTYPE_IOLINK_AFFINITY 5
80 #define CRAT_SUBTYPE_MAX 6
82 #define CRAT_SIBLINGMAP_SIZE 32
85 * ComputeUnit Affinity structure and definitions
87 #define CRAT_CU_FLAGS_ENABLED 0x00000001
88 #define CRAT_CU_FLAGS_HOT_PLUGGABLE 0x00000002
89 #define CRAT_CU_FLAGS_CPU_PRESENT 0x00000004
90 #define CRAT_CU_FLAGS_GPU_PRESENT 0x00000008
91 #define CRAT_CU_FLAGS_IOMMU_PRESENT 0x00000010
92 #define CRAT_CU_FLAGS_RESERVED 0xffffffe0
94 #define CRAT_COMPUTEUNIT_RESERVED_LENGTH 4
96 struct crat_subtype_computeunit {
101 uint32_t proximity_domain;
102 uint32_t processor_id_low;
103 uint16_t num_cpu_cores;
104 uint16_t num_simd_cores;
105 uint16_t max_waves_simd;
107 uint16_t hsa_capability;
108 uint16_t lds_size_in_kb;
109 uint8_t wave_front_size;
111 uint16_t micro_engine_id;
113 uint8_t num_cu_per_array;
114 uint8_t num_simd_per_cu;
115 uint8_t max_slots_scatch_cu;
116 uint8_t reserved2[CRAT_COMPUTEUNIT_RESERVED_LENGTH];
120 * HSA Memory Affinity structure and definitions
122 #define CRAT_MEM_FLAGS_ENABLED 0x00000001
123 #define CRAT_MEM_FLAGS_HOT_PLUGGABLE 0x00000002
124 #define CRAT_MEM_FLAGS_NON_VOLATILE 0x00000004
125 #define CRAT_MEM_FLAGS_RESERVED 0xfffffff8
127 #define CRAT_MEMORY_RESERVED_LENGTH 8
129 struct crat_subtype_memory {
134 uint32_t proximity_domain;
135 uint32_t base_addr_low;
136 uint32_t base_addr_high;
138 uint32_t length_high;
140 uint8_t visibility_type; /* for virtual (dGPU) CRAT */
141 uint8_t reserved2[CRAT_MEMORY_RESERVED_LENGTH - 1];
145 * HSA Cache Affinity structure and definitions
147 #define CRAT_CACHE_FLAGS_ENABLED 0x00000001
148 #define CRAT_CACHE_FLAGS_DATA_CACHE 0x00000002
149 #define CRAT_CACHE_FLAGS_INST_CACHE 0x00000004
150 #define CRAT_CACHE_FLAGS_CPU_CACHE 0x00000008
151 #define CRAT_CACHE_FLAGS_SIMD_CACHE 0x00000010
152 #define CRAT_CACHE_FLAGS_RESERVED 0xffffffe0
154 #define CRAT_CACHE_RESERVED_LENGTH 8
156 struct crat_subtype_cache {
161 uint32_t processor_id_low;
162 uint8_t sibling_map[CRAT_SIBLINGMAP_SIZE];
165 uint8_t lines_per_tag;
166 uint16_t cache_line_size;
167 uint8_t associativity;
168 uint8_t cache_properties;
169 uint16_t cache_latency;
170 uint8_t reserved2[CRAT_CACHE_RESERVED_LENGTH];
174 * HSA TLB Affinity structure and definitions
176 #define CRAT_TLB_FLAGS_ENABLED 0x00000001
177 #define CRAT_TLB_FLAGS_DATA_TLB 0x00000002
178 #define CRAT_TLB_FLAGS_INST_TLB 0x00000004
179 #define CRAT_TLB_FLAGS_CPU_TLB 0x00000008
180 #define CRAT_TLB_FLAGS_SIMD_TLB 0x00000010
181 #define CRAT_TLB_FLAGS_RESERVED 0xffffffe0
183 #define CRAT_TLB_RESERVED_LENGTH 4
185 struct crat_subtype_tlb {
190 uint32_t processor_id_low;
191 uint8_t sibling_map[CRAT_SIBLINGMAP_SIZE];
193 uint8_t data_tlb_associativity_2mb;
194 uint8_t data_tlb_size_2mb;
195 uint8_t instruction_tlb_associativity_2mb;
196 uint8_t instruction_tlb_size_2mb;
197 uint8_t data_tlb_associativity_4k;
198 uint8_t data_tlb_size_4k;
199 uint8_t instruction_tlb_associativity_4k;
200 uint8_t instruction_tlb_size_4k;
201 uint8_t data_tlb_associativity_1gb;
202 uint8_t data_tlb_size_1gb;
203 uint8_t instruction_tlb_associativity_1gb;
204 uint8_t instruction_tlb_size_1gb;
205 uint8_t reserved2[CRAT_TLB_RESERVED_LENGTH];
209 * HSA CCompute/APU Affinity structure and definitions
211 #define CRAT_CCOMPUTE_FLAGS_ENABLED 0x00000001
212 #define CRAT_CCOMPUTE_FLAGS_RESERVED 0xfffffffe
214 #define CRAT_CCOMPUTE_RESERVED_LENGTH 16
216 struct crat_subtype_ccompute {
221 uint32_t processor_id_low;
222 uint8_t sibling_map[CRAT_SIBLINGMAP_SIZE];
224 uint8_t reserved2[CRAT_CCOMPUTE_RESERVED_LENGTH];
228 * HSA IO Link Affinity structure and definitions
230 #define CRAT_IOLINK_FLAGS_ENABLED (1 << 0)
231 #define CRAT_IOLINK_FLAGS_NON_COHERENT (1 << 1)
232 #define CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT (1 << 2)
233 #define CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT (1 << 3)
234 #define CRAT_IOLINK_FLAGS_NO_PEER_TO_PEER_DMA (1 << 4)
235 #define CRAT_IOLINK_FLAGS_RESERVED_MASK 0xffffffe0
240 #define CRAT_IOLINK_TYPE_UNDEFINED 0
241 #define CRAT_IOLINK_TYPE_HYPERTRANSPORT 1
242 #define CRAT_IOLINK_TYPE_PCIEXPRESS 2
243 #define CRAT_IOLINK_TYPE_AMBA 3
244 #define CRAT_IOLINK_TYPE_MIPI 4
245 #define CRAT_IOLINK_TYPE_QPI_1_1 5
246 #define CRAT_IOLINK_TYPE_RESERVED1 6
247 #define CRAT_IOLINK_TYPE_RESERVED2 7
248 #define CRAT_IOLINK_TYPE_RAPID_IO 8
249 #define CRAT_IOLINK_TYPE_INFINIBAND 9
250 #define CRAT_IOLINK_TYPE_RESERVED3 10
251 #define CRAT_IOLINK_TYPE_OTHER 11
252 #define CRAT_IOLINK_TYPE_MAX 255
254 #define CRAT_IOLINK_RESERVED_LENGTH 24
256 struct crat_subtype_iolink {
261 uint32_t proximity_domain_from;
262 uint32_t proximity_domain_to;
263 uint8_t io_interface_type;
264 uint8_t version_major;
265 uint16_t version_minor;
266 uint32_t minimum_latency;
267 uint32_t maximum_latency;
268 uint32_t minimum_bandwidth_mbs;
269 uint32_t maximum_bandwidth_mbs;
270 uint32_t recommended_transfer_size;
271 uint8_t reserved2[CRAT_IOLINK_RESERVED_LENGTH];
275 * HSA generic sub-type header
278 #define CRAT_SUBTYPE_FLAGS_ENABLED 0x00000001
280 struct crat_subtype_generic {
288 * Component Locality Distance Information Table (CDIT)
290 #define CDIT_OEMID_LENGTH 6
291 #define CDIT_OEMTABLEID_LENGTH 8
298 uint8_t oem_id[CDIT_OEMID_LENGTH];
299 uint8_t oem_table_id[CDIT_OEMTABLEID_LENGTH];
300 uint32_t oem_revision;
302 uint32_t creator_revision;
303 uint32_t total_entries;
304 uint16_t num_domains;
312 int kfd_create_crat_image_acpi(void **crat_image, size_t *size);
313 void kfd_destroy_crat_image(void *crat_image);
314 int kfd_parse_crat_table(void *crat_image, struct list_head *device_list,
315 uint32_t proximity_domain);
316 int kfd_create_crat_image_virtual(void **crat_image, size_t *size,
317 int flags, struct kfd_dev *kdev,
318 uint32_t proximity_domain);
320 #endif /* KFD_CRAT_H_INCLUDED */