drivers/gpu/drm/amd/amdgpu/r600_dpm.h

   1 /*
   2  * Copyright 2011 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23 #ifndef __R600_DPM_H__
  24 #define __R600_DPM_H__
  25
  26 #define R600_ASI_DFLT                                10000
  27 #define R600_BSP_DFLT                                0x41EB
  28 #define R600_BSU_DFLT                                0x2
  29 #define R600_AH_DFLT                                 5
  30 #define R600_RLP_DFLT                                25
  31 #define R600_RMP_DFLT                                65
  32 #define R600_LHP_DFLT                                40
  33 #define R600_LMP_DFLT                                15
  34 #define R600_TD_DFLT                                 0
  35 #define R600_UTC_DFLT_00                             0x24
  36 #define R600_UTC_DFLT_01                             0x22
  37 #define R600_UTC_DFLT_02                             0x22
  38 #define R600_UTC_DFLT_03                             0x22
  39 #define R600_UTC_DFLT_04                             0x22
  40 #define R600_UTC_DFLT_05                             0x22
  41 #define R600_UTC_DFLT_06                             0x22
  42 #define R600_UTC_DFLT_07                             0x22
  43 #define R600_UTC_DFLT_08                             0x22
  44 #define R600_UTC_DFLT_09                             0x22
  45 #define R600_UTC_DFLT_10                             0x22
  46 #define R600_UTC_DFLT_11                             0x22
  47 #define R600_UTC_DFLT_12                             0x22
  48 #define R600_UTC_DFLT_13                             0x22
  49 #define R600_UTC_DFLT_14                             0x22
  50 #define R600_DTC_DFLT_00                             0x24
  51 #define R600_DTC_DFLT_01                             0x22
  52 #define R600_DTC_DFLT_02                             0x22
  53 #define R600_DTC_DFLT_03                             0x22
  54 #define R600_DTC_DFLT_04                             0x22
  55 #define R600_DTC_DFLT_05                             0x22
  56 #define R600_DTC_DFLT_06                             0x22
  57 #define R600_DTC_DFLT_07                             0x22
  58 #define R600_DTC_DFLT_08                             0x22
  59 #define R600_DTC_DFLT_09                             0x22
  60 #define R600_DTC_DFLT_10                             0x22
  61 #define R600_DTC_DFLT_11                             0x22
  62 #define R600_DTC_DFLT_12                             0x22
  63 #define R600_DTC_DFLT_13                             0x22
  64 #define R600_DTC_DFLT_14                             0x22
  65 #define R600_VRC_DFLT                                0x0000C003
  66 #define R600_VOLTAGERESPONSETIME_DFLT                1000
  67 #define R600_BACKBIASRESPONSETIME_DFLT               1000
  68 #define R600_VRU_DFLT                                0x3
  69 #define R600_SPLLSTEPTIME_DFLT                       0x1000
  70 #define R600_SPLLSTEPUNIT_DFLT                       0x3
  71 #define R600_TPU_DFLT                                0
  72 #define R600_TPC_DFLT                                0x200
  73 #define R600_SSTU_DFLT                               0
  74 #define R600_SST_DFLT                                0x00C8
  75 #define R600_GICST_DFLT                              0x200
  76 #define R600_FCT_DFLT                                0x0400
  77 #define R600_FCTU_DFLT                               0
  78 #define R600_CTXCGTT3DRPHC_DFLT                      0x20
  79 #define R600_CTXCGTT3DRSDC_DFLT                      0x40
  80 #define R600_VDDC3DOORPHC_DFLT                       0x100
  81 #define R600_VDDC3DOORSDC_DFLT                       0x7
  82 #define R600_VDDC3DOORSU_DFLT                        0
  83 #define R600_MPLLLOCKTIME_DFLT                       100
  84 #define R600_MPLLRESETTIME_DFLT                      150
  85 #define R600_VCOSTEPPCT_DFLT                          20
  86 #define R600_ENDINGVCOSTEPPCT_DFLT                    5
  87 #define R600_REFERENCEDIVIDER_DFLT                    4
  88
  89 #define R600_PM_NUMBER_OF_TC 15
  90 #define R600_PM_NUMBER_OF_SCLKS 20
  91 #define R600_PM_NUMBER_OF_MCLKS 4
  92 #define R600_PM_NUMBER_OF_VOLTAGE_LEVELS 4
  93 #define R600_PM_NUMBER_OF_ACTIVITY_LEVELS 3
  94
  95 /* XXX are these ok? */
  96 #define R600_TEMP_RANGE_MIN (90 * 1000)
  97 #define R600_TEMP_RANGE_MAX (120 * 1000)
  98
  99 #define FDO_PWM_MODE_STATIC  1
 100 #define FDO_PWM_MODE_STATIC_RPM 5
 101
 102 enum r600_power_level {
 103         R600_POWER_LEVEL_LOW = 0,
 104         R600_POWER_LEVEL_MEDIUM = 1,
 105         R600_POWER_LEVEL_HIGH = 2,
 106         R600_POWER_LEVEL_CTXSW = 3,
 107 };
 108
 109 enum r600_td {
 110         R600_TD_AUTO,
 111         R600_TD_UP,
 112         R600_TD_DOWN,
 113 };
 114
 115 enum r600_display_watermark {
 116         R600_DISPLAY_WATERMARK_LOW = 0,
 117         R600_DISPLAY_WATERMARK_HIGH = 1,
 118 };
 119
 120 enum r600_display_gap
 121 {
 122     R600_PM_DISPLAY_GAP_VBLANK_OR_WM = 0,
 123     R600_PM_DISPLAY_GAP_VBLANK       = 1,
 124     R600_PM_DISPLAY_GAP_WATERMARK    = 2,
 125     R600_PM_DISPLAY_GAP_IGNORE       = 3,
 126 };
 127 #endif