2 * Copyright 2017 Valve Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Andres Rodriguez <andresx7@gmail.com>
25 #include <linux/fdtable.h>
26 #include <linux/pid.h>
27 #include <drm/amdgpu_drm.h>
30 #include "amdgpu_vm.h"
32 enum drm_sched_priority amdgpu_to_sched_priority(int amdgpu_priority)
34 switch (amdgpu_priority) {
35 case AMDGPU_CTX_PRIORITY_VERY_HIGH:
36 return DRM_SCHED_PRIORITY_HIGH_HW;
37 case AMDGPU_CTX_PRIORITY_HIGH:
38 return DRM_SCHED_PRIORITY_HIGH_SW;
39 case AMDGPU_CTX_PRIORITY_NORMAL:
40 return DRM_SCHED_PRIORITY_NORMAL;
41 case AMDGPU_CTX_PRIORITY_LOW:
42 case AMDGPU_CTX_PRIORITY_VERY_LOW:
43 return DRM_SCHED_PRIORITY_LOW;
44 case AMDGPU_CTX_PRIORITY_UNSET:
45 return DRM_SCHED_PRIORITY_UNSET;
47 WARN(1, "Invalid context priority %d\n", amdgpu_priority);
48 return DRM_SCHED_PRIORITY_INVALID;
52 static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev,
54 enum drm_sched_priority priority)
56 struct file *filp = fget(fd);
57 struct amdgpu_fpriv *fpriv;
58 struct amdgpu_ctx_mgr *mgr;
59 struct amdgpu_ctx *ctx;
66 r = amdgpu_file_to_fpriv(filp, &fpriv);
72 mgr = &fpriv->ctx_mgr;
73 mutex_lock(&mgr->lock);
74 idr_for_each_entry(&mgr->ctx_handles, ctx, id)
75 amdgpu_ctx_priority_override(ctx, priority);
76 mutex_unlock(&mgr->lock);
83 static int amdgpu_sched_context_priority_override(struct amdgpu_device *adev,
86 enum drm_sched_priority priority)
88 struct file *filp = fget(fd);
89 struct amdgpu_fpriv *fpriv;
90 struct amdgpu_ctx *ctx;
96 r = amdgpu_file_to_fpriv(filp, &fpriv);
102 ctx = amdgpu_ctx_get(fpriv, ctx_id);
109 amdgpu_ctx_priority_override(ctx, priority);
116 int amdgpu_sched_ioctl(struct drm_device *dev, void *data,
117 struct drm_file *filp)
119 union drm_amdgpu_sched *args = data;
120 struct amdgpu_device *adev = dev->dev_private;
121 enum drm_sched_priority priority;
124 priority = amdgpu_to_sched_priority(args->in.priority);
125 if (priority == DRM_SCHED_PRIORITY_INVALID)
128 switch (args->in.op) {
129 case AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE:
130 r = amdgpu_sched_process_priority_override(adev,
134 case AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE:
135 r = amdgpu_sched_context_priority_override(adev,
141 DRM_ERROR("Invalid sched op specified: %d\n", args->in.op);