2 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
27 #include "amd_shared.h"
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include "amdgpu_pm.h"
31 #include <drm/amdgpu_drm.h>
32 #include "amdgpu_powerplay.h"
37 static int amdgpu_powerplay_init(struct amdgpu_device *adev)
40 struct amd_powerplay *amd_pp;
42 amd_pp = &(adev->powerplay);
44 if (adev->pp_enabled) {
45 struct amd_pp_init *pp_init;
47 pp_init = kzalloc(sizeof(struct amd_pp_init), GFP_KERNEL);
52 pp_init->chip_family = adev->family;
53 pp_init->chip_id = adev->asic_type;
54 pp_init->device = amdgpu_cgs_create_device(adev);
55 ret = amd_powerplay_init(pp_init, amd_pp);
58 amd_pp->pp_handle = (void *)adev;
60 switch (adev->asic_type) {
61 #ifdef CONFIG_DRM_AMDGPU_SI
67 amd_pp->ip_funcs = &si_dpm_ip_funcs;
70 #ifdef CONFIG_DRM_AMDGPU_CIK
73 amd_pp->ip_funcs = &ci_dpm_ip_funcs;
78 amd_pp->ip_funcs = &kv_dpm_ip_funcs;
83 amd_pp->ip_funcs = &cz_dpm_ip_funcs;
93 static int amdgpu_pp_early_init(void *handle)
95 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
98 switch (adev->asic_type) {
104 adev->pp_enabled = true;
108 adev->pp_enabled = (amdgpu_powerplay == 0) ? false : true;
110 /* These chips don't have powerplay implemenations */
117 adev->pp_enabled = false;
121 ret = amdgpu_powerplay_init(adev);
125 if (adev->powerplay.ip_funcs->early_init)
126 ret = adev->powerplay.ip_funcs->early_init(
127 adev->powerplay.pp_handle);
132 static int amdgpu_pp_late_init(void *handle)
135 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
137 if (adev->powerplay.ip_funcs->late_init)
138 ret = adev->powerplay.ip_funcs->late_init(
139 adev->powerplay.pp_handle);
141 if (adev->pp_enabled && adev->pm.dpm_enabled) {
142 amdgpu_pm_sysfs_init(adev);
143 amdgpu_dpm_dispatch_task(adev, AMD_PP_EVENT_COMPLETE_INIT, NULL, NULL);
149 static int amdgpu_pp_sw_init(void *handle)
152 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
154 if (adev->powerplay.ip_funcs->sw_init)
155 ret = adev->powerplay.ip_funcs->sw_init(
156 adev->powerplay.pp_handle);
158 if (adev->pp_enabled)
159 adev->pm.dpm_enabled = true;
164 static int amdgpu_pp_sw_fini(void *handle)
167 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
169 if (adev->powerplay.ip_funcs->sw_fini)
170 ret = adev->powerplay.ip_funcs->sw_fini(
171 adev->powerplay.pp_handle);
178 static int amdgpu_pp_hw_init(void *handle)
181 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
183 if (adev->pp_enabled && adev->firmware.smu_load)
184 amdgpu_ucode_init_bo(adev);
186 if (adev->powerplay.ip_funcs->hw_init)
187 ret = adev->powerplay.ip_funcs->hw_init(
188 adev->powerplay.pp_handle);
193 static int amdgpu_pp_hw_fini(void *handle)
196 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
198 if (adev->powerplay.ip_funcs->hw_fini)
199 ret = adev->powerplay.ip_funcs->hw_fini(
200 adev->powerplay.pp_handle);
202 if (adev->pp_enabled && adev->firmware.smu_load)
203 amdgpu_ucode_fini_bo(adev);
208 static void amdgpu_pp_late_fini(void *handle)
210 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
212 if (adev->pp_enabled) {
213 amdgpu_pm_sysfs_fini(adev);
214 amd_powerplay_fini(adev->powerplay.pp_handle);
217 if (adev->powerplay.ip_funcs->late_fini)
218 adev->powerplay.ip_funcs->late_fini(
219 adev->powerplay.pp_handle);
222 static int amdgpu_pp_suspend(void *handle)
225 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
227 if (adev->powerplay.ip_funcs->suspend)
228 ret = adev->powerplay.ip_funcs->suspend(
229 adev->powerplay.pp_handle);
233 static int amdgpu_pp_resume(void *handle)
236 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
238 if (adev->powerplay.ip_funcs->resume)
239 ret = adev->powerplay.ip_funcs->resume(
240 adev->powerplay.pp_handle);
244 static int amdgpu_pp_set_clockgating_state(void *handle,
245 enum amd_clockgating_state state)
248 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
250 if (adev->powerplay.ip_funcs->set_clockgating_state)
251 ret = adev->powerplay.ip_funcs->set_clockgating_state(
252 adev->powerplay.pp_handle, state);
256 static int amdgpu_pp_set_powergating_state(void *handle,
257 enum amd_powergating_state state)
260 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
262 if (adev->powerplay.ip_funcs->set_powergating_state)
263 ret = adev->powerplay.ip_funcs->set_powergating_state(
264 adev->powerplay.pp_handle, state);
269 static bool amdgpu_pp_is_idle(void *handle)
272 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
274 if (adev->powerplay.ip_funcs->is_idle)
275 ret = adev->powerplay.ip_funcs->is_idle(
276 adev->powerplay.pp_handle);
280 static int amdgpu_pp_wait_for_idle(void *handle)
283 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
285 if (adev->powerplay.ip_funcs->wait_for_idle)
286 ret = adev->powerplay.ip_funcs->wait_for_idle(
287 adev->powerplay.pp_handle);
291 static int amdgpu_pp_soft_reset(void *handle)
294 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
296 if (adev->powerplay.ip_funcs->soft_reset)
297 ret = adev->powerplay.ip_funcs->soft_reset(
298 adev->powerplay.pp_handle);
302 const struct amd_ip_funcs amdgpu_pp_ip_funcs = {
303 .name = "amdgpu_powerplay",
304 .early_init = amdgpu_pp_early_init,
305 .late_init = amdgpu_pp_late_init,
306 .sw_init = amdgpu_pp_sw_init,
307 .sw_fini = amdgpu_pp_sw_fini,
308 .hw_init = amdgpu_pp_hw_init,
309 .hw_fini = amdgpu_pp_hw_fini,
310 .late_fini = amdgpu_pp_late_fini,
311 .suspend = amdgpu_pp_suspend,
312 .resume = amdgpu_pp_resume,
313 .is_idle = amdgpu_pp_is_idle,
314 .wait_for_idle = amdgpu_pp_wait_for_idle,
315 .soft_reset = amdgpu_pp_soft_reset,
316 .set_clockgating_state = amdgpu_pp_set_clockgating_state,
317 .set_powergating_state = amdgpu_pp_set_powergating_state,