drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c

   1 /*
   2  * Copyright 2007-8 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors: Dave Airlie
  24  *          Alex Deucher
  25  */
  26 #include <drm/drmP.h>
  27 #include <drm/drm_edid.h>
  28 #include <drm/drm_crtc_helper.h>
  29 #include <drm/drm_fb_helper.h>
  30 #include <drm/amdgpu_drm.h>
  31 #include "amdgpu.h"
  32 #include "atom.h"
  33 #include "atombios_encoders.h"
  34 #include "atombios_dp.h"
  35 #include "amdgpu_connectors.h"
  36 #include "amdgpu_i2c.h"
  37
  38 #include <linux/pm_runtime.h>
  39
  40 void amdgpu_connector_hotplug(struct drm_connector *connector)
  41 {
  42         struct drm_device *dev = connector->dev;
  43         struct amdgpu_device *adev = dev->dev_private;
  44         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
  45
  46         /* bail if the connector does not have hpd pin, e.g.,
  47          * VGA, TV, etc.
  48          */
  49         if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE)
  50                 return;
  51
  52         amdgpu_display_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd);
  53
  54         /* if the connector is already off, don't turn it back on */
  55         if (connector->dpms != DRM_MODE_DPMS_ON)
  56                 return;
  57
  58         /* just deal with DP (not eDP) here. */
  59         if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
  60                 struct amdgpu_connector_atom_dig *dig_connector =
  61                         amdgpu_connector->con_priv;
  62
  63                 /* if existing sink type was not DP no need to retrain */
  64                 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
  65                         return;
  66
  67                 /* first get sink type as it may be reset after (un)plug */
  68                 dig_connector->dp_sink_type = amdgpu_atombios_dp_get_sinktype(amdgpu_connector);
  69                 /* don't do anything if sink is not display port, i.e.,
  70                  * passive dp->(dvi|hdmi) adaptor
  71                  */
  72                 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT &&
  73                     amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd) &&
  74                     amdgpu_atombios_dp_needs_link_train(amdgpu_connector)) {
  75                         /* Don't start link training before we have the DPCD */
  76                         if (amdgpu_atombios_dp_get_dpcd(amdgpu_connector))
  77                                 return;
  78
  79                         /* Turn the connector off and back on immediately, which
  80                          * will trigger link training
  81                          */
  82                         drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
  83                         drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
  84                 }
  85         }
  86 }
  87
  88 static void amdgpu_connector_property_change_mode(struct drm_encoder *encoder)
  89 {
  90         struct drm_crtc *crtc = encoder->crtc;
  91
  92         if (crtc && crtc->enabled) {
  93                 drm_crtc_helper_set_mode(crtc, &crtc->mode,
  94                                          crtc->x, crtc->y, crtc->primary->fb);
  95         }
  96 }
  97
  98 int amdgpu_connector_get_monitor_bpc(struct drm_connector *connector)
  99 {
 100         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 101         struct amdgpu_connector_atom_dig *dig_connector;
 102         int bpc = 8;
 103         unsigned mode_clock, max_tmds_clock;
 104
 105         switch (connector->connector_type) {
 106         case DRM_MODE_CONNECTOR_DVII:
 107         case DRM_MODE_CONNECTOR_HDMIB:
 108                 if (amdgpu_connector->use_digital) {
 109                         if (drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
 110                                 if (connector->display_info.bpc)
 111                                         bpc = connector->display_info.bpc;
 112                         }
 113                 }
 114                 break;
 115         case DRM_MODE_CONNECTOR_DVID:
 116         case DRM_MODE_CONNECTOR_HDMIA:
 117                 if (drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
 118                         if (connector->display_info.bpc)
 119                                 bpc = connector->display_info.bpc;
 120                 }
 121                 break;
 122         case DRM_MODE_CONNECTOR_DisplayPort:
 123                 dig_connector = amdgpu_connector->con_priv;
 124                 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
 125                     (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
 126                     drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
 127                         if (connector->display_info.bpc)
 128                                 bpc = connector->display_info.bpc;
 129                 }
 130                 break;
 131         case DRM_MODE_CONNECTOR_eDP:
 132         case DRM_MODE_CONNECTOR_LVDS:
 133                 if (connector->display_info.bpc)
 134                         bpc = connector->display_info.bpc;
 135                 else {
 136                         const struct drm_connector_helper_funcs *connector_funcs =
 137                                 connector->helper_private;
 138                         struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
 139                         struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
 140                         struct amdgpu_encoder_atom_dig *dig = amdgpu_encoder->enc_priv;
 141
 142                         if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
 143                                 bpc = 6;
 144                         else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
 145                                 bpc = 8;
 146                 }
 147                 break;
 148         }
 149
 150         if (drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
 151                 /*
 152                  * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
 153                  * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
 154                  * 12 bpc is always supported on hdmi deep color sinks, as this is
 155                  * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
 156                  */
 157                 if (bpc > 12) {
 158                         DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
 159                                   connector->name, bpc);
 160                         bpc = 12;
 161                 }
 162
 163                 /* Any defined maximum tmds clock limit we must not exceed? */
 164                 if (connector->display_info.max_tmds_clock > 0) {
 165                         /* mode_clock is clock in kHz for mode to be modeset on this connector */
 166                         mode_clock = amdgpu_connector->pixelclock_for_modeset;
 167
 168                         /* Maximum allowable input clock in kHz */
 169                         max_tmds_clock = connector->display_info.max_tmds_clock;
 170
 171                         DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
 172                                   connector->name, mode_clock, max_tmds_clock);
 173
 174                         /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
 175                         if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
 176                                 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
 177                                     (mode_clock * 5/4 <= max_tmds_clock))
 178                                         bpc = 10;
 179                                 else
 180                                         bpc = 8;
 181
 182                                 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
 183                                           connector->name, bpc);
 184                         }
 185
 186                         if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
 187                                 bpc = 8;
 188                                 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
 189                                           connector->name, bpc);
 190                         }
 191                 } else if (bpc > 8) {
 192                         /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */
 193                         DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
 194                                   connector->name);
 195                         bpc = 8;
 196                 }
 197         }
 198
 199         if ((amdgpu_deep_color == 0) && (bpc > 8)) {
 200                 DRM_DEBUG("%s: Deep color disabled. Set amdgpu module param deep_color=1 to enable.\n",
 201                           connector->name);
 202                 bpc = 8;
 203         }
 204
 205         DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
 206                   connector->name, connector->display_info.bpc, bpc);
 207
 208         return bpc;
 209 }
 210
 211 static void
 212 amdgpu_connector_update_scratch_regs(struct drm_connector *connector,
 213                                       enum drm_connector_status status)
 214 {
 215         struct drm_encoder *best_encoder = NULL;
 216         struct drm_encoder *encoder = NULL;
 217         const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
 218         bool connected;
 219         int i;
 220
 221         best_encoder = connector_funcs->best_encoder(connector);
 222
 223         for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
 224                 if (connector->encoder_ids[i] == 0)
 225                         break;
 226
 227                 encoder = drm_encoder_find(connector->dev,
 228                                         connector->encoder_ids[i]);
 229                 if (!encoder)
 230                         continue;
 231
 232                 if ((encoder == best_encoder) && (status == connector_status_connected))
 233                         connected = true;
 234                 else
 235                         connected = false;
 236
 237                 amdgpu_atombios_encoder_set_bios_scratch_regs(connector, encoder, connected);
 238
 239         }
 240 }
 241
 242 static struct drm_encoder *
 243 amdgpu_connector_find_encoder(struct drm_connector *connector,
 244                                int encoder_type)
 245 {
 246         struct drm_encoder *encoder;
 247         int i;
 248
 249         for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
 250                 if (connector->encoder_ids[i] == 0)
 251                         break;
 252                 encoder = drm_encoder_find(connector->dev,
 253                                         connector->encoder_ids[i]);
 254                 if (!encoder)
 255                         continue;
 256
 257                 if (encoder->encoder_type == encoder_type)
 258                         return encoder;
 259         }
 260         return NULL;
 261 }
 262
 263 struct edid *amdgpu_connector_edid(struct drm_connector *connector)
 264 {
 265         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 266         struct drm_property_blob *edid_blob = connector->edid_blob_ptr;
 267
 268         if (amdgpu_connector->edid) {
 269                 return amdgpu_connector->edid;
 270         } else if (edid_blob) {
 271                 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL);
 272                 if (edid)
 273                         amdgpu_connector->edid = edid;
 274         }
 275         return amdgpu_connector->edid;
 276 }
 277
 278 static struct edid *
 279 amdgpu_connector_get_hardcoded_edid(struct amdgpu_device *adev)
 280 {
 281         struct edid *edid;
 282
 283         if (adev->mode_info.bios_hardcoded_edid) {
 284                 edid = kmalloc(adev->mode_info.bios_hardcoded_edid_size, GFP_KERNEL);
 285                 if (edid) {
 286                         memcpy((unsigned char *)edid,
 287                                (unsigned char *)adev->mode_info.bios_hardcoded_edid,
 288                                adev->mode_info.bios_hardcoded_edid_size);
 289                         return edid;
 290                 }
 291         }
 292         return NULL;
 293 }
 294
 295 static void amdgpu_connector_get_edid(struct drm_connector *connector)
 296 {
 297         struct drm_device *dev = connector->dev;
 298         struct amdgpu_device *adev = dev->dev_private;
 299         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 300
 301         if (amdgpu_connector->edid)
 302                 return;
 303
 304         /* on hw with routers, select right port */
 305         if (amdgpu_connector->router.ddc_valid)
 306                 amdgpu_i2c_router_select_ddc_port(amdgpu_connector);
 307
 308         if ((amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) !=
 309              ENCODER_OBJECT_ID_NONE) &&
 310             amdgpu_connector->ddc_bus->has_aux) {
 311                 amdgpu_connector->edid = drm_get_edid(connector,
 312                                                       &amdgpu_connector->ddc_bus->aux.ddc);
 313         } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
 314                    (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
 315                 struct amdgpu_connector_atom_dig *dig = amdgpu_connector->con_priv;
 316
 317                 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
 318                      dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
 319                     amdgpu_connector->ddc_bus->has_aux)
 320                         amdgpu_connector->edid = drm_get_edid(connector,
 321                                                               &amdgpu_connector->ddc_bus->aux.ddc);
 322                 else if (amdgpu_connector->ddc_bus)
 323                         amdgpu_connector->edid = drm_get_edid(connector,
 324                                                               &amdgpu_connector->ddc_bus->adapter);
 325         } else if (amdgpu_connector->ddc_bus) {
 326                 amdgpu_connector->edid = drm_get_edid(connector,
 327                                                       &amdgpu_connector->ddc_bus->adapter);
 328         }
 329
 330         if (!amdgpu_connector->edid) {
 331                 /* some laptops provide a hardcoded edid in rom for LCDs */
 332                 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
 333                      (connector->connector_type == DRM_MODE_CONNECTOR_eDP)))
 334                         amdgpu_connector->edid = amdgpu_connector_get_hardcoded_edid(adev);
 335         }
 336 }
 337
 338 static void amdgpu_connector_free_edid(struct drm_connector *connector)
 339 {
 340         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 341
 342         if (amdgpu_connector->edid) {
 343                 kfree(amdgpu_connector->edid);
 344                 amdgpu_connector->edid = NULL;
 345         }
 346 }
 347
 348 static int amdgpu_connector_ddc_get_modes(struct drm_connector *connector)
 349 {
 350         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 351         int ret;
 352
 353         if (amdgpu_connector->edid) {
 354                 drm_mode_connector_update_edid_property(connector, amdgpu_connector->edid);
 355                 ret = drm_add_edid_modes(connector, amdgpu_connector->edid);
 356                 drm_edid_to_eld(connector, amdgpu_connector->edid);
 357                 return ret;
 358         }
 359         drm_mode_connector_update_edid_property(connector, NULL);
 360         return 0;
 361 }
 362
 363 static struct drm_encoder *
 364 amdgpu_connector_best_single_encoder(struct drm_connector *connector)
 365 {
 366         int enc_id = connector->encoder_ids[0];
 367
 368         /* pick the encoder ids */
 369         if (enc_id)
 370                 return drm_encoder_find(connector->dev, enc_id);
 371         return NULL;
 372 }
 373
 374 static void amdgpu_get_native_mode(struct drm_connector *connector)
 375 {
 376         struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
 377         struct amdgpu_encoder *amdgpu_encoder;
 378
 379         if (encoder == NULL)
 380                 return;
 381
 382         amdgpu_encoder = to_amdgpu_encoder(encoder);
 383
 384         if (!list_empty(&connector->probed_modes)) {
 385                 struct drm_display_mode *preferred_mode =
 386                         list_first_entry(&connector->probed_modes,
 387                                          struct drm_display_mode, head);
 388
 389                 amdgpu_encoder->native_mode = *preferred_mode;
 390         } else {
 391                 amdgpu_encoder->native_mode.clock = 0;
 392         }
 393 }
 394
 395 static struct drm_display_mode *
 396 amdgpu_connector_lcd_native_mode(struct drm_encoder *encoder)
 397 {
 398         struct drm_device *dev = encoder->dev;
 399         struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
 400         struct drm_display_mode *mode = NULL;
 401         struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
 402
 403         if (native_mode->hdisplay != 0 &&
 404             native_mode->vdisplay != 0 &&
 405             native_mode->clock != 0) {
 406                 mode = drm_mode_duplicate(dev, native_mode);
 407                 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
 408                 drm_mode_set_name(mode);
 409
 410                 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
 411         } else if (native_mode->hdisplay != 0 &&
 412                    native_mode->vdisplay != 0) {
 413                 /* mac laptops without an edid */
 414                 /* Note that this is not necessarily the exact panel mode,
 415                  * but an approximation based on the cvt formula.  For these
 416                  * systems we should ideally read the mode info out of the
 417                  * registers or add a mode table, but this works and is much
 418                  * simpler.
 419                  */
 420                 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
 421                 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
 422                 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
 423         }
 424         return mode;
 425 }
 426
 427 static void amdgpu_connector_add_common_modes(struct drm_encoder *encoder,
 428                                                struct drm_connector *connector)
 429 {
 430         struct drm_device *dev = encoder->dev;
 431         struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
 432         struct drm_display_mode *mode = NULL;
 433         struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
 434         int i;
 435         static const struct mode_size {
 436                 int w;
 437                 int h;
 438         } common_modes[17] = {
 439                 { 640,  480},
 440                 { 720,  480},
 441                 { 800,  600},
 442                 { 848,  480},
 443                 {1024,  768},
 444                 {1152,  768},
 445                 {1280,  720},
 446                 {1280,  800},
 447                 {1280,  854},
 448                 {1280,  960},
 449                 {1280, 1024},
 450                 {1440,  900},
 451                 {1400, 1050},
 452                 {1680, 1050},
 453                 {1600, 1200},
 454                 {1920, 1080},
 455                 {1920, 1200}
 456         };
 457
 458         for (i = 0; i < 17; i++) {
 459                 if (amdgpu_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
 460                         if (common_modes[i].w > 1024 ||
 461                             common_modes[i].h > 768)
 462                                 continue;
 463                 }
 464                 if (amdgpu_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
 465                         if (common_modes[i].w > native_mode->hdisplay ||
 466                             common_modes[i].h > native_mode->vdisplay ||
 467                             (common_modes[i].w == native_mode->hdisplay &&
 468                              common_modes[i].h == native_mode->vdisplay))
 469                                 continue;
 470                 }
 471                 if (common_modes[i].w < 320 || common_modes[i].h < 200)
 472                         continue;
 473
 474                 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
 475                 drm_mode_probed_add(connector, mode);
 476         }
 477 }
 478
 479 static int amdgpu_connector_set_property(struct drm_connector *connector,
 480                                           struct drm_property *property,
 481                                           uint64_t val)
 482 {
 483         struct drm_device *dev = connector->dev;
 484         struct amdgpu_device *adev = dev->dev_private;
 485         struct drm_encoder *encoder;
 486         struct amdgpu_encoder *amdgpu_encoder;
 487
 488         if (property == adev->mode_info.coherent_mode_property) {
 489                 struct amdgpu_encoder_atom_dig *dig;
 490                 bool new_coherent_mode;
 491
 492                 /* need to find digital encoder on connector */
 493                 encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
 494                 if (!encoder)
 495                         return 0;
 496
 497                 amdgpu_encoder = to_amdgpu_encoder(encoder);
 498
 499                 if (!amdgpu_encoder->enc_priv)
 500                         return 0;
 501
 502                 dig = amdgpu_encoder->enc_priv;
 503                 new_coherent_mode = val ? true : false;
 504                 if (dig->coherent_mode != new_coherent_mode) {
 505                         dig->coherent_mode = new_coherent_mode;
 506                         amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
 507                 }
 508         }
 509
 510         if (property == adev->mode_info.audio_property) {
 511                 struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 512                 /* need to find digital encoder on connector */
 513                 encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
 514                 if (!encoder)
 515                         return 0;
 516
 517                 amdgpu_encoder = to_amdgpu_encoder(encoder);
 518
 519                 if (amdgpu_connector->audio != val) {
 520                         amdgpu_connector->audio = val;
 521                         amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
 522                 }
 523         }
 524
 525         if (property == adev->mode_info.dither_property) {
 526                 struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 527                 /* need to find digital encoder on connector */
 528                 encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
 529                 if (!encoder)
 530                         return 0;
 531
 532                 amdgpu_encoder = to_amdgpu_encoder(encoder);
 533
 534                 if (amdgpu_connector->dither != val) {
 535                         amdgpu_connector->dither = val;
 536                         amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
 537                 }
 538         }
 539
 540         if (property == adev->mode_info.underscan_property) {
 541                 /* need to find digital encoder on connector */
 542                 encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
 543                 if (!encoder)
 544                         return 0;
 545
 546                 amdgpu_encoder = to_amdgpu_encoder(encoder);
 547
 548                 if (amdgpu_encoder->underscan_type != val) {
 549                         amdgpu_encoder->underscan_type = val;
 550                         amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
 551                 }
 552         }
 553
 554         if (property == adev->mode_info.underscan_hborder_property) {
 555                 /* need to find digital encoder on connector */
 556                 encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
 557                 if (!encoder)
 558                         return 0;
 559
 560                 amdgpu_encoder = to_amdgpu_encoder(encoder);
 561
 562                 if (amdgpu_encoder->underscan_hborder != val) {
 563                         amdgpu_encoder->underscan_hborder = val;
 564                         amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
 565                 }
 566         }
 567
 568         if (property == adev->mode_info.underscan_vborder_property) {
 569                 /* need to find digital encoder on connector */
 570                 encoder = amdgpu_connector_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
 571                 if (!encoder)
 572                         return 0;
 573
 574                 amdgpu_encoder = to_amdgpu_encoder(encoder);
 575
 576                 if (amdgpu_encoder->underscan_vborder != val) {
 577                         amdgpu_encoder->underscan_vborder = val;
 578                         amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
 579                 }
 580         }
 581
 582         if (property == adev->mode_info.load_detect_property) {
 583                 struct amdgpu_connector *amdgpu_connector =
 584                         to_amdgpu_connector(connector);
 585
 586                 if (val == 0)
 587                         amdgpu_connector->dac_load_detect = false;
 588                 else
 589                         amdgpu_connector->dac_load_detect = true;
 590         }
 591
 592         if (property == dev->mode_config.scaling_mode_property) {
 593                 enum amdgpu_rmx_type rmx_type;
 594
 595                 if (connector->encoder) {
 596                         amdgpu_encoder = to_amdgpu_encoder(connector->encoder);
 597                 } else {
 598                         const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
 599                         amdgpu_encoder = to_amdgpu_encoder(connector_funcs->best_encoder(connector));
 600                 }
 601
 602                 switch (val) {
 603                 default:
 604                 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
 605                 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
 606                 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
 607                 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
 608                 }
 609                 if (amdgpu_encoder->rmx_type == rmx_type)
 610                         return 0;
 611
 612                 if ((rmx_type != DRM_MODE_SCALE_NONE) &&
 613                     (amdgpu_encoder->native_mode.clock == 0))
 614                         return 0;
 615
 616                 amdgpu_encoder->rmx_type = rmx_type;
 617
 618                 amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
 619         }
 620
 621         return 0;
 622 }
 623
 624 static void
 625 amdgpu_connector_fixup_lcd_native_mode(struct drm_encoder *encoder,
 626                                         struct drm_connector *connector)
 627 {
 628         struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
 629         struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
 630         struct drm_display_mode *t, *mode;
 631
 632         /* If the EDID preferred mode doesn't match the native mode, use it */
 633         list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
 634                 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
 635                         if (mode->hdisplay != native_mode->hdisplay ||
 636                             mode->vdisplay != native_mode->vdisplay)
 637                                 memcpy(native_mode, mode, sizeof(*mode));
 638                 }
 639         }
 640
 641         /* Try to get native mode details from EDID if necessary */
 642         if (!native_mode->clock) {
 643                 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
 644                         if (mode->hdisplay == native_mode->hdisplay &&
 645                             mode->vdisplay == native_mode->vdisplay) {
 646                                 *native_mode = *mode;
 647                                 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
 648                                 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
 649                                 break;
 650                         }
 651                 }
 652         }
 653
 654         if (!native_mode->clock) {
 655                 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
 656                 amdgpu_encoder->rmx_type = RMX_OFF;
 657         }
 658 }
 659
 660 static int amdgpu_connector_lvds_get_modes(struct drm_connector *connector)
 661 {
 662         struct drm_encoder *encoder;
 663         int ret = 0;
 664         struct drm_display_mode *mode;
 665
 666         amdgpu_connector_get_edid(connector);
 667         ret = amdgpu_connector_ddc_get_modes(connector);
 668         if (ret > 0) {
 669                 encoder = amdgpu_connector_best_single_encoder(connector);
 670                 if (encoder) {
 671                         amdgpu_connector_fixup_lcd_native_mode(encoder, connector);
 672                         /* add scaled modes */
 673                         amdgpu_connector_add_common_modes(encoder, connector);
 674                 }
 675                 return ret;
 676         }
 677
 678         encoder = amdgpu_connector_best_single_encoder(connector);
 679         if (!encoder)
 680                 return 0;
 681
 682         /* we have no EDID modes */
 683         mode = amdgpu_connector_lcd_native_mode(encoder);
 684         if (mode) {
 685                 ret = 1;
 686                 drm_mode_probed_add(connector, mode);
 687                 /* add the width/height from vbios tables if available */
 688                 connector->display_info.width_mm = mode->width_mm;
 689                 connector->display_info.height_mm = mode->height_mm;
 690                 /* add scaled modes */
 691                 amdgpu_connector_add_common_modes(encoder, connector);
 692         }
 693
 694         return ret;
 695 }
 696
 697 static int amdgpu_connector_lvds_mode_valid(struct drm_connector *connector,
 698                                              struct drm_display_mode *mode)
 699 {
 700         struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
 701
 702         if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
 703                 return MODE_PANEL;
 704
 705         if (encoder) {
 706                 struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
 707                 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
 708
 709                 /* AVIVO hardware supports downscaling modes larger than the panel
 710                  * to the panel size, but I'm not sure this is desirable.
 711                  */
 712                 if ((mode->hdisplay > native_mode->hdisplay) ||
 713                     (mode->vdisplay > native_mode->vdisplay))
 714                         return MODE_PANEL;
 715
 716                 /* if scaling is disabled, block non-native modes */
 717                 if (amdgpu_encoder->rmx_type == RMX_OFF) {
 718                         if ((mode->hdisplay != native_mode->hdisplay) ||
 719                             (mode->vdisplay != native_mode->vdisplay))
 720                                 return MODE_PANEL;
 721                 }
 722         }
 723
 724         return MODE_OK;
 725 }
 726
 727 static enum drm_connector_status
 728 amdgpu_connector_lvds_detect(struct drm_connector *connector, bool force)
 729 {
 730         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 731         struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
 732         enum drm_connector_status ret = connector_status_disconnected;
 733         int r;
 734
 735         if (!drm_kms_helper_is_poll_worker()) {
 736                 r = pm_runtime_get_sync(connector->dev->dev);
 737                 if (r < 0) {
 738                         pm_runtime_put_autosuspend(connector->dev->dev);
 739                         return connector_status_disconnected;
 740                 }
 741         }
 742
 743         if (encoder) {
 744                 struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
 745                 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
 746
 747                 /* check if panel is valid */
 748                 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
 749                         ret = connector_status_connected;
 750
 751         }
 752
 753         /* check for edid as well */
 754         amdgpu_connector_get_edid(connector);
 755         if (amdgpu_connector->edid)
 756                 ret = connector_status_connected;
 757         /* check acpi lid status ??? */
 758
 759         amdgpu_connector_update_scratch_regs(connector, ret);
 760
 761         if (!drm_kms_helper_is_poll_worker()) {
 762                 pm_runtime_mark_last_busy(connector->dev->dev);
 763                 pm_runtime_put_autosuspend(connector->dev->dev);
 764         }
 765
 766         return ret;
 767 }
 768
 769 static void amdgpu_connector_unregister(struct drm_connector *connector)
 770 {
 771         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 772
 773         if (amdgpu_connector->ddc_bus && amdgpu_connector->ddc_bus->has_aux) {
 774                 drm_dp_aux_unregister(&amdgpu_connector->ddc_bus->aux);
 775                 amdgpu_connector->ddc_bus->has_aux = false;
 776         }
 777 }
 778
 779 static void amdgpu_connector_destroy(struct drm_connector *connector)
 780 {
 781         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 782
 783         amdgpu_connector_free_edid(connector);
 784         kfree(amdgpu_connector->con_priv);
 785         drm_connector_unregister(connector);
 786         drm_connector_cleanup(connector);
 787         kfree(connector);
 788 }
 789
 790 static int amdgpu_connector_set_lcd_property(struct drm_connector *connector,
 791                                               struct drm_property *property,
 792                                               uint64_t value)
 793 {
 794         struct drm_device *dev = connector->dev;
 795         struct amdgpu_encoder *amdgpu_encoder;
 796         enum amdgpu_rmx_type rmx_type;
 797
 798         DRM_DEBUG_KMS("\n");
 799         if (property != dev->mode_config.scaling_mode_property)
 800                 return 0;
 801
 802         if (connector->encoder)
 803                 amdgpu_encoder = to_amdgpu_encoder(connector->encoder);
 804         else {
 805                 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
 806                 amdgpu_encoder = to_amdgpu_encoder(connector_funcs->best_encoder(connector));
 807         }
 808
 809         switch (value) {
 810         case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
 811         case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
 812         case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
 813         default:
 814         case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
 815         }
 816         if (amdgpu_encoder->rmx_type == rmx_type)
 817                 return 0;
 818
 819         amdgpu_encoder->rmx_type = rmx_type;
 820
 821         amdgpu_connector_property_change_mode(&amdgpu_encoder->base);
 822         return 0;
 823 }
 824
 825
 826 static const struct drm_connector_helper_funcs amdgpu_connector_lvds_helper_funcs = {
 827         .get_modes = amdgpu_connector_lvds_get_modes,
 828         .mode_valid = amdgpu_connector_lvds_mode_valid,
 829         .best_encoder = amdgpu_connector_best_single_encoder,
 830 };
 831
 832 static const struct drm_connector_funcs amdgpu_connector_lvds_funcs = {
 833         .dpms = drm_helper_connector_dpms,
 834         .detect = amdgpu_connector_lvds_detect,
 835         .fill_modes = drm_helper_probe_single_connector_modes,
 836         .early_unregister = amdgpu_connector_unregister,
 837         .destroy = amdgpu_connector_destroy,
 838         .set_property = amdgpu_connector_set_lcd_property,
 839 };
 840
 841 static int amdgpu_connector_vga_get_modes(struct drm_connector *connector)
 842 {
 843         int ret;
 844
 845         amdgpu_connector_get_edid(connector);
 846         ret = amdgpu_connector_ddc_get_modes(connector);
 847         amdgpu_get_native_mode(connector);
 848
 849         return ret;
 850 }
 851
 852 static int amdgpu_connector_vga_mode_valid(struct drm_connector *connector,
 853                                             struct drm_display_mode *mode)
 854 {
 855         struct drm_device *dev = connector->dev;
 856         struct amdgpu_device *adev = dev->dev_private;
 857
 858         /* XXX check mode bandwidth */
 859
 860         if ((mode->clock / 10) > adev->clock.max_pixel_clock)
 861                 return MODE_CLOCK_HIGH;
 862
 863         return MODE_OK;
 864 }
 865
 866 static enum drm_connector_status
 867 amdgpu_connector_vga_detect(struct drm_connector *connector, bool force)
 868 {
 869         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 870         struct drm_encoder *encoder;
 871         const struct drm_encoder_helper_funcs *encoder_funcs;
 872         bool dret = false;
 873         enum drm_connector_status ret = connector_status_disconnected;
 874         int r;
 875
 876         if (!drm_kms_helper_is_poll_worker()) {
 877                 r = pm_runtime_get_sync(connector->dev->dev);
 878                 if (r < 0) {
 879                         pm_runtime_put_autosuspend(connector->dev->dev);
 880                         return connector_status_disconnected;
 881                 }
 882         }
 883
 884         encoder = amdgpu_connector_best_single_encoder(connector);
 885         if (!encoder)
 886                 ret = connector_status_disconnected;
 887
 888         if (amdgpu_connector->ddc_bus)
 889                 dret = amdgpu_ddc_probe(amdgpu_connector, false);
 890         if (dret) {
 891                 amdgpu_connector->detected_by_load = false;
 892                 amdgpu_connector_free_edid(connector);
 893                 amdgpu_connector_get_edid(connector);
 894
 895                 if (!amdgpu_connector->edid) {
 896                         DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
 897                                         connector->name);
 898                         ret = connector_status_connected;
 899                 } else {
 900                         amdgpu_connector->use_digital =
 901                                 !!(amdgpu_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
 902
 903                         /* some oems have boards with separate digital and analog connectors
 904                          * with a shared ddc line (often vga + hdmi)
 905                          */
 906                         if (amdgpu_connector->use_digital && amdgpu_connector->shared_ddc) {
 907                                 amdgpu_connector_free_edid(connector);
 908                                 ret = connector_status_disconnected;
 909                         } else {
 910                                 ret = connector_status_connected;
 911                         }
 912                 }
 913         } else {
 914
 915                 /* if we aren't forcing don't do destructive polling */
 916                 if (!force) {
 917                         /* only return the previous status if we last
 918                          * detected a monitor via load.
 919                          */
 920                         if (amdgpu_connector->detected_by_load)
 921                                 ret = connector->status;
 922                         goto out;
 923                 }
 924
 925                 if (amdgpu_connector->dac_load_detect && encoder) {
 926                         encoder_funcs = encoder->helper_private;
 927                         ret = encoder_funcs->detect(encoder, connector);
 928                         if (ret != connector_status_disconnected)
 929                                 amdgpu_connector->detected_by_load = true;
 930                 }
 931         }
 932
 933         amdgpu_connector_update_scratch_regs(connector, ret);
 934
 935 out:
 936         if (!drm_kms_helper_is_poll_worker()) {
 937                 pm_runtime_mark_last_busy(connector->dev->dev);
 938                 pm_runtime_put_autosuspend(connector->dev->dev);
 939         }
 940
 941         return ret;
 942 }
 943
 944 static const struct drm_connector_helper_funcs amdgpu_connector_vga_helper_funcs = {
 945         .get_modes = amdgpu_connector_vga_get_modes,
 946         .mode_valid = amdgpu_connector_vga_mode_valid,
 947         .best_encoder = amdgpu_connector_best_single_encoder,
 948 };
 949
 950 static const struct drm_connector_funcs amdgpu_connector_vga_funcs = {
 951         .dpms = drm_helper_connector_dpms,
 952         .detect = amdgpu_connector_vga_detect,
 953         .fill_modes = drm_helper_probe_single_connector_modes,
 954         .early_unregister = amdgpu_connector_unregister,
 955         .destroy = amdgpu_connector_destroy,
 956         .set_property = amdgpu_connector_set_property,
 957 };
 958
 959 static bool
 960 amdgpu_connector_check_hpd_status_unchanged(struct drm_connector *connector)
 961 {
 962         struct drm_device *dev = connector->dev;
 963         struct amdgpu_device *adev = dev->dev_private;
 964         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 965         enum drm_connector_status status;
 966
 967         if (amdgpu_connector->hpd.hpd != AMDGPU_HPD_NONE) {
 968                 if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd))
 969                         status = connector_status_connected;
 970                 else
 971                         status = connector_status_disconnected;
 972                 if (connector->status == status)
 973                         return true;
 974         }
 975
 976         return false;
 977 }
 978
 979 /*
 980  * DVI is complicated
 981  * Do a DDC probe, if DDC probe passes, get the full EDID so
 982  * we can do analog/digital monitor detection at this point.
 983  * If the monitor is an analog monitor or we got no DDC,
 984  * we need to find the DAC encoder object for this connector.
 985  * If we got no DDC, we do load detection on the DAC encoder object.
 986  * If we got analog DDC or load detection passes on the DAC encoder
 987  * we have to check if this analog encoder is shared with anyone else (TV)
 988  * if its shared we have to set the other connector to disconnected.
 989  */
 990 static enum drm_connector_status
 991 amdgpu_connector_dvi_detect(struct drm_connector *connector, bool force)
 992 {
 993         struct drm_device *dev = connector->dev;
 994         struct amdgpu_device *adev = dev->dev_private;
 995         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
 996         struct drm_encoder *encoder = NULL;
 997         const struct drm_encoder_helper_funcs *encoder_funcs;
 998         int i, r;
 999         enum drm_connector_status ret = connector_status_disconnected;
1000         bool dret = false, broken_edid = false;
1001
1002         if (!drm_kms_helper_is_poll_worker()) {
1003                 r = pm_runtime_get_sync(connector->dev->dev);
1004                 if (r < 0) {
1005                         pm_runtime_put_autosuspend(connector->dev->dev);
1006                         return connector_status_disconnected;
1007                 }
1008         }
1009
1010         if (!force && amdgpu_connector_check_hpd_status_unchanged(connector)) {
1011                 ret = connector->status;
1012                 goto exit;
1013         }
1014
1015         if (amdgpu_connector->ddc_bus)
1016                 dret = amdgpu_ddc_probe(amdgpu_connector, false);
1017         if (dret) {
1018                 amdgpu_connector->detected_by_load = false;
1019                 amdgpu_connector_free_edid(connector);
1020                 amdgpu_connector_get_edid(connector);
1021
1022                 if (!amdgpu_connector->edid) {
1023                         DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
1024                                         connector->name);
1025                         ret = connector_status_connected;
1026                         broken_edid = true; /* defer use_digital to later */
1027                 } else {
1028                         amdgpu_connector->use_digital =
1029                                 !!(amdgpu_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1030
1031                         /* some oems have boards with separate digital and analog connectors
1032                          * with a shared ddc line (often vga + hdmi)
1033                          */
1034                         if ((!amdgpu_connector->use_digital) && amdgpu_connector->shared_ddc) {
1035                                 amdgpu_connector_free_edid(connector);
1036                                 ret = connector_status_disconnected;
1037                         } else {
1038                                 ret = connector_status_connected;
1039                         }
1040
1041                         /* This gets complicated.  We have boards with VGA + HDMI with a
1042                          * shared DDC line and we have boards with DVI-D + HDMI with a shared
1043                          * DDC line.  The latter is more complex because with DVI<->HDMI adapters
1044                          * you don't really know what's connected to which port as both are digital.
1045                          */
1046                         if (amdgpu_connector->shared_ddc && (ret == connector_status_connected)) {
1047                                 struct drm_connector *list_connector;
1048                                 struct amdgpu_connector *list_amdgpu_connector;
1049                                 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1050                                         if (connector == list_connector)
1051                                                 continue;
1052                                         list_amdgpu_connector = to_amdgpu_connector(list_connector);
1053                                         if (list_amdgpu_connector->shared_ddc &&
1054                                             (list_amdgpu_connector->ddc_bus->rec.i2c_id ==
1055                                              amdgpu_connector->ddc_bus->rec.i2c_id)) {
1056                                                 /* cases where both connectors are digital */
1057                                                 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1058                                                         /* hpd is our only option in this case */
1059                                                         if (!amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) {
1060                                                                 amdgpu_connector_free_edid(connector);
1061                                                                 ret = connector_status_disconnected;
1062                                                         }
1063                                                 }
1064                                         }
1065                                 }
1066                         }
1067                 }
1068         }
1069
1070         if ((ret == connector_status_connected) && (amdgpu_connector->use_digital == true))
1071                 goto out;
1072
1073         /* DVI-D and HDMI-A are digital only */
1074         if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1075             (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1076                 goto out;
1077
1078         /* if we aren't forcing don't do destructive polling */
1079         if (!force) {
1080                 /* only return the previous status if we last
1081                  * detected a monitor via load.
1082                  */
1083                 if (amdgpu_connector->detected_by_load)
1084                         ret = connector->status;
1085                 goto out;
1086         }
1087
1088         /* find analog encoder */
1089         if (amdgpu_connector->dac_load_detect) {
1090                 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1091                         if (connector->encoder_ids[i] == 0)
1092                                 break;
1093
1094                         encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1095                         if (!encoder)
1096                                 continue;
1097
1098                         if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
1099                             encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1100                                 continue;
1101
1102                         encoder_funcs = encoder->helper_private;
1103                         if (encoder_funcs->detect) {
1104                                 if (!broken_edid) {
1105                                         if (ret != connector_status_connected) {
1106                                                 /* deal with analog monitors without DDC */
1107                                                 ret = encoder_funcs->detect(encoder, connector);
1108                                                 if (ret == connector_status_connected) {
1109                                                         amdgpu_connector->use_digital = false;
1110                                                 }
1111                                                 if (ret != connector_status_disconnected)
1112                                                         amdgpu_connector->detected_by_load = true;
1113                                         }
1114                                 } else {
1115                                         enum drm_connector_status lret;
1116                                         /* assume digital unless load detected otherwise */
1117                                         amdgpu_connector->use_digital = true;
1118                                         lret = encoder_funcs->detect(encoder, connector);
1119                                         DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1120                                         if (lret == connector_status_connected)
1121                                                 amdgpu_connector->use_digital = false;
1122                                 }
1123                                 break;
1124                         }
1125                 }
1126         }
1127
1128 out:
1129         /* updated in get modes as well since we need to know if it's analog or digital */
1130         amdgpu_connector_update_scratch_regs(connector, ret);
1131
1132 exit:
1133         if (!drm_kms_helper_is_poll_worker()) {
1134                 pm_runtime_mark_last_busy(connector->dev->dev);
1135                 pm_runtime_put_autosuspend(connector->dev->dev);
1136         }
1137
1138         return ret;
1139 }
1140
1141 /* okay need to be smart in here about which encoder to pick */
1142 static struct drm_encoder *
1143 amdgpu_connector_dvi_encoder(struct drm_connector *connector)
1144 {
1145         int enc_id = connector->encoder_ids[0];
1146         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
1147         struct drm_encoder *encoder;
1148         int i;
1149         for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1150                 if (connector->encoder_ids[i] == 0)
1151                         break;
1152
1153                 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1154                 if (!encoder)
1155                         continue;
1156
1157                 if (amdgpu_connector->use_digital == true) {
1158                         if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1159                                 return encoder;
1160                 } else {
1161                         if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1162                             encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1163                                 return encoder;
1164                 }
1165         }
1166
1167         /* see if we have a default encoder  TODO */
1168
1169         /* then check use digitial */
1170         /* pick the first one */
1171         if (enc_id)
1172                 return drm_encoder_find(connector->dev, enc_id);
1173         return NULL;
1174 }
1175
1176 static void amdgpu_connector_dvi_force(struct drm_connector *connector)
1177 {
1178         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
1179         if (connector->force == DRM_FORCE_ON)
1180                 amdgpu_connector->use_digital = false;
1181         if (connector->force == DRM_FORCE_ON_DIGITAL)
1182                 amdgpu_connector->use_digital = true;
1183 }
1184
1185 static int amdgpu_connector_dvi_mode_valid(struct drm_connector *connector,
1186                                             struct drm_display_mode *mode)
1187 {
1188         struct drm_device *dev = connector->dev;
1189         struct amdgpu_device *adev = dev->dev_private;
1190         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
1191
1192         /* XXX check mode bandwidth */
1193
1194         if (amdgpu_connector->use_digital && (mode->clock > 165000)) {
1195                 if ((amdgpu_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1196                     (amdgpu_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1197                     (amdgpu_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) {
1198                         return MODE_OK;
1199                 } else if (drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
1200                         /* HDMI 1.3+ supports max clock of 340 Mhz */
1201                         if (mode->clock > 340000)
1202                                 return MODE_CLOCK_HIGH;
1203                         else
1204                                 return MODE_OK;
1205                 } else {
1206                         return MODE_CLOCK_HIGH;
1207                 }
1208         }
1209
1210         /* check against the max pixel clock */
1211         if ((mode->clock / 10) > adev->clock.max_pixel_clock)
1212                 return MODE_CLOCK_HIGH;
1213
1214         return MODE_OK;
1215 }
1216
1217 static const struct drm_connector_helper_funcs amdgpu_connector_dvi_helper_funcs = {
1218         .get_modes = amdgpu_connector_vga_get_modes,
1219         .mode_valid = amdgpu_connector_dvi_mode_valid,
1220         .best_encoder = amdgpu_connector_dvi_encoder,
1221 };
1222
1223 static const struct drm_connector_funcs amdgpu_connector_dvi_funcs = {
1224         .dpms = drm_helper_connector_dpms,
1225         .detect = amdgpu_connector_dvi_detect,
1226         .fill_modes = drm_helper_probe_single_connector_modes,
1227         .set_property = amdgpu_connector_set_property,
1228         .early_unregister = amdgpu_connector_unregister,
1229         .destroy = amdgpu_connector_destroy,
1230         .force = amdgpu_connector_dvi_force,
1231 };
1232
1233 static int amdgpu_connector_dp_get_modes(struct drm_connector *connector)
1234 {
1235         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
1236         struct amdgpu_connector_atom_dig *amdgpu_dig_connector = amdgpu_connector->con_priv;
1237         struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
1238         int ret;
1239
1240         if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1241             (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1242                 struct drm_display_mode *mode;
1243
1244                 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1245                         if (!amdgpu_dig_connector->edp_on)
1246                                 amdgpu_atombios_encoder_set_edp_panel_power(connector,
1247                                                                      ATOM_TRANSMITTER_ACTION_POWER_ON);
1248                         amdgpu_connector_get_edid(connector);
1249                         ret = amdgpu_connector_ddc_get_modes(connector);
1250                         if (!amdgpu_dig_connector->edp_on)
1251                                 amdgpu_atombios_encoder_set_edp_panel_power(connector,
1252                                                                      ATOM_TRANSMITTER_ACTION_POWER_OFF);
1253                 } else {
1254                         /* need to setup ddc on the bridge */
1255                         if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1256                             ENCODER_OBJECT_ID_NONE) {
1257                                 if (encoder)
1258                                         amdgpu_atombios_encoder_setup_ext_encoder_ddc(encoder);
1259                         }
1260                         amdgpu_connector_get_edid(connector);
1261                         ret = amdgpu_connector_ddc_get_modes(connector);
1262                 }
1263
1264                 if (ret > 0) {
1265                         if (encoder) {
1266                                 amdgpu_connector_fixup_lcd_native_mode(encoder, connector);
1267                                 /* add scaled modes */
1268                                 amdgpu_connector_add_common_modes(encoder, connector);
1269                         }
1270                         return ret;
1271                 }
1272
1273                 if (!encoder)
1274                         return 0;
1275
1276                 /* we have no EDID modes */
1277                 mode = amdgpu_connector_lcd_native_mode(encoder);
1278                 if (mode) {
1279                         ret = 1;
1280                         drm_mode_probed_add(connector, mode);
1281                         /* add the width/height from vbios tables if available */
1282                         connector->display_info.width_mm = mode->width_mm;
1283                         connector->display_info.height_mm = mode->height_mm;
1284                         /* add scaled modes */
1285                         amdgpu_connector_add_common_modes(encoder, connector);
1286                 }
1287         } else {
1288                 /* need to setup ddc on the bridge */
1289                 if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1290                         ENCODER_OBJECT_ID_NONE) {
1291                         if (encoder)
1292                                 amdgpu_atombios_encoder_setup_ext_encoder_ddc(encoder);
1293                 }
1294                 amdgpu_connector_get_edid(connector);
1295                 ret = amdgpu_connector_ddc_get_modes(connector);
1296
1297                 amdgpu_get_native_mode(connector);
1298         }
1299
1300         return ret;
1301 }
1302
1303 u16 amdgpu_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
1304 {
1305         struct drm_encoder *encoder;
1306         struct amdgpu_encoder *amdgpu_encoder;
1307         int i;
1308
1309         for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1310                 if (connector->encoder_ids[i] == 0)
1311                         break;
1312
1313                 encoder = drm_encoder_find(connector->dev,
1314                                         connector->encoder_ids[i]);
1315                 if (!encoder)
1316                         continue;
1317
1318                 amdgpu_encoder = to_amdgpu_encoder(encoder);
1319
1320                 switch (amdgpu_encoder->encoder_id) {
1321                 case ENCODER_OBJECT_ID_TRAVIS:
1322                 case ENCODER_OBJECT_ID_NUTMEG:
1323                         return amdgpu_encoder->encoder_id;
1324                 default:
1325                         break;
1326                 }
1327         }
1328
1329         return ENCODER_OBJECT_ID_NONE;
1330 }
1331
1332 static bool amdgpu_connector_encoder_is_hbr2(struct drm_connector *connector)
1333 {
1334         struct drm_encoder *encoder;
1335         struct amdgpu_encoder *amdgpu_encoder;
1336         int i;
1337         bool found = false;
1338
1339         for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1340                 if (connector->encoder_ids[i] == 0)
1341                         break;
1342                 encoder = drm_encoder_find(connector->dev,
1343                                         connector->encoder_ids[i]);
1344                 if (!encoder)
1345                         continue;
1346
1347                 amdgpu_encoder = to_amdgpu_encoder(encoder);
1348                 if (amdgpu_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1349                         found = true;
1350         }
1351
1352         return found;
1353 }
1354
1355 bool amdgpu_connector_is_dp12_capable(struct drm_connector *connector)
1356 {
1357         struct drm_device *dev = connector->dev;
1358         struct amdgpu_device *adev = dev->dev_private;
1359
1360         if ((adev->clock.default_dispclk >= 53900) &&
1361             amdgpu_connector_encoder_is_hbr2(connector)) {
1362                 return true;
1363         }
1364
1365         return false;
1366 }
1367
1368 static enum drm_connector_status
1369 amdgpu_connector_dp_detect(struct drm_connector *connector, bool force)
1370 {
1371         struct drm_device *dev = connector->dev;
1372         struct amdgpu_device *adev = dev->dev_private;
1373         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
1374         enum drm_connector_status ret = connector_status_disconnected;
1375         struct amdgpu_connector_atom_dig *amdgpu_dig_connector = amdgpu_connector->con_priv;
1376         struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
1377         int r;
1378
1379         if (!drm_kms_helper_is_poll_worker()) {
1380                 r = pm_runtime_get_sync(connector->dev->dev);
1381                 if (r < 0) {
1382                         pm_runtime_put_autosuspend(connector->dev->dev);
1383                         return connector_status_disconnected;
1384                 }
1385         }
1386
1387         if (!force && amdgpu_connector_check_hpd_status_unchanged(connector)) {
1388                 ret = connector->status;
1389                 goto out;
1390         }
1391
1392         amdgpu_connector_free_edid(connector);
1393
1394         if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1395             (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1396                 if (encoder) {
1397                         struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
1398                         struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
1399
1400                         /* check if panel is valid */
1401                         if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1402                                 ret = connector_status_connected;
1403                 }
1404                 /* eDP is always DP */
1405                 amdgpu_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1406                 if (!amdgpu_dig_connector->edp_on)
1407                         amdgpu_atombios_encoder_set_edp_panel_power(connector,
1408                                                              ATOM_TRANSMITTER_ACTION_POWER_ON);
1409                 if (!amdgpu_atombios_dp_get_dpcd(amdgpu_connector))
1410                         ret = connector_status_connected;
1411                 if (!amdgpu_dig_connector->edp_on)
1412                         amdgpu_atombios_encoder_set_edp_panel_power(connector,
1413                                                              ATOM_TRANSMITTER_ACTION_POWER_OFF);
1414         } else if (amdgpu_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1415                    ENCODER_OBJECT_ID_NONE) {
1416                 /* DP bridges are always DP */
1417                 amdgpu_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1418                 /* get the DPCD from the bridge */
1419                 amdgpu_atombios_dp_get_dpcd(amdgpu_connector);
1420
1421                 if (encoder) {
1422                         /* setup ddc on the bridge */
1423                         amdgpu_atombios_encoder_setup_ext_encoder_ddc(encoder);
1424                         /* bridge chips are always aux */
1425                         if (amdgpu_ddc_probe(amdgpu_connector, true)) /* try DDC */
1426                                 ret = connector_status_connected;
1427                         else if (amdgpu_connector->dac_load_detect) { /* try load detection */
1428                                 const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
1429                                 ret = encoder_funcs->detect(encoder, connector);
1430                         }
1431                 }
1432         } else {
1433                 amdgpu_dig_connector->dp_sink_type =
1434                         amdgpu_atombios_dp_get_sinktype(amdgpu_connector);
1435                 if (amdgpu_display_hpd_sense(adev, amdgpu_connector->hpd.hpd)) {
1436                         ret = connector_status_connected;
1437                         if (amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
1438                                 amdgpu_atombios_dp_get_dpcd(amdgpu_connector);
1439                 } else {
1440                         if (amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1441                                 if (!amdgpu_atombios_dp_get_dpcd(amdgpu_connector))
1442                                         ret = connector_status_connected;
1443                         } else {
1444                                 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
1445                                 if (amdgpu_ddc_probe(amdgpu_connector, false))
1446                                         ret = connector_status_connected;
1447                         }
1448                 }
1449         }
1450
1451         amdgpu_connector_update_scratch_regs(connector, ret);
1452 out:
1453         if (!drm_kms_helper_is_poll_worker()) {
1454                 pm_runtime_mark_last_busy(connector->dev->dev);
1455                 pm_runtime_put_autosuspend(connector->dev->dev);
1456         }
1457
1458         return ret;
1459 }
1460
1461 static int amdgpu_connector_dp_mode_valid(struct drm_connector *connector,
1462                                            struct drm_display_mode *mode)
1463 {
1464         struct amdgpu_connector *amdgpu_connector = to_amdgpu_connector(connector);
1465         struct amdgpu_connector_atom_dig *amdgpu_dig_connector = amdgpu_connector->con_priv;
1466
1467         /* XXX check mode bandwidth */
1468
1469         if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1470             (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1471                 struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
1472
1473                 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1474                         return MODE_PANEL;
1475
1476                 if (encoder) {
1477                         struct amdgpu_encoder *amdgpu_encoder = to_amdgpu_encoder(encoder);
1478                         struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode;
1479
1480                         /* AVIVO hardware supports downscaling modes larger than the panel
1481                          * to the panel size, but I'm not sure this is desirable.
1482                          */
1483                         if ((mode->hdisplay > native_mode->hdisplay) ||
1484                             (mode->vdisplay > native_mode->vdisplay))
1485                                 return MODE_PANEL;
1486
1487                         /* if scaling is disabled, block non-native modes */
1488                         if (amdgpu_encoder->rmx_type == RMX_OFF) {
1489                                 if ((mode->hdisplay != native_mode->hdisplay) ||
1490                                     (mode->vdisplay != native_mode->vdisplay))
1491                                         return MODE_PANEL;
1492                         }
1493                 }
1494                 return MODE_OK;
1495         } else {
1496                 if ((amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1497                     (amdgpu_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
1498                         return amdgpu_atombios_dp_mode_valid_helper(connector, mode);
1499                 } else {
1500                         if (drm_detect_hdmi_monitor(amdgpu_connector_edid(connector))) {
1501                                 /* HDMI 1.3+ supports max clock of 340 Mhz */
1502                                 if (mode->clock > 340000)
1503                                         return MODE_CLOCK_HIGH;
1504                         } else {
1505                                 if (mode->clock > 165000)
1506                                         return MODE_CLOCK_HIGH;
1507                         }
1508                 }
1509         }
1510
1511         return MODE_OK;
1512 }
1513
1514 static const struct drm_connector_helper_funcs amdgpu_connector_dp_helper_funcs = {
1515         .get_modes = amdgpu_connector_dp_get_modes,
1516         .mode_valid = amdgpu_connector_dp_mode_valid,
1517         .best_encoder = amdgpu_connector_dvi_encoder,
1518 };
1519
1520 static const struct drm_connector_funcs amdgpu_connector_dp_funcs = {
1521         .dpms = drm_helper_connector_dpms,
1522         .detect = amdgpu_connector_dp_detect,
1523         .fill_modes = drm_helper_probe_single_connector_modes,
1524         .set_property = amdgpu_connector_set_property,
1525         .early_unregister = amdgpu_connector_unregister,
1526         .destroy = amdgpu_connector_destroy,
1527         .force = amdgpu_connector_dvi_force,
1528 };
1529
1530 static const struct drm_connector_funcs amdgpu_connector_edp_funcs = {
1531         .dpms = drm_helper_connector_dpms,
1532         .detect = amdgpu_connector_dp_detect,
1533         .fill_modes = drm_helper_probe_single_connector_modes,
1534         .set_property = amdgpu_connector_set_lcd_property,
1535         .early_unregister = amdgpu_connector_unregister,
1536         .destroy = amdgpu_connector_destroy,
1537         .force = amdgpu_connector_dvi_force,
1538 };
1539
1540 static struct drm_encoder *
1541 amdgpu_connector_virtual_encoder(struct drm_connector *connector)
1542 {
1543         int enc_id = connector->encoder_ids[0];
1544         struct drm_encoder *encoder;
1545         int i;
1546         for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1547                 if (connector->encoder_ids[i] == 0)
1548                         break;
1549
1550                 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1551                 if (!encoder)
1552                         continue;
1553
1554                 if (encoder->encoder_type == DRM_MODE_ENCODER_VIRTUAL)
1555                         return encoder;
1556         }
1557
1558         /* pick the first one */
1559         if (enc_id)
1560                 return drm_encoder_find(connector->dev, enc_id);
1561         return NULL;
1562 }
1563
1564 static int amdgpu_connector_virtual_get_modes(struct drm_connector *connector)
1565 {
1566         struct drm_encoder *encoder = amdgpu_connector_best_single_encoder(connector);
1567
1568         if (encoder) {
1569                 amdgpu_connector_add_common_modes(encoder, connector);
1570         }
1571
1572         return 0;
1573 }
1574
1575 static int amdgpu_connector_virtual_mode_valid(struct drm_connector *connector,
1576                                            struct drm_display_mode *mode)
1577 {
1578         return MODE_OK;
1579 }
1580
1581 static int
1582 amdgpu_connector_virtual_dpms(struct drm_connector *connector, int mode)
1583 {
1584         return 0;
1585 }
1586
1587 static enum drm_connector_status
1588
1589 amdgpu_connector_virtual_detect(struct drm_connector *connector, bool force)
1590 {
1591         return connector_status_connected;
1592 }
1593
1594 static int
1595 amdgpu_connector_virtual_set_property(struct drm_connector *connector,
1596                                   struct drm_property *property,
1597                                   uint64_t val)
1598 {
1599         return 0;
1600 }
1601
1602 static void amdgpu_connector_virtual_force(struct drm_connector *connector)
1603 {
1604         return;
1605 }
1606
1607 static const struct drm_connector_helper_funcs amdgpu_connector_virtual_helper_funcs = {
1608         .get_modes = amdgpu_connector_virtual_get_modes,
1609         .mode_valid = amdgpu_connector_virtual_mode_valid,
1610         .best_encoder = amdgpu_connector_virtual_encoder,
1611 };
1612
1613 static const struct drm_connector_funcs amdgpu_connector_virtual_funcs = {
1614         .dpms = amdgpu_connector_virtual_dpms,
1615         .detect = amdgpu_connector_virtual_detect,
1616         .fill_modes = drm_helper_probe_single_connector_modes,
1617         .set_property = amdgpu_connector_virtual_set_property,
1618         .destroy = amdgpu_connector_destroy,
1619         .force = amdgpu_connector_virtual_force,
1620 };
1621
1622 void
1623 amdgpu_connector_add(struct amdgpu_device *adev,
1624                       uint32_t connector_id,
1625                       uint32_t supported_device,
1626                       int connector_type,
1627                       struct amdgpu_i2c_bus_rec *i2c_bus,
1628                       uint16_t connector_object_id,
1629                       struct amdgpu_hpd *hpd,
1630                       struct amdgpu_router *router)
1631 {
1632         struct drm_device *dev = adev->ddev;
1633         struct drm_connector *connector;
1634         struct amdgpu_connector *amdgpu_connector;
1635         struct amdgpu_connector_atom_dig *amdgpu_dig_connector;
1636         struct drm_encoder *encoder;
1637         struct amdgpu_encoder *amdgpu_encoder;
1638         uint32_t subpixel_order = SubPixelNone;
1639         bool shared_ddc = false;
1640         bool is_dp_bridge = false;
1641         bool has_aux = false;
1642
1643         if (connector_type == DRM_MODE_CONNECTOR_Unknown)
1644                 return;
1645
1646         /* see if we already added it */
1647         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1648                 amdgpu_connector = to_amdgpu_connector(connector);
1649                 if (amdgpu_connector->connector_id == connector_id) {
1650                         amdgpu_connector->devices |= supported_device;
1651                         return;
1652                 }
1653                 if (amdgpu_connector->ddc_bus && i2c_bus->valid) {
1654                         if (amdgpu_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
1655                                 amdgpu_connector->shared_ddc = true;
1656                                 shared_ddc = true;
1657                         }
1658                         if (amdgpu_connector->router_bus && router->ddc_valid &&
1659                             (amdgpu_connector->router.router_id == router->router_id)) {
1660                                 amdgpu_connector->shared_ddc = false;
1661                                 shared_ddc = false;
1662                         }
1663                 }
1664         }
1665
1666         /* check if it's a dp bridge */
1667         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1668                 amdgpu_encoder = to_amdgpu_encoder(encoder);
1669                 if (amdgpu_encoder->devices & supported_device) {
1670                         switch (amdgpu_encoder->encoder_id) {
1671                         case ENCODER_OBJECT_ID_TRAVIS:
1672                         case ENCODER_OBJECT_ID_NUTMEG:
1673                                 is_dp_bridge = true;
1674                                 break;
1675                         default:
1676                                 break;
1677                         }
1678                 }
1679         }
1680
1681         amdgpu_connector = kzalloc(sizeof(struct amdgpu_connector), GFP_KERNEL);
1682         if (!amdgpu_connector)
1683                 return;
1684
1685         connector = &amdgpu_connector->base;
1686
1687         amdgpu_connector->connector_id = connector_id;
1688         amdgpu_connector->devices = supported_device;
1689         amdgpu_connector->shared_ddc = shared_ddc;
1690         amdgpu_connector->connector_object_id = connector_object_id;
1691         amdgpu_connector->hpd = *hpd;
1692
1693         amdgpu_connector->router = *router;
1694         if (router->ddc_valid || router->cd_valid) {
1695                 amdgpu_connector->router_bus = amdgpu_i2c_lookup(adev, &router->i2c_info);
1696                 if (!amdgpu_connector->router_bus)
1697                         DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
1698         }
1699
1700         if (is_dp_bridge) {
1701                 amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL);
1702                 if (!amdgpu_dig_connector)
1703                         goto failed;
1704                 amdgpu_connector->con_priv = amdgpu_dig_connector;
1705                 if (i2c_bus->valid) {
1706                         amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
1707                         if (amdgpu_connector->ddc_bus)
1708                                 has_aux = true;
1709                         else
1710                                 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1711                 }
1712                 switch (connector_type) {
1713                 case DRM_MODE_CONNECTOR_VGA:
1714                 case DRM_MODE_CONNECTOR_DVIA:
1715                 default:
1716                         drm_connector_init(dev, &amdgpu_connector->base,
1717                                            &amdgpu_connector_dp_funcs, connector_type);
1718                         drm_connector_helper_add(&amdgpu_connector->base,
1719                                                  &amdgpu_connector_dp_helper_funcs);
1720                         connector->interlace_allowed = true;
1721                         connector->doublescan_allowed = true;
1722                         amdgpu_connector->dac_load_detect = true;
1723                         drm_object_attach_property(&amdgpu_connector->base.base,
1724                                                       adev->mode_info.load_detect_property,
1725                                                       1);
1726                         drm_object_attach_property(&amdgpu_connector->base.base,
1727                                                    dev->mode_config.scaling_mode_property,
1728                                                    DRM_MODE_SCALE_NONE);
1729                         break;
1730                 case DRM_MODE_CONNECTOR_DVII:
1731                 case DRM_MODE_CONNECTOR_DVID:
1732                 case DRM_MODE_CONNECTOR_HDMIA:
1733                 case DRM_MODE_CONNECTOR_HDMIB:
1734                 case DRM_MODE_CONNECTOR_DisplayPort:
1735                         drm_connector_init(dev, &amdgpu_connector->base,
1736                                            &amdgpu_connector_dp_funcs, connector_type);
1737                         drm_connector_helper_add(&amdgpu_connector->base,
1738                                                  &amdgpu_connector_dp_helper_funcs);
1739                         drm_object_attach_property(&amdgpu_connector->base.base,
1740                                                       adev->mode_info.underscan_property,
1741                                                       UNDERSCAN_OFF);
1742                         drm_object_attach_property(&amdgpu_connector->base.base,
1743                                                       adev->mode_info.underscan_hborder_property,
1744                                                       0);
1745                         drm_object_attach_property(&amdgpu_connector->base.base,
1746                                                       adev->mode_info.underscan_vborder_property,
1747                                                       0);
1748
1749                         drm_object_attach_property(&amdgpu_connector->base.base,
1750                                                    dev->mode_config.scaling_mode_property,
1751                                                    DRM_MODE_SCALE_NONE);
1752
1753                         drm_object_attach_property(&amdgpu_connector->base.base,
1754                                                    adev->mode_info.dither_property,
1755                                                    AMDGPU_FMT_DITHER_DISABLE);
1756
1757                         if (amdgpu_audio != 0)
1758                                 drm_object_attach_property(&amdgpu_connector->base.base,
1759                                                            adev->mode_info.audio_property,
1760                                                            AMDGPU_AUDIO_AUTO);
1761
1762                         subpixel_order = SubPixelHorizontalRGB;
1763                         connector->interlace_allowed = true;
1764                         if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1765                                 connector->doublescan_allowed = true;
1766                         else
1767                                 connector->doublescan_allowed = false;
1768                         if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1769                                 amdgpu_connector->dac_load_detect = true;
1770                                 drm_object_attach_property(&amdgpu_connector->base.base,
1771                                                               adev->mode_info.load_detect_property,
1772                                                               1);
1773                         }
1774                         break;
1775                 case DRM_MODE_CONNECTOR_LVDS:
1776                 case DRM_MODE_CONNECTOR_eDP:
1777                         drm_connector_init(dev, &amdgpu_connector->base,
1778                                            &amdgpu_connector_edp_funcs, connector_type);
1779                         drm_connector_helper_add(&amdgpu_connector->base,
1780                                                  &amdgpu_connector_dp_helper_funcs);
1781                         drm_object_attach_property(&amdgpu_connector->base.base,
1782                                                       dev->mode_config.scaling_mode_property,
1783                                                       DRM_MODE_SCALE_FULLSCREEN);
1784                         subpixel_order = SubPixelHorizontalRGB;
1785                         connector->interlace_allowed = false;
1786                         connector->doublescan_allowed = false;
1787                         break;
1788                 }
1789         } else {
1790                 switch (connector_type) {
1791                 case DRM_MODE_CONNECTOR_VGA:
1792                         drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_vga_funcs, connector_type);
1793                         drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
1794                         if (i2c_bus->valid) {
1795                                 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
1796                                 if (!amdgpu_connector->ddc_bus)
1797                                         DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1798                         }
1799                         amdgpu_connector->dac_load_detect = true;
1800                         drm_object_attach_property(&amdgpu_connector->base.base,
1801                                                       adev->mode_info.load_detect_property,
1802                                                       1);
1803                         drm_object_attach_property(&amdgpu_connector->base.base,
1804                                                    dev->mode_config.scaling_mode_property,
1805                                                    DRM_MODE_SCALE_NONE);
1806                         /* no HPD on analog connectors */
1807                         amdgpu_connector->hpd.hpd = AMDGPU_HPD_NONE;
1808                         connector->interlace_allowed = true;
1809                         connector->doublescan_allowed = true;
1810                         break;
1811                 case DRM_MODE_CONNECTOR_DVIA:
1812                         drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_vga_funcs, connector_type);
1813                         drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_vga_helper_funcs);
1814                         if (i2c_bus->valid) {
1815                                 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
1816                                 if (!amdgpu_connector->ddc_bus)
1817                                         DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1818                         }
1819                         amdgpu_connector->dac_load_detect = true;
1820                         drm_object_attach_property(&amdgpu_connector->base.base,
1821                                                       adev->mode_info.load_detect_property,
1822                                                       1);
1823                         drm_object_attach_property(&amdgpu_connector->base.base,
1824                                                    dev->mode_config.scaling_mode_property,
1825                                                    DRM_MODE_SCALE_NONE);
1826                         /* no HPD on analog connectors */
1827                         amdgpu_connector->hpd.hpd = AMDGPU_HPD_NONE;
1828                         connector->interlace_allowed = true;
1829                         connector->doublescan_allowed = true;
1830                         break;
1831                 case DRM_MODE_CONNECTOR_DVII:
1832                 case DRM_MODE_CONNECTOR_DVID:
1833                         amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL);
1834                         if (!amdgpu_dig_connector)
1835                                 goto failed;
1836                         amdgpu_connector->con_priv = amdgpu_dig_connector;
1837                         drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_dvi_funcs, connector_type);
1838                         drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
1839                         if (i2c_bus->valid) {
1840                                 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
1841                                 if (!amdgpu_connector->ddc_bus)
1842                                         DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1843                         }
1844                         subpixel_order = SubPixelHorizontalRGB;
1845                         drm_object_attach_property(&amdgpu_connector->base.base,
1846                                                       adev->mode_info.coherent_mode_property,
1847                                                       1);
1848                         drm_object_attach_property(&amdgpu_connector->base.base,
1849                                                    adev->mode_info.underscan_property,
1850                                                    UNDERSCAN_OFF);
1851                         drm_object_attach_property(&amdgpu_connector->base.base,
1852                                                    adev->mode_info.underscan_hborder_property,
1853                                                    0);
1854                         drm_object_attach_property(&amdgpu_connector->base.base,
1855                                                    adev->mode_info.underscan_vborder_property,
1856                                                    0);
1857                         drm_object_attach_property(&amdgpu_connector->base.base,
1858                                                    dev->mode_config.scaling_mode_property,
1859                                                    DRM_MODE_SCALE_NONE);
1860
1861                         if (amdgpu_audio != 0) {
1862                                 drm_object_attach_property(&amdgpu_connector->base.base,
1863                                                            adev->mode_info.audio_property,
1864                                                            AMDGPU_AUDIO_AUTO);
1865                         }
1866                         drm_object_attach_property(&amdgpu_connector->base.base,
1867                                                    adev->mode_info.dither_property,
1868                                                    AMDGPU_FMT_DITHER_DISABLE);
1869                         if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1870                                 amdgpu_connector->dac_load_detect = true;
1871                                 drm_object_attach_property(&amdgpu_connector->base.base,
1872                                                            adev->mode_info.load_detect_property,
1873                                                            1);
1874                         }
1875                         connector->interlace_allowed = true;
1876                         if (connector_type == DRM_MODE_CONNECTOR_DVII)
1877                                 connector->doublescan_allowed = true;
1878                         else
1879                                 connector->doublescan_allowed = false;
1880                         break;
1881                 case DRM_MODE_CONNECTOR_HDMIA:
1882                 case DRM_MODE_CONNECTOR_HDMIB:
1883                         amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL);
1884                         if (!amdgpu_dig_connector)
1885                                 goto failed;
1886                         amdgpu_connector->con_priv = amdgpu_dig_connector;
1887                         drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_dvi_funcs, connector_type);
1888                         drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dvi_helper_funcs);
1889                         if (i2c_bus->valid) {
1890                                 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
1891                                 if (!amdgpu_connector->ddc_bus)
1892                                         DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1893                         }
1894                         drm_object_attach_property(&amdgpu_connector->base.base,
1895                                                       adev->mode_info.coherent_mode_property,
1896                                                       1);
1897                         drm_object_attach_property(&amdgpu_connector->base.base,
1898                                                    adev->mode_info.underscan_property,
1899                                                    UNDERSCAN_OFF);
1900                         drm_object_attach_property(&amdgpu_connector->base.base,
1901                                                    adev->mode_info.underscan_hborder_property,
1902                                                    0);
1903                         drm_object_attach_property(&amdgpu_connector->base.base,
1904                                                    adev->mode_info.underscan_vborder_property,
1905                                                    0);
1906                         drm_object_attach_property(&amdgpu_connector->base.base,
1907                                                    dev->mode_config.scaling_mode_property,
1908                                                    DRM_MODE_SCALE_NONE);
1909                         if (amdgpu_audio != 0) {
1910                                 drm_object_attach_property(&amdgpu_connector->base.base,
1911                                                            adev->mode_info.audio_property,
1912                                                            AMDGPU_AUDIO_AUTO);
1913                         }
1914                         drm_object_attach_property(&amdgpu_connector->base.base,
1915                                                    adev->mode_info.dither_property,
1916                                                    AMDGPU_FMT_DITHER_DISABLE);
1917                         subpixel_order = SubPixelHorizontalRGB;
1918                         connector->interlace_allowed = true;
1919                         if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1920                                 connector->doublescan_allowed = true;
1921                         else
1922                                 connector->doublescan_allowed = false;
1923                         break;
1924                 case DRM_MODE_CONNECTOR_DisplayPort:
1925                         amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL);
1926                         if (!amdgpu_dig_connector)
1927                                 goto failed;
1928                         amdgpu_connector->con_priv = amdgpu_dig_connector;
1929                         drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_dp_funcs, connector_type);
1930                         drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
1931                         if (i2c_bus->valid) {
1932                                 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
1933                                 if (amdgpu_connector->ddc_bus)
1934                                         has_aux = true;
1935                                 else
1936                                         DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1937                         }
1938                         subpixel_order = SubPixelHorizontalRGB;
1939                         drm_object_attach_property(&amdgpu_connector->base.base,
1940                                                       adev->mode_info.coherent_mode_property,
1941                                                       1);
1942                         drm_object_attach_property(&amdgpu_connector->base.base,
1943                                                    adev->mode_info.underscan_property,
1944                                                    UNDERSCAN_OFF);
1945                         drm_object_attach_property(&amdgpu_connector->base.base,
1946                                                    adev->mode_info.underscan_hborder_property,
1947                                                    0);
1948                         drm_object_attach_property(&amdgpu_connector->base.base,
1949                                                    adev->mode_info.underscan_vborder_property,
1950                                                    0);
1951                         drm_object_attach_property(&amdgpu_connector->base.base,
1952                                                    dev->mode_config.scaling_mode_property,
1953                                                    DRM_MODE_SCALE_NONE);
1954                         if (amdgpu_audio != 0) {
1955                                 drm_object_attach_property(&amdgpu_connector->base.base,
1956                                                            adev->mode_info.audio_property,
1957                                                            AMDGPU_AUDIO_AUTO);
1958                         }
1959                         drm_object_attach_property(&amdgpu_connector->base.base,
1960                                                    adev->mode_info.dither_property,
1961                                                    AMDGPU_FMT_DITHER_DISABLE);
1962                         connector->interlace_allowed = true;
1963                         /* in theory with a DP to VGA converter... */
1964                         connector->doublescan_allowed = false;
1965                         break;
1966                 case DRM_MODE_CONNECTOR_eDP:
1967                         amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL);
1968                         if (!amdgpu_dig_connector)
1969                                 goto failed;
1970                         amdgpu_connector->con_priv = amdgpu_dig_connector;
1971                         drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_edp_funcs, connector_type);
1972                         drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_dp_helper_funcs);
1973                         if (i2c_bus->valid) {
1974                                 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
1975                                 if (amdgpu_connector->ddc_bus)
1976                                         has_aux = true;
1977                                 else
1978                                         DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1979                         }
1980                         drm_object_attach_property(&amdgpu_connector->base.base,
1981                                                       dev->mode_config.scaling_mode_property,
1982                                                       DRM_MODE_SCALE_FULLSCREEN);
1983                         subpixel_order = SubPixelHorizontalRGB;
1984                         connector->interlace_allowed = false;
1985                         connector->doublescan_allowed = false;
1986                         break;
1987                 case DRM_MODE_CONNECTOR_LVDS:
1988                         amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL);
1989                         if (!amdgpu_dig_connector)
1990                                 goto failed;
1991                         amdgpu_connector->con_priv = amdgpu_dig_connector;
1992                         drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_lvds_funcs, connector_type);
1993                         drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_lvds_helper_funcs);
1994                         if (i2c_bus->valid) {
1995                                 amdgpu_connector->ddc_bus = amdgpu_i2c_lookup(adev, i2c_bus);
1996                                 if (!amdgpu_connector->ddc_bus)
1997                                         DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1998                         }
1999                         drm_object_attach_property(&amdgpu_connector->base.base,
2000                                                       dev->mode_config.scaling_mode_property,
2001                                                       DRM_MODE_SCALE_FULLSCREEN);
2002                         subpixel_order = SubPixelHorizontalRGB;
2003                         connector->interlace_allowed = false;
2004                         connector->doublescan_allowed = false;
2005                         break;
2006                 case DRM_MODE_CONNECTOR_VIRTUAL:
2007                         amdgpu_dig_connector = kzalloc(sizeof(struct amdgpu_connector_atom_dig), GFP_KERNEL);
2008                         if (!amdgpu_dig_connector)
2009                                 goto failed;
2010                         amdgpu_connector->con_priv = amdgpu_dig_connector;
2011                         drm_connector_init(dev, &amdgpu_connector->base, &amdgpu_connector_virtual_funcs, connector_type);
2012                         drm_connector_helper_add(&amdgpu_connector->base, &amdgpu_connector_virtual_helper_funcs);
2013                         subpixel_order = SubPixelHorizontalRGB;
2014                         connector->interlace_allowed = false;
2015                         connector->doublescan_allowed = false;
2016                         break;
2017                 }
2018         }
2019
2020         if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE) {
2021                 if (i2c_bus->valid) {
2022                         connector->polled = DRM_CONNECTOR_POLL_CONNECT |
2023                                             DRM_CONNECTOR_POLL_DISCONNECT;
2024                 }
2025         } else
2026                 connector->polled = DRM_CONNECTOR_POLL_HPD;
2027
2028         connector->display_info.subpixel_order = subpixel_order;
2029         drm_connector_register(connector);
2030
2031         if (has_aux)
2032                 amdgpu_atombios_dp_aux_init(amdgpu_connector);
2033
2034         return;
2035
2036 failed:
2037         drm_connector_cleanup(connector);
2038         kfree(connector);
2039 }