2 * AppliedMicro X-Gene SoC GPIO Driver
4 * Copyright (c) 2014, Applied Micro Circuits Corporation
5 * Author: Feng Kan <fkan@apm.com>.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
24 #include <linux/spinlock.h>
25 #include <linux/platform_device.h>
26 #include <linux/gpio/driver.h>
27 #include <linux/types.h>
28 #include <linux/bitops.h>
30 #define GPIO_SET_DR_OFFSET 0x0C
31 #define GPIO_DATA_OFFSET 0x14
32 #define GPIO_BANK_STRIDE 0x0C
34 #define XGENE_GPIOS_PER_BANK 16
35 #define XGENE_MAX_GPIO_BANKS 3
36 #define XGENE_MAX_GPIOS (XGENE_GPIOS_PER_BANK * XGENE_MAX_GPIO_BANKS)
38 #define GPIO_BIT_OFFSET(x) (x % XGENE_GPIOS_PER_BANK)
39 #define GPIO_BANK_OFFSET(x) ((x / XGENE_GPIOS_PER_BANK) * GPIO_BANK_STRIDE)
42 struct gpio_chip chip;
45 u32 set_dr_val[XGENE_MAX_GPIO_BANKS];
48 static inline struct xgene_gpio *to_xgene_gpio(struct gpio_chip *chip)
50 return container_of(chip, struct xgene_gpio, chip);
53 static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset)
55 struct xgene_gpio *chip = to_xgene_gpio(gc);
56 unsigned long bank_offset;
59 bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset);
60 bit_offset = GPIO_BIT_OFFSET(offset);
61 return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset));
64 static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
66 struct xgene_gpio *chip = to_xgene_gpio(gc);
67 unsigned long bank_offset;
68 u32 setval, bit_offset;
70 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
71 bit_offset = GPIO_BIT_OFFSET(offset) + XGENE_GPIOS_PER_BANK;
73 setval = ioread32(chip->base + bank_offset);
75 setval |= BIT(bit_offset);
77 setval &= ~BIT(bit_offset);
78 iowrite32(setval, chip->base + bank_offset);
81 static void xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val)
83 struct xgene_gpio *chip = to_xgene_gpio(gc);
86 spin_lock_irqsave(&chip->lock, flags);
87 __xgene_gpio_set(gc, offset, val);
88 spin_unlock_irqrestore(&chip->lock, flags);
91 static int xgene_gpio_dir_in(struct gpio_chip *gc, unsigned int offset)
93 struct xgene_gpio *chip = to_xgene_gpio(gc);
94 unsigned long flags, bank_offset;
95 u32 dirval, bit_offset;
97 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
98 bit_offset = GPIO_BIT_OFFSET(offset);
100 spin_lock_irqsave(&chip->lock, flags);
102 dirval = ioread32(chip->base + bank_offset);
103 dirval |= BIT(bit_offset);
104 iowrite32(dirval, chip->base + bank_offset);
106 spin_unlock_irqrestore(&chip->lock, flags);
111 static int xgene_gpio_dir_out(struct gpio_chip *gc,
112 unsigned int offset, int val)
114 struct xgene_gpio *chip = to_xgene_gpio(gc);
115 unsigned long flags, bank_offset;
116 u32 dirval, bit_offset;
118 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset);
119 bit_offset = GPIO_BIT_OFFSET(offset);
121 spin_lock_irqsave(&chip->lock, flags);
123 dirval = ioread32(chip->base + bank_offset);
124 dirval &= ~BIT(bit_offset);
125 iowrite32(dirval, chip->base + bank_offset);
126 __xgene_gpio_set(gc, offset, val);
128 spin_unlock_irqrestore(&chip->lock, flags);
133 static __maybe_unused int xgene_gpio_suspend(struct device *dev)
135 struct xgene_gpio *gpio = dev_get_drvdata(dev);
136 unsigned long bank_offset;
139 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
140 bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
141 gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset);
146 static __maybe_unused int xgene_gpio_resume(struct device *dev)
148 struct xgene_gpio *gpio = dev_get_drvdata(dev);
149 unsigned long bank_offset;
152 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) {
153 bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE;
154 iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset);
159 static SIMPLE_DEV_PM_OPS(xgene_gpio_pm, xgene_gpio_suspend, xgene_gpio_resume);
161 static int xgene_gpio_probe(struct platform_device *pdev)
163 struct resource *res;
164 struct xgene_gpio *gpio;
167 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
173 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
174 gpio->base = devm_ioremap_nocache(&pdev->dev, res->start,
181 gpio->chip.ngpio = XGENE_MAX_GPIOS;
183 spin_lock_init(&gpio->lock);
184 gpio->chip.dev = &pdev->dev;
185 gpio->chip.direction_input = xgene_gpio_dir_in;
186 gpio->chip.direction_output = xgene_gpio_dir_out;
187 gpio->chip.get = xgene_gpio_get;
188 gpio->chip.set = xgene_gpio_set;
189 gpio->chip.label = dev_name(&pdev->dev);
190 gpio->chip.base = -1;
192 platform_set_drvdata(pdev, gpio);
194 err = gpiochip_add(&gpio->chip);
197 "failed to register gpiochip.\n");
201 dev_info(&pdev->dev, "X-Gene GPIO driver registered.\n");
204 dev_err(&pdev->dev, "X-Gene GPIO driver registration failed.\n");
208 static int xgene_gpio_remove(struct platform_device *pdev)
210 struct xgene_gpio *gpio = platform_get_drvdata(pdev);
212 gpiochip_remove(&gpio->chip);
216 static const struct of_device_id xgene_gpio_of_match[] = {
217 { .compatible = "apm,xgene-gpio", },
220 MODULE_DEVICE_TABLE(of, xgene_gpio_of_match);
222 static struct platform_driver xgene_gpio_driver = {
224 .name = "xgene-gpio",
225 .of_match_table = xgene_gpio_of_match,
226 .pm = &xgene_gpio_pm,
228 .probe = xgene_gpio_probe,
229 .remove = xgene_gpio_remove,
232 module_platform_driver(xgene_gpio_driver);
234 MODULE_AUTHOR("Feng Kan <fkan@apm.com>");
235 MODULE_DESCRIPTION("APM X-Gene GPIO driver");
236 MODULE_LICENSE("GPL");