1 /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
3 * Driver for Semtech SX150X I2C GPIO Expanders
5 * Author: Gregory Bean <gbean@codeaurora.org>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 and
9 * only version 2 as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 #include <linux/gpio.h>
22 #include <linux/i2c.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/mutex.h>
27 #include <linux/slab.h>
29 #include <linux/of_address.h>
30 #include <linux/of_irq.h>
31 #include <linux/of_gpio.h>
32 #include <linux/of_device.h>
34 #define NO_UPDATE_PENDING -1
36 /* The chip models of sx150x */
41 struct sx150x_123_pri {
51 struct sx150x_456_pri {
61 struct sx150x_789_pri {
70 struct sx150x_device_data {
81 struct sx150x_123_pri x123;
82 struct sx150x_456_pri x456;
83 struct sx150x_789_pri x789;
88 * struct sx150x_platform_data - config data for SX150x driver
89 * @gpio_base: The index number of the first GPIO assigned to this
90 * GPIO expander. The expander will create a block of
91 * consecutively numbered gpios beginning at the given base,
92 * with the size of the block depending on the model of the
94 * @oscio_is_gpo: If set to true, the driver will configure OSCIO as a GPO
95 * instead of as an oscillator, increasing the size of the
96 * GP(I)O pool created by this expander by one. The
97 * output-only GPO pin will be added at the end of the block.
98 * @io_pullup_ena: A bit-mask which enables or disables the pull-up resistor
99 * for each IO line in the expander. Setting the bit at
100 * position n will enable the pull-up for the IO at
101 * the corresponding offset. For chips with fewer than
102 * 16 IO pins, high-end bits are ignored.
103 * @io_pulldn_ena: A bit-mask which enables-or disables the pull-down
104 * resistor for each IO line in the expander. Setting the
105 * bit at position n will enable the pull-down for the IO at
106 * the corresponding offset. For chips with fewer than
107 * 16 IO pins, high-end bits are ignored.
108 * @io_polarity: A bit-mask which enables polarity inversion for each IO line
109 * in the expander. Setting the bit at position n inverts
110 * the polarity of that IO line, while clearing it results
111 * in normal polarity. For chips with fewer than 16 IO pins,
112 * high-end bits are ignored.
113 * @irq_summary: The 'summary IRQ' line to which the GPIO expander's INT line
114 * is connected, via which it reports interrupt events
115 * across all GPIO lines. This must be a real,
116 * pre-existing IRQ line.
117 * Setting this value < 0 disables the irq_chip functionality
119 * @irq_base: The first 'virtual IRQ' line at which our block of GPIO-based
120 * IRQ lines will appear. Similarly to gpio_base, the expander
121 * will create a block of irqs beginning at this number.
122 * This value is ignored if irq_summary is < 0.
123 * @reset_during_probe: If set to true, the driver will trigger a full
124 * reset of the chip at the beginning of the probe
125 * in order to place it in a known state.
127 struct sx150x_platform_data {
135 bool reset_during_probe;
139 struct gpio_chip gpio_chip;
140 struct i2c_client *client;
141 const struct sx150x_device_data *dev_cfg;
149 struct irq_chip irq_chip;
153 static const struct sx150x_device_data sx150x_devices[] = {
154 [0] = { /* sx1508q */
160 .reg_irq_mask = 0x09,
165 .reg_polarity = 0x06,
172 [1] = { /* sx1509q */
178 .reg_irq_mask = 0x13,
183 .reg_polarity = 0x0d,
190 [2] = { /* sx1506q */
196 .reg_irq_mask = 0x09,
200 .reg_pld_mode = 0x21,
201 .reg_pld_table0 = 0x23,
202 .reg_pld_table1 = 0x25,
203 .reg_pld_table2 = 0x27,
204 .reg_pld_table3 = 0x29,
205 .reg_pld_table4 = 0x2b,
210 [3] = { /* sx1502q */
216 .reg_irq_mask = 0x05,
220 .reg_pld_mode = 0x10,
221 .reg_pld_table0 = 0x11,
222 .reg_pld_table1 = 0x12,
223 .reg_pld_table2 = 0x13,
224 .reg_pld_table3 = 0x14,
225 .reg_pld_table4 = 0x15,
232 static const struct i2c_device_id sx150x_id[] = {
240 static const struct of_device_id sx150x_of_match[] = {
241 { .compatible = "semtech,sx1508q" },
242 { .compatible = "semtech,sx1509q" },
243 { .compatible = "semtech,sx1506q" },
244 { .compatible = "semtech,sx1502q" },
248 static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
250 s32 err = i2c_smbus_write_byte_data(client, reg, val);
253 dev_warn(&client->dev,
254 "i2c write fail: can't write %02x to %02x: %d\n",
259 static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
261 s32 err = i2c_smbus_read_byte_data(client, reg);
266 dev_warn(&client->dev,
267 "i2c read fail: can't read from %02x: %d\n",
272 static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
274 return (chip->dev_cfg->ngpios == offset);
278 * These utility functions solve the common problem of locating and setting
279 * configuration bits. Configuration bits are grouped into registers
280 * whose indexes increase downwards. For example, with eight-bit registers,
281 * sixteen gpios would have their config bits grouped in the following order:
282 * REGISTER N-1 [ f e d c b a 9 8 ]
283 * N [ 7 6 5 4 3 2 1 0 ]
285 * For multi-bit configurations, the pattern gets wider:
286 * REGISTER N-3 [ f f e e d d c c ]
287 * N-2 [ b b a a 9 9 8 8 ]
288 * N-1 [ 7 7 6 6 5 5 4 4 ]
289 * N [ 3 3 2 2 1 1 0 0 ]
291 * Given the address of the starting register 'N', the index of the gpio
292 * whose configuration we seek to change, and the width in bits of that
293 * configuration, these functions allow us to locate the correct
294 * register and mask the correct bits.
296 static inline void sx150x_find_cfg(u8 offset, u8 width,
297 u8 *reg, u8 *mask, u8 *shift)
299 *reg -= offset * width / 8;
300 *mask = (1 << width) - 1;
301 *shift = (offset * width) % 8;
305 static s32 sx150x_write_cfg(struct sx150x_chip *chip,
306 u8 offset, u8 width, u8 reg, u8 val)
313 sx150x_find_cfg(offset, width, ®, &mask, &shift);
314 err = sx150x_i2c_read(chip->client, reg, &data);
319 data |= (val << shift) & mask;
320 return sx150x_i2c_write(chip->client, reg, data);
323 static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
325 u8 reg = chip->dev_cfg->reg_data;
331 sx150x_find_cfg(offset, 1, ®, &mask, &shift);
332 err = sx150x_i2c_read(chip->client, reg, &data);
334 err = (data & mask) != 0 ? 1 : 0;
339 static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
341 sx150x_i2c_write(chip->client,
342 chip->dev_cfg->pri.x789.reg_clock,
343 (val ? 0x1f : 0x10));
346 static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
348 sx150x_write_cfg(chip,
351 chip->dev_cfg->reg_data,
355 static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
357 return sx150x_write_cfg(chip,
360 chip->dev_cfg->reg_dir,
364 static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
368 err = sx150x_write_cfg(chip,
371 chip->dev_cfg->reg_data,
374 err = sx150x_write_cfg(chip,
377 chip->dev_cfg->reg_dir,
382 static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
384 struct sx150x_chip *chip = gpiochip_get_data(gc);
385 int status = -EINVAL;
387 if (!offset_is_oscio(chip, offset)) {
388 mutex_lock(&chip->lock);
389 status = sx150x_get_io(chip, offset);
390 mutex_unlock(&chip->lock);
393 return (status < 0) ? status : !!status;
396 static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
398 struct sx150x_chip *chip = gpiochip_get_data(gc);
400 mutex_lock(&chip->lock);
401 if (offset_is_oscio(chip, offset))
402 sx150x_set_oscio(chip, val);
404 sx150x_set_io(chip, offset, val);
405 mutex_unlock(&chip->lock);
408 static int sx150x_gpio_set_single_ended(struct gpio_chip *gc,
410 enum single_ended_mode mode)
412 struct sx150x_chip *chip = gpiochip_get_data(gc);
414 /* On the SX160X 789 we can set open drain */
415 if (chip->dev_cfg->model != SX150X_789)
418 if (mode == LINE_MODE_PUSH_PULL)
419 return sx150x_write_cfg(chip,
422 chip->dev_cfg->pri.x789.reg_drain,
425 if (mode == LINE_MODE_OPEN_DRAIN)
426 return sx150x_write_cfg(chip,
429 chip->dev_cfg->pri.x789.reg_drain,
434 static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
436 struct sx150x_chip *chip = gpiochip_get_data(gc);
437 int status = -EINVAL;
439 if (!offset_is_oscio(chip, offset)) {
440 mutex_lock(&chip->lock);
441 status = sx150x_io_input(chip, offset);
442 mutex_unlock(&chip->lock);
447 static int sx150x_gpio_direction_output(struct gpio_chip *gc,
451 struct sx150x_chip *chip = gpiochip_get_data(gc);
454 if (!offset_is_oscio(chip, offset)) {
455 mutex_lock(&chip->lock);
456 status = sx150x_io_output(chip, offset, val);
457 mutex_unlock(&chip->lock);
462 static void sx150x_irq_mask(struct irq_data *d)
464 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
465 unsigned n = d->hwirq;
467 chip->irq_masked |= (1 << n);
468 chip->irq_update = n;
471 static void sx150x_irq_unmask(struct irq_data *d)
473 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
474 unsigned n = d->hwirq;
476 chip->irq_masked &= ~(1 << n);
477 chip->irq_update = n;
480 static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
482 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
485 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
490 if (flow_type & IRQ_TYPE_EDGE_RISING)
492 if (flow_type & IRQ_TYPE_EDGE_FALLING)
495 chip->irq_sense &= ~(3UL << (n * 2));
496 chip->irq_sense |= val << (n * 2);
497 chip->irq_update = n;
501 static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
503 struct sx150x_chip *chip = (struct sx150x_chip *)dev_id;
504 unsigned nhandled = 0;
511 for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
512 err = sx150x_i2c_read(chip->client,
513 chip->dev_cfg->reg_irq_src - i,
518 sx150x_i2c_write(chip->client,
519 chip->dev_cfg->reg_irq_src - i,
521 for (n = 0; n < 8; ++n) {
522 if (val & (1 << n)) {
523 sub_irq = irq_find_mapping(
524 chip->gpio_chip.irqdomain,
526 handle_nested_irq(sub_irq);
532 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
535 static void sx150x_irq_bus_lock(struct irq_data *d)
537 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
539 mutex_lock(&chip->lock);
542 static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
544 struct sx150x_chip *chip = gpiochip_get_data(irq_data_get_irq_chip_data(d));
547 if (chip->irq_update == NO_UPDATE_PENDING)
550 n = chip->irq_update;
551 chip->irq_update = NO_UPDATE_PENDING;
553 /* Avoid updates if nothing changed */
554 if (chip->dev_sense == chip->irq_sense &&
555 chip->dev_masked == chip->irq_masked)
558 chip->dev_sense = chip->irq_sense;
559 chip->dev_masked = chip->irq_masked;
561 if (chip->irq_masked & (1 << n)) {
562 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
563 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
565 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
566 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
567 chip->irq_sense >> (n * 2));
570 mutex_unlock(&chip->lock);
573 static void sx150x_init_chip(struct sx150x_chip *chip,
574 struct i2c_client *client,
575 kernel_ulong_t driver_data,
576 struct sx150x_platform_data *pdata)
578 mutex_init(&chip->lock);
580 chip->client = client;
581 chip->dev_cfg = &sx150x_devices[driver_data];
582 chip->gpio_chip.parent = &client->dev;
583 chip->gpio_chip.label = client->name;
584 chip->gpio_chip.direction_input = sx150x_gpio_direction_input;
585 chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
586 chip->gpio_chip.get = sx150x_gpio_get;
587 chip->gpio_chip.set = sx150x_gpio_set;
588 chip->gpio_chip.set_single_ended = sx150x_gpio_set_single_ended;
589 chip->gpio_chip.base = pdata->gpio_base;
590 chip->gpio_chip.can_sleep = true;
591 chip->gpio_chip.ngpio = chip->dev_cfg->ngpios;
592 #ifdef CONFIG_OF_GPIO
593 chip->gpio_chip.of_node = client->dev.of_node;
594 chip->gpio_chip.of_gpio_n_cells = 2;
596 if (pdata->oscio_is_gpo)
597 ++chip->gpio_chip.ngpio;
599 chip->irq_chip.name = client->name;
600 chip->irq_chip.irq_mask = sx150x_irq_mask;
601 chip->irq_chip.irq_unmask = sx150x_irq_unmask;
602 chip->irq_chip.irq_set_type = sx150x_irq_set_type;
603 chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
604 chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
605 chip->irq_summary = -1;
607 chip->irq_masked = ~0;
609 chip->dev_masked = ~0;
611 chip->irq_update = NO_UPDATE_PENDING;
614 static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
619 for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
620 err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
624 static int sx150x_reset(struct sx150x_chip *chip)
628 err = i2c_smbus_write_byte_data(chip->client,
629 chip->dev_cfg->pri.x789.reg_reset,
634 err = i2c_smbus_write_byte_data(chip->client,
635 chip->dev_cfg->pri.x789.reg_reset,
640 static int sx150x_init_hw(struct sx150x_chip *chip,
641 struct sx150x_platform_data *pdata)
645 if (pdata->reset_during_probe) {
646 err = sx150x_reset(chip);
651 if (chip->dev_cfg->model == SX150X_789)
652 err = sx150x_i2c_write(chip->client,
653 chip->dev_cfg->pri.x789.reg_misc,
655 else if (chip->dev_cfg->model == SX150X_456)
656 err = sx150x_i2c_write(chip->client,
657 chip->dev_cfg->pri.x456.reg_advance,
660 err = sx150x_i2c_write(chip->client,
661 chip->dev_cfg->pri.x123.reg_advance,
666 err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
667 pdata->io_pullup_ena);
671 err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
672 pdata->io_pulldn_ena);
676 if (chip->dev_cfg->model == SX150X_789) {
677 err = sx150x_init_io(chip,
678 chip->dev_cfg->pri.x789.reg_polarity,
682 } else if (chip->dev_cfg->model == SX150X_456) {
683 /* Set all pins to work in normal mode */
684 err = sx150x_init_io(chip,
685 chip->dev_cfg->pri.x456.reg_pld_mode,
690 /* Set all pins to work in normal mode */
691 err = sx150x_init_io(chip,
692 chip->dev_cfg->pri.x123.reg_pld_mode,
699 if (pdata->oscio_is_gpo)
700 sx150x_set_oscio(chip, 0);
705 static int sx150x_install_irq_chip(struct sx150x_chip *chip,
711 chip->irq_summary = irq_summary;
712 chip->irq_base = irq_base;
714 /* Add gpio chip to irq subsystem */
715 err = gpiochip_irqchip_add(&chip->gpio_chip,
716 &chip->irq_chip, chip->irq_base,
717 handle_edge_irq, IRQ_TYPE_EDGE_BOTH);
719 dev_err(&chip->client->dev,
720 "could not connect irqchip to gpiochip\n");
724 err = devm_request_threaded_irq(&chip->client->dev,
725 irq_summary, NULL, sx150x_irq_thread_fn,
726 IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_FALLING,
727 chip->irq_chip.name, chip);
729 chip->irq_summary = -1;
736 static int sx150x_probe(struct i2c_client *client,
737 const struct i2c_device_id *id)
739 static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
740 I2C_FUNC_SMBUS_WRITE_WORD_DATA;
741 struct sx150x_platform_data *pdata;
742 struct sx150x_chip *chip;
745 pdata = dev_get_platdata(&client->dev);
749 if (!i2c_check_functionality(client->adapter, i2c_funcs))
752 chip = devm_kzalloc(&client->dev,
753 sizeof(struct sx150x_chip), GFP_KERNEL);
757 sx150x_init_chip(chip, client, id->driver_data, pdata);
758 rc = sx150x_init_hw(chip, pdata);
762 rc = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
766 if (pdata->irq_summary >= 0) {
767 rc = sx150x_install_irq_chip(chip,
774 i2c_set_clientdata(client, chip);
779 static struct i2c_driver sx150x_driver = {
782 .of_match_table = of_match_ptr(sx150x_of_match),
784 .probe = sx150x_probe,
785 .id_table = sx150x_id,
788 static int __init sx150x_init(void)
790 return i2c_add_driver(&sx150x_driver);
792 subsys_initcall(sx150x_init);