1 // SPDX-License-Identifier: GPL-2.0-only
3 * PCA953x 4/8/16/24/40 bit I/O ports
5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
6 * Copyright (C) 2007 Marvell International Ltd.
8 * Derived from drivers/i2c/chips/pca9539.c
11 #include <linux/acpi.h>
12 #include <linux/bits.h>
13 #include <linux/gpio/driver.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/module.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_data/pca953x.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
25 #include <asm/unaligned.h>
27 #define PCA953X_INPUT 0x00
28 #define PCA953X_OUTPUT 0x01
29 #define PCA953X_INVERT 0x02
30 #define PCA953X_DIRECTION 0x03
32 #define REG_ADDR_MASK GENMASK(5, 0)
33 #define REG_ADDR_EXT BIT(6)
34 #define REG_ADDR_AI BIT(7)
36 #define PCA957X_IN 0x00
37 #define PCA957X_INVRT 0x01
38 #define PCA957X_BKEN 0x02
39 #define PCA957X_PUPD 0x03
40 #define PCA957X_CFG 0x04
41 #define PCA957X_OUT 0x05
42 #define PCA957X_MSK 0x06
43 #define PCA957X_INTS 0x07
45 #define PCAL953X_OUT_STRENGTH 0x20
46 #define PCAL953X_IN_LATCH 0x22
47 #define PCAL953X_PULL_EN 0x23
48 #define PCAL953X_PULL_SEL 0x24
49 #define PCAL953X_INT_MASK 0x25
50 #define PCAL953X_INT_STAT 0x26
51 #define PCAL953X_OUT_CONF 0x27
53 #define PCAL6524_INT_EDGE 0x28
54 #define PCAL6524_INT_CLR 0x2a
55 #define PCAL6524_IN_STATUS 0x2b
56 #define PCAL6524_OUT_INDCONF 0x2c
57 #define PCAL6524_DEBOUNCE 0x2d
59 #define PCA_GPIO_MASK GENMASK(7, 0)
61 #define PCAL_GPIO_MASK GENMASK(4, 0)
62 #define PCAL_PINCTRL_MASK GENMASK(6, 5)
64 #define PCA_INT BIT(8)
65 #define PCA_PCAL BIT(9)
66 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
67 #define PCA953X_TYPE BIT(12)
68 #define PCA957X_TYPE BIT(13)
69 #define PCA_TYPE_MASK GENMASK(15, 12)
71 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
73 static const struct i2c_device_id pca953x_id[] = {
74 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
75 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
76 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
77 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
78 { "pca9536", 4 | PCA953X_TYPE, },
79 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
80 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
81 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
82 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
83 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
84 { "pca9556", 8 | PCA953X_TYPE, },
85 { "pca9557", 8 | PCA953X_TYPE, },
86 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
87 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
88 { "pca9698", 40 | PCA953X_TYPE, },
90 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
91 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
92 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
94 { "max7310", 8 | PCA953X_TYPE, },
95 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
96 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
97 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
98 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
99 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
100 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
101 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
102 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
103 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
104 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
105 { "xra1202", 8 | PCA953X_TYPE },
108 MODULE_DEVICE_TABLE(i2c, pca953x_id);
110 #ifdef CONFIG_GPIO_PCA953X_IRQ
112 #include <linux/dmi.h>
113 #include <linux/gpio.h>
114 #include <linux/list.h>
116 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = {
119 * On Intel Galileo Gen 2 board the IRQ pin of one of
120 * the I²C GPIO expanders, which has GpioInt() resource,
121 * is provided as an absolute number instead of being
122 * relative. Since first controller (gpio-sch.c) and
123 * second (gpio-dwapb.c) are at the fixed bases, we may
124 * safely refer to the number in the global space to get
128 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
135 static int pca953x_acpi_get_pin(struct acpi_resource *ares, void *data)
137 struct acpi_resource_gpio *agpio;
140 if (acpi_gpio_get_irq_resource(ares, &agpio))
141 *pin = agpio->pin_table[0];
145 static int pca953x_acpi_find_pin(struct device *dev)
147 struct acpi_device *adev = ACPI_COMPANION(dev);
148 int pin = -ENOENT, ret;
151 ret = acpi_dev_get_resources(adev, &r, pca953x_acpi_get_pin, &pin);
152 acpi_dev_free_resource_list(&r);
159 static inline int pca953x_acpi_find_pin(struct device *dev) { return -ENXIO; }
162 static int pca953x_acpi_get_irq(struct device *dev)
166 pin = pca953x_acpi_find_pin(dev);
170 dev_info(dev, "Applying ACPI interrupt quirk (GPIO %d)\n", pin);
172 if (!gpio_is_valid(pin))
175 ret = gpio_request(pin, "pca953x interrupt");
179 ret = gpio_to_irq(pin);
181 /* When pin is used as an IRQ, no need to keep it requested */
188 static const struct acpi_device_id pca953x_acpi_ids[] = {
189 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
192 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
197 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
199 struct pca953x_reg_config {
206 static const struct pca953x_reg_config pca953x_regs = {
207 .direction = PCA953X_DIRECTION,
208 .output = PCA953X_OUTPUT,
209 .input = PCA953X_INPUT,
210 .invert = PCA953X_INVERT,
213 static const struct pca953x_reg_config pca957x_regs = {
214 .direction = PCA957X_CFG,
215 .output = PCA957X_OUT,
217 .invert = PCA957X_INVRT,
220 struct pca953x_chip {
222 struct mutex i2c_lock;
223 struct regmap *regmap;
225 #ifdef CONFIG_GPIO_PCA953X_IRQ
226 struct mutex irq_lock;
227 u8 irq_mask[MAX_BANK];
228 u8 irq_stat[MAX_BANK];
229 u8 irq_trig_raise[MAX_BANK];
230 u8 irq_trig_fall[MAX_BANK];
231 struct irq_chip irq_chip;
233 atomic_t wakeup_path;
235 struct i2c_client *client;
236 struct gpio_chip gpio_chip;
237 const char *const *names;
238 unsigned long driver_data;
239 struct regulator *regulator;
241 const struct pca953x_reg_config *regs;
244 static int pca953x_bank_shift(struct pca953x_chip *chip)
246 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
249 #define PCA953x_BANK_INPUT BIT(0)
250 #define PCA953x_BANK_OUTPUT BIT(1)
251 #define PCA953x_BANK_POLARITY BIT(2)
252 #define PCA953x_BANK_CONFIG BIT(3)
254 #define PCA957x_BANK_INPUT BIT(0)
255 #define PCA957x_BANK_POLARITY BIT(1)
256 #define PCA957x_BANK_BUSHOLD BIT(2)
257 #define PCA957x_BANK_CONFIG BIT(4)
258 #define PCA957x_BANK_OUTPUT BIT(5)
260 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2)
261 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3)
262 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4)
263 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5)
264 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6)
267 * We care about the following registers:
268 * - Standard set, below 0x40, each port can be replicated up to 8 times
270 * Input port 0x00 + 0 * bank_size R
271 * Output port 0x00 + 1 * bank_size RW
272 * Polarity Inversion port 0x00 + 2 * bank_size RW
273 * Configuration port 0x00 + 3 * bank_size RW
274 * - PCA957x with mixed up registers
275 * Input port 0x00 + 0 * bank_size R
276 * Polarity Inversion port 0x00 + 1 * bank_size RW
277 * Bus hold port 0x00 + 2 * bank_size RW
278 * Configuration port 0x00 + 4 * bank_size RW
279 * Output port 0x00 + 5 * bank_size RW
281 * - Extended set, above 0x40, often chip specific.
282 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
283 * Input latch register 0x40 + 2 * bank_size RW
284 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW
285 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW
286 * Interrupt mask register 0x40 + 5 * bank_size RW
287 * Interrupt status register 0x40 + 6 * bank_size R
289 * - Registers with bit 0x80 set, the AI bit
290 * The bit is cleared and the registers fall into one of the
294 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
297 int bank_shift = pca953x_bank_shift(chip);
298 int bank = (reg & REG_ADDR_MASK) >> bank_shift;
299 int offset = reg & (BIT(bank_shift) - 1);
301 /* Special PCAL extended register check. */
302 if (reg & REG_ADDR_EXT) {
303 if (!(chip->driver_data & PCA_PCAL))
308 /* Register is not in the matching bank. */
309 if (!(BIT(bank) & checkbank))
312 /* Register is not within allowed range of bank. */
313 if (offset >= NBANK(chip))
319 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
321 struct pca953x_chip *chip = dev_get_drvdata(dev);
324 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
325 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
326 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
328 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
329 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
330 PCA957x_BANK_BUSHOLD;
333 if (chip->driver_data & PCA_PCAL) {
334 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
335 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
336 PCAL9xxx_BANK_IRQ_STAT;
339 return pca953x_check_register(chip, reg, bank);
342 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
344 struct pca953x_chip *chip = dev_get_drvdata(dev);
347 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
348 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
351 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
352 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
355 if (chip->driver_data & PCA_PCAL)
356 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
357 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
359 return pca953x_check_register(chip, reg, bank);
362 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
364 struct pca953x_chip *chip = dev_get_drvdata(dev);
367 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
368 bank = PCA953x_BANK_INPUT;
370 bank = PCA957x_BANK_INPUT;
372 if (chip->driver_data & PCA_PCAL)
373 bank |= PCAL9xxx_BANK_IRQ_STAT;
375 return pca953x_check_register(chip, reg, bank);
378 static const struct regmap_config pca953x_i2c_regmap = {
382 .readable_reg = pca953x_readable_register,
383 .writeable_reg = pca953x_writeable_register,
384 .volatile_reg = pca953x_volatile_register,
386 .cache_type = REGCACHE_RBTREE,
387 .max_register = 0x7f,
390 static const struct regmap_config pca953x_ai_i2c_regmap = {
394 .read_flag_mask = REG_ADDR_AI,
395 .write_flag_mask = REG_ADDR_AI,
397 .readable_reg = pca953x_readable_register,
398 .writeable_reg = pca953x_writeable_register,
399 .volatile_reg = pca953x_volatile_register,
401 .disable_locking = true,
402 .cache_type = REGCACHE_RBTREE,
403 .max_register = 0x7f,
406 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
407 bool write, bool addrinc)
409 int bank_shift = pca953x_bank_shift(chip);
410 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
411 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
412 u8 regaddr = pinctrl | addr | (off / BANK_SZ);
417 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
419 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
422 ret = regmap_bulk_write(chip->regmap, regaddr, val, NBANK(chip));
424 dev_err(&chip->client->dev, "failed writing register\n");
431 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
433 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
436 ret = regmap_bulk_read(chip->regmap, regaddr, val, NBANK(chip));
438 dev_err(&chip->client->dev, "failed reading register\n");
445 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
447 struct pca953x_chip *chip = gpiochip_get_data(gc);
448 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
450 u8 bit = BIT(off % BANK_SZ);
453 mutex_lock(&chip->i2c_lock);
454 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
455 mutex_unlock(&chip->i2c_lock);
459 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
460 unsigned off, int val)
462 struct pca953x_chip *chip = gpiochip_get_data(gc);
463 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
465 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
467 u8 bit = BIT(off % BANK_SZ);
470 mutex_lock(&chip->i2c_lock);
471 /* set output level */
472 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
477 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
479 mutex_unlock(&chip->i2c_lock);
483 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
485 struct pca953x_chip *chip = gpiochip_get_data(gc);
486 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
488 u8 bit = BIT(off % BANK_SZ);
492 mutex_lock(&chip->i2c_lock);
493 ret = regmap_read(chip->regmap, inreg, ®_val);
494 mutex_unlock(&chip->i2c_lock);
496 /* NOTE: diagnostic already emitted; that's all we should
497 * do unless gpio_*_value_cansleep() calls become different
498 * from their nonsleeping siblings (and report faults).
503 return !!(reg_val & bit);
506 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
508 struct pca953x_chip *chip = gpiochip_get_data(gc);
509 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
511 u8 bit = BIT(off % BANK_SZ);
513 mutex_lock(&chip->i2c_lock);
514 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
515 mutex_unlock(&chip->i2c_lock);
518 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
520 struct pca953x_chip *chip = gpiochip_get_data(gc);
521 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
523 u8 bit = BIT(off % BANK_SZ);
527 mutex_lock(&chip->i2c_lock);
528 ret = regmap_read(chip->regmap, dirreg, ®_val);
529 mutex_unlock(&chip->i2c_lock);
533 return !!(reg_val & bit);
536 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
537 unsigned long *mask, unsigned long *bits)
539 struct pca953x_chip *chip = gpiochip_get_data(gc);
540 unsigned int bank_mask, bank_val;
542 u8 reg_val[MAX_BANK];
545 mutex_lock(&chip->i2c_lock);
546 ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
550 for (bank = 0; bank < NBANK(chip); bank++) {
551 bank_mask = mask[bank / sizeof(*mask)] >>
552 ((bank % sizeof(*mask)) * 8);
554 bank_val = bits[bank / sizeof(*bits)] >>
555 ((bank % sizeof(*bits)) * 8);
556 bank_val &= bank_mask;
557 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
561 pca953x_write_regs(chip, chip->regs->output, reg_val);
563 mutex_unlock(&chip->i2c_lock);
566 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
568 unsigned long config)
570 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
572 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
574 u8 bit = BIT(offset % BANK_SZ);
578 * pull-up/pull-down configuration requires PCAL extended
581 if (!(chip->driver_data & PCA_PCAL))
584 mutex_lock(&chip->i2c_lock);
586 /* Configure pull-up/pull-down */
587 if (config == PIN_CONFIG_BIAS_PULL_UP)
588 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
589 else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
590 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
596 /* Disable/Enable pull-up/pull-down */
597 if (config == PIN_CONFIG_BIAS_DISABLE)
598 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
600 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
603 mutex_unlock(&chip->i2c_lock);
607 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
608 unsigned long config)
610 struct pca953x_chip *chip = gpiochip_get_data(gc);
612 switch (pinconf_to_config_param(config)) {
613 case PIN_CONFIG_BIAS_PULL_UP:
614 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
615 case PIN_CONFIG_BIAS_PULL_DOWN:
616 case PIN_CONFIG_BIAS_DISABLE:
617 return pca953x_gpio_set_pull_up_down(chip, offset, config);
623 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
625 struct gpio_chip *gc;
627 gc = &chip->gpio_chip;
629 gc->direction_input = pca953x_gpio_direction_input;
630 gc->direction_output = pca953x_gpio_direction_output;
631 gc->get = pca953x_gpio_get_value;
632 gc->set = pca953x_gpio_set_value;
633 gc->get_direction = pca953x_gpio_get_direction;
634 gc->set_multiple = pca953x_gpio_set_multiple;
635 gc->set_config = pca953x_gpio_set_config;
636 gc->can_sleep = true;
638 gc->base = chip->gpio_start;
640 gc->label = dev_name(&chip->client->dev);
641 gc->parent = &chip->client->dev;
642 gc->owner = THIS_MODULE;
643 gc->names = chip->names;
646 #ifdef CONFIG_GPIO_PCA953X_IRQ
647 static void pca953x_irq_mask(struct irq_data *d)
649 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
650 struct pca953x_chip *chip = gpiochip_get_data(gc);
652 chip->irq_mask[d->hwirq / BANK_SZ] &= ~BIT(d->hwirq % BANK_SZ);
655 static void pca953x_irq_unmask(struct irq_data *d)
657 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
658 struct pca953x_chip *chip = gpiochip_get_data(gc);
660 chip->irq_mask[d->hwirq / BANK_SZ] |= BIT(d->hwirq % BANK_SZ);
663 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
665 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
666 struct pca953x_chip *chip = gpiochip_get_data(gc);
669 atomic_inc(&chip->wakeup_path);
671 atomic_dec(&chip->wakeup_path);
673 return irq_set_irq_wake(chip->client->irq, on);
676 static void pca953x_irq_bus_lock(struct irq_data *d)
678 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
679 struct pca953x_chip *chip = gpiochip_get_data(gc);
681 mutex_lock(&chip->irq_lock);
684 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
686 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
687 struct pca953x_chip *chip = gpiochip_get_data(gc);
690 u8 invert_irq_mask[MAX_BANK];
691 u8 reg_direction[MAX_BANK];
693 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
695 if (chip->driver_data & PCA_PCAL) {
696 /* Enable latch on interrupt-enabled inputs */
697 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
699 for (i = 0; i < NBANK(chip); i++)
700 invert_irq_mask[i] = ~chip->irq_mask[i];
702 /* Unmask enabled interrupts */
703 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
706 /* Look for any newly setup interrupt */
707 for (i = 0; i < NBANK(chip); i++) {
708 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
709 new_irqs &= reg_direction[i];
712 level = __ffs(new_irqs);
713 pca953x_gpio_direction_input(&chip->gpio_chip,
714 level + (BANK_SZ * i));
715 new_irqs &= ~(1 << level);
719 mutex_unlock(&chip->irq_lock);
722 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
724 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
725 struct pca953x_chip *chip = gpiochip_get_data(gc);
726 int bank_nb = d->hwirq / BANK_SZ;
727 u8 mask = BIT(d->hwirq % BANK_SZ);
729 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
730 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
735 if (type & IRQ_TYPE_EDGE_FALLING)
736 chip->irq_trig_fall[bank_nb] |= mask;
738 chip->irq_trig_fall[bank_nb] &= ~mask;
740 if (type & IRQ_TYPE_EDGE_RISING)
741 chip->irq_trig_raise[bank_nb] |= mask;
743 chip->irq_trig_raise[bank_nb] &= ~mask;
748 static void pca953x_irq_shutdown(struct irq_data *d)
750 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
751 struct pca953x_chip *chip = gpiochip_get_data(gc);
752 u8 mask = BIT(d->hwirq % BANK_SZ);
754 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
755 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
758 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
760 u8 cur_stat[MAX_BANK];
761 u8 old_stat[MAX_BANK];
762 bool pending_seen = false;
763 bool trigger_seen = false;
764 u8 trigger[MAX_BANK];
765 u8 reg_direction[MAX_BANK];
768 if (chip->driver_data & PCA_PCAL) {
769 /* Read the current interrupt status from the device */
770 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
774 /* Check latched inputs and clear interrupt status */
775 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
779 for (i = 0; i < NBANK(chip); i++) {
780 /* Apply filter for rising/falling edge selection */
781 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
782 (cur_stat[i] & chip->irq_trig_raise[i]);
783 pending[i] &= trigger[i];
791 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
795 /* Remove output pins from the equation */
796 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
797 for (i = 0; i < NBANK(chip); i++)
798 cur_stat[i] &= reg_direction[i];
800 memcpy(old_stat, chip->irq_stat, NBANK(chip));
802 for (i = 0; i < NBANK(chip); i++) {
803 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
811 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
813 for (i = 0; i < NBANK(chip); i++) {
814 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
815 (cur_stat[i] & chip->irq_trig_raise[i]);
816 pending[i] &= trigger[i];
824 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
826 struct pca953x_chip *chip = devid;
827 u8 pending[MAX_BANK];
829 unsigned nhandled = 0;
832 if (!pca953x_irq_pending(chip, pending))
835 for (i = 0; i < NBANK(chip); i++) {
837 level = __ffs(pending[i]);
838 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
839 level + (BANK_SZ * i)));
840 pending[i] &= ~(1 << level);
845 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
848 static int pca953x_irq_setup(struct pca953x_chip *chip,
851 struct i2c_client *client = chip->client;
852 struct irq_chip *irq_chip = &chip->irq_chip;
853 u8 reg_direction[MAX_BANK];
856 if (dmi_first_match(pca953x_dmi_acpi_irq_info)) {
857 ret = pca953x_acpi_get_irq(&client->dev);
868 if (!(chip->driver_data & PCA_INT))
871 ret = pca953x_read_regs(chip, chip->regs->input, chip->irq_stat);
876 * There is no way to know which GPIO line generated the
877 * interrupt. We have to rely on the previous read for
880 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
881 for (i = 0; i < NBANK(chip); i++)
882 chip->irq_stat[i] &= reg_direction[i];
883 mutex_init(&chip->irq_lock);
885 ret = devm_request_threaded_irq(&client->dev, client->irq,
886 NULL, pca953x_irq_handler,
887 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
889 dev_name(&client->dev), chip);
891 dev_err(&client->dev, "failed to request irq %d\n",
896 irq_chip->name = dev_name(&chip->client->dev);
897 irq_chip->irq_mask = pca953x_irq_mask;
898 irq_chip->irq_unmask = pca953x_irq_unmask;
899 irq_chip->irq_set_wake = pca953x_irq_set_wake;
900 irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
901 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
902 irq_chip->irq_set_type = pca953x_irq_set_type;
903 irq_chip->irq_shutdown = pca953x_irq_shutdown;
905 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
906 irq_base, handle_simple_irq,
909 dev_err(&client->dev,
910 "could not connect irqchip to gpiochip\n");
914 gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
919 #else /* CONFIG_GPIO_PCA953X_IRQ */
920 static int pca953x_irq_setup(struct pca953x_chip *chip,
923 struct i2c_client *client = chip->client;
925 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
926 dev_warn(&client->dev, "interrupt support not compiled in\n");
932 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
937 ret = regcache_sync_region(chip->regmap, chip->regs->output,
938 chip->regs->output + NBANK(chip));
942 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
943 chip->regs->direction + NBANK(chip));
947 /* set platform specific polarity inversion */
949 memset(val, 0xFF, NBANK(chip));
951 memset(val, 0, NBANK(chip));
953 ret = pca953x_write_regs(chip, chip->regs->invert, val);
958 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
963 ret = device_pca95xx_init(chip, invert);
967 /* To enable register 6, 7 to control pull up and pull down */
968 memset(val, 0x02, NBANK(chip));
969 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
978 static const struct of_device_id pca953x_dt_ids[];
980 static int pca953x_probe(struct i2c_client *client,
981 const struct i2c_device_id *i2c_id)
983 struct pca953x_platform_data *pdata;
984 struct pca953x_chip *chip;
988 struct regulator *reg;
989 const struct regmap_config *regmap_config;
991 chip = devm_kzalloc(&client->dev,
992 sizeof(struct pca953x_chip), GFP_KERNEL);
996 pdata = dev_get_platdata(&client->dev);
998 irq_base = pdata->irq_base;
999 chip->gpio_start = pdata->gpio_base;
1000 invert = pdata->invert;
1001 chip->names = pdata->names;
1003 struct gpio_desc *reset_gpio;
1005 chip->gpio_start = -1;
1009 * See if we need to de-assert a reset pin.
1011 * There is no known ACPI-enabled platforms that are
1012 * using "reset" GPIO. Otherwise any of those platform
1013 * must use _DSD method with corresponding property.
1015 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
1017 if (IS_ERR(reset_gpio))
1018 return PTR_ERR(reset_gpio);
1021 chip->client = client;
1023 reg = devm_regulator_get(&client->dev, "vcc");
1026 if (ret != -EPROBE_DEFER)
1027 dev_err(&client->dev, "reg get err: %d\n", ret);
1030 ret = regulator_enable(reg);
1032 dev_err(&client->dev, "reg en err: %d\n", ret);
1035 chip->regulator = reg;
1038 chip->driver_data = i2c_id->driver_data;
1042 match = device_get_match_data(&client->dev);
1048 chip->driver_data = (uintptr_t)match;
1051 i2c_set_clientdata(client, chip);
1053 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
1055 if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
1056 dev_info(&client->dev, "using AI\n");
1057 regmap_config = &pca953x_ai_i2c_regmap;
1059 dev_info(&client->dev, "using no AI\n");
1060 regmap_config = &pca953x_i2c_regmap;
1063 chip->regmap = devm_regmap_init_i2c(client, regmap_config);
1064 if (IS_ERR(chip->regmap)) {
1065 ret = PTR_ERR(chip->regmap);
1069 regcache_mark_dirty(chip->regmap);
1071 mutex_init(&chip->i2c_lock);
1073 * In case we have an i2c-mux controlled by a GPIO provided by an
1074 * expander using the same driver higher on the device tree, read the
1075 * i2c adapter nesting depth and use the retrieved value as lockdep
1076 * subclass for chip->i2c_lock.
1078 * REVISIT: This solution is not complete. It protects us from lockdep
1079 * false positives when the expander controlling the i2c-mux is on
1080 * a different level on the device tree, but not when it's on the same
1081 * level on a different branch (in which case the subclass number
1082 * would be the same).
1084 * TODO: Once a correct solution is developed, a similar fix should be
1085 * applied to all other i2c-controlled GPIO expanders (and potentially
1088 lockdep_set_subclass(&chip->i2c_lock,
1089 i2c_adapter_depth(client->adapter));
1091 /* initialize cached registers from their original values.
1092 * we can't share this chip with another i2c master.
1095 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1096 chip->regs = &pca953x_regs;
1097 ret = device_pca95xx_init(chip, invert);
1099 chip->regs = &pca957x_regs;
1100 ret = device_pca957x_init(chip, invert);
1105 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1109 ret = pca953x_irq_setup(chip, irq_base);
1113 if (pdata && pdata->setup) {
1114 ret = pdata->setup(client, chip->gpio_chip.base,
1115 chip->gpio_chip.ngpio, pdata->context);
1117 dev_warn(&client->dev, "setup failed, %d\n", ret);
1123 regulator_disable(chip->regulator);
1127 static int pca953x_remove(struct i2c_client *client)
1129 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1130 struct pca953x_chip *chip = i2c_get_clientdata(client);
1133 if (pdata && pdata->teardown) {
1134 ret = pdata->teardown(client, chip->gpio_chip.base,
1135 chip->gpio_chip.ngpio, pdata->context);
1137 dev_err(&client->dev, "teardown failed, %d\n", ret);
1142 regulator_disable(chip->regulator);
1147 #ifdef CONFIG_PM_SLEEP
1148 static int pca953x_regcache_sync(struct device *dev)
1150 struct pca953x_chip *chip = dev_get_drvdata(dev);
1154 * The ordering between direction and output is important,
1155 * sync these registers first and only then sync the rest.
1157 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1158 chip->regs->direction + NBANK(chip));
1160 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1164 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1165 chip->regs->output + NBANK(chip));
1167 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1171 #ifdef CONFIG_GPIO_PCA953X_IRQ
1172 if (chip->driver_data & PCA_PCAL) {
1173 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1174 PCAL953X_IN_LATCH + NBANK(chip));
1176 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1181 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1182 PCAL953X_INT_MASK + NBANK(chip));
1184 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1194 static int pca953x_suspend(struct device *dev)
1196 struct pca953x_chip *chip = dev_get_drvdata(dev);
1198 regcache_cache_only(chip->regmap, true);
1200 if (atomic_read(&chip->wakeup_path))
1201 device_set_wakeup_path(dev);
1203 regulator_disable(chip->regulator);
1208 static int pca953x_resume(struct device *dev)
1210 struct pca953x_chip *chip = dev_get_drvdata(dev);
1213 if (!atomic_read(&chip->wakeup_path)) {
1214 ret = regulator_enable(chip->regulator);
1216 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1221 regcache_cache_only(chip->regmap, false);
1222 regcache_mark_dirty(chip->regmap);
1223 ret = pca953x_regcache_sync(dev);
1227 ret = regcache_sync(chip->regmap);
1229 dev_err(dev, "Failed to restore register map: %d\n", ret);
1237 /* convenience to stop overlong match-table lines */
1238 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1239 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1241 static const struct of_device_id pca953x_dt_ids[] = {
1242 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1243 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1244 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1245 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1246 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1247 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1248 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1249 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1250 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1251 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1252 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1253 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1254 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1255 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1256 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1258 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1259 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1260 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1262 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1263 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1264 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1265 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1266 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1268 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1269 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1270 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1271 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1272 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1273 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1275 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1276 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1277 { .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), },
1279 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1283 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1285 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1287 static struct i2c_driver pca953x_driver = {
1290 .pm = &pca953x_pm_ops,
1291 .of_match_table = pca953x_dt_ids,
1292 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1294 .probe = pca953x_probe,
1295 .remove = pca953x_remove,
1296 .id_table = pca953x_id,
1299 static int __init pca953x_init(void)
1301 return i2c_add_driver(&pca953x_driver);
1303 /* register after i2c postcore initcall and before
1304 * subsys initcalls that may rely on these GPIOs
1306 subsys_initcall(pca953x_init);
1308 static void __exit pca953x_exit(void)
1310 i2c_del_driver(&pca953x_driver);
1312 module_exit(pca953x_exit);
1314 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1315 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1316 MODULE_LICENSE("GPL");